JPH05282400A - Automatic generating method for mask pattern of general-purpose rom part - Google Patents

Automatic generating method for mask pattern of general-purpose rom part

Info

Publication number
JPH05282400A
JPH05282400A JP4080720A JP8072092A JPH05282400A JP H05282400 A JPH05282400 A JP H05282400A JP 4080720 A JP4080720 A JP 4080720A JP 8072092 A JP8072092 A JP 8072092A JP H05282400 A JPH05282400 A JP H05282400A
Authority
JP
Japan
Prior art keywords
rom
mask pattern
layout
library
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4080720A
Other languages
Japanese (ja)
Inventor
Susumu Kazaoka
晋 風岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP4080720A priority Critical patent/JPH05282400A/en
Publication of JPH05282400A publication Critical patent/JPH05282400A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To generate the mask patterns with a single device to various types of LSI chips by preparing the ROM part layout information and the ROM part cell information on each chip in the form of a library. CONSTITUTION:When the prepared input data are read, a necessary layout is read out of the ROM part layout information prepared as a library and set at a ROM part layout processing part. Then the ROM part layout processing is carried out based on the ROM part layout information. Then the necessary ROM cell information is set at a mask pattern generating part out of a prepared ROM cell information library. Thus a mask pattern is generated. Then the data are outputted to a mask pattern output part and the generation of the mask pattern is completed. In other words, it is just required to add the layout information and the cell information corresponding to a new chip to the library in order to deal with the new chip.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、マスクROM,1チッ
プマイコン等のLSIに搭載されているROM部にデー
タを記憶するためのマスクパターン自動生成方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask pattern automatic generation method for storing data in a ROM portion mounted on an LSI such as a mask ROM or a one-chip microcomputer.

【0002】[0002]

【従来の技術】図1に従来のROM部マスクパターン自
動生成方法を示す。まず、用意された入力データを読み
込む。次に、どのLSIチップに対する処理を行うのか
を決定する。予め、チップA,チップB,チップC,・
・・・の各LSIチップに対するROM部マスクパター
ン自動生成装置がそれぞれ別個に構成されており、この
段階で、チップの選択を行う。そして、選択されたチッ
プに対応するROM部マスクパターン自動生成装置を起
動し、上記読み込んだ入力データに従って処理を行い、
マスクパターンを出力して終了する。
2. Description of the Related Art FIG. 1 shows a conventional method for automatically generating a mask pattern in a ROM. First, the prepared input data is read. Next, which LSI chip is to be processed is determined. In advance, Chip A, Chip B, Chip C, ...
The ROM section mask pattern automatic generation device for each LSI chip is constructed separately, and the chips are selected at this stage. Then, the ROM mask pattern automatic generation device corresponding to the selected chip is activated, and the processing is performed according to the read input data,
Output mask pattern and exit.

【0003】[0003]

【発明が解決しようとする課題】上記の従来のマスクパ
ターン生成方法は、各種類のチップ毎にROM部レイア
ウト処理部とマスクパターン生成部とを備えるマスクパ
ターン自動生成装置が予め用意されており、ROM部レ
イアウト処理部には該当LSIチップに対応するROM
部レイアウト情報が設定され、マスクパターン生成部に
は該当LSIチップに対応するROMセル情報が設定さ
れている。このような従来の方法では、各LSIチップ
毎に大規模な装置を用意しなければならないために、装
置の拡張性が悪く、新規チップの組み込みが困難で管理
しにくいという問題がある。
In the conventional mask pattern generation method described above, an automatic mask pattern generation device including a ROM layout processing unit and a mask pattern generation unit is prepared in advance for each type of chip. The ROM section layout processing section includes a ROM corresponding to the corresponding LSI chip.
Part layout information is set, and ROM cell information corresponding to the LSI chip is set in the mask pattern generation unit. In such a conventional method, since a large-scale device must be prepared for each LSI chip, the expandability of the device is poor, and it is difficult to incorporate a new chip and difficult to manage.

【0004】本発明の目的は、1つの装置で各種LSI
チップに対応してマスクパターンを生成することのでき
るROMマスクパターン自動生成方法を提供することに
ある。
An object of the present invention is to provide various LSIs with one device.
An object is to provide a ROM mask pattern automatic generation method capable of generating a mask pattern corresponding to a chip.

【0005】[0005]

【課題を解決するための手段】本発明は、マスクRO
M,1チップマイコン等のLSIチップに搭載するRO
M部にデータを記録するため、ROM入力データとLS
Iチップ上ROM部のレイアウト情報よりレイアウト
し、マスクパターンを自動生成する工程で、予め、RO
M部レイアウト情報ライブラリおよびROMセル情報ラ
イブラリを用意しておき、これらのライブラリから所望
のROM部レイアウト情報およびROMセル情報をロー
ドしてROM部レイアウト処理とその後にROM部マス
クパターン生成とを行うことを特徴とする。
The present invention is a mask RO.
RO to be mounted on LSI chips such as M and 1-chip microcomputers
Since data is recorded in the M part, ROM input data and LS
In the process of laying out the layout information of the ROM section on the I chip and automatically generating a mask pattern, RO
M section layout information library and ROM cell information library are prepared, and desired ROM section layout information and ROM cell information are loaded from these libraries to perform ROM section layout processing and then ROM section mask pattern generation. Is characterized by.

【0006】[0006]

【作用】本発明では、各チップ毎のROM部レイアウト
情報およびROM部セル情報がライブラリとして提供さ
れるために、1つのROM部マスクパターン自動生成装
置に対して、必要な情報を上記ライブラリから読み出し
て設定することで各種のLSIチップのマスクパターン
出力を得ることができる。
According to the present invention, since the ROM layout information and the ROM cell information for each chip are provided as a library, necessary information is read from the library to one ROM mask pattern automatic generation device. The mask pattern output of various LSI chips can be obtained by setting the above.

【0007】図2は、本発明に係るROM部マスクパタ
ーン自動生成方法の手順を示している。
FIG. 2 shows the procedure of the method for automatically generating a mask pattern in the ROM section according to the present invention.

【0008】用意された入力データを読み込むと、次に
ライブラリとして用意されているROM部レイアウト情
報の中から必要なレイアウトを読み出してROM部レイ
アウト処理部に設定する。そして、その情報に基づくR
OM部レイアウト処理を行う。次に予め用意されている
ROMセル情報ライブラリの中から必要なROMセル情
報をマスクパターン生成部に設定し、マスクパターン生
成処理を行う。以上の処理を行ったのちマスクパターン
出力部にデータを出して終了する。
When the prepared input data is read, a necessary layout is read out from the ROM section layout information prepared as a library and set in the ROM section layout processing section. And R based on that information
OM layout processing is performed. Next, necessary ROM cell information is set in the mask pattern generation unit from the ROM cell information library prepared in advance, and mask pattern generation processing is performed. After the above processing is performed, the data is output to the mask pattern output unit and the process ends.

【0009】[0009]

【実施例】図3は、本発明による自動生成方法によって
マスクパターンを生成する具体例を示している。ROM
入力データはアドレスとデータの対の情報からなる。こ
の入力データが読みこまれると、続いてROM部レイア
ウト処理部にその入力データが渡される。この段階で、
ライブラリからROM部レイアウト情報としてX,Y軸
毎のROM部原点とROM部ピッチとROM部アドレス
順の各情報が読み出されて設定される。ROM部レイア
ウト処理が終了すると、続いてその出力がROM部マス
クパターン生成部に送られる。この段階では、ROM部
セル情報ライブラリからROM部セル情報が読み出され
て設定される。以上の処理を終えたのちROM部マスク
パターン出力部でマスクパターンを出力する。
FIG. 3 shows a concrete example of generating a mask pattern by the automatic generation method according to the present invention. ROM
The input data consists of address and data pair information. When this input data is read, the input data is subsequently passed to the ROM layout processing section. At this stage,
The ROM section origin information, ROM section pitch, and ROM section address order information for each of the X and Y axes are read out from the library and set. When the ROM section layout process is completed, the output is subsequently sent to the ROM section mask pattern generation section. At this stage, the ROM section cell information is read from the ROM section cell information library and set. After the above processing is completed, the mask pattern is output from the ROM mask pattern output unit.

【0010】[0010]

【発明の効果】本発明では、新規のチップに対応するに
は、ライブラリにそのチップに対応するレイアウト情報
およびセル情報を追加しておけばよいために、非常に管
理し易く、従来のように各チップ毎のROM部マスクパ
ターン自動生成装置を用意しなくてもよい。
According to the present invention, in order to deal with a new chip, it is sufficient to add layout information and cell information corresponding to the chip to the library. It is not necessary to prepare the ROM section mask pattern automatic generation device for each chip.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来のROM部マスクパターン自動生成方法を
示す図
FIG. 1 is a diagram showing a conventional method for automatically generating a mask pattern in a ROM section.

【図2】本発明に係るROM部マスクパターン自動生成
方法を示す図
FIG. 2 is a diagram showing a method for automatically generating a ROM mask pattern according to the present invention.

【図3】本発明の実施例を示す図FIG. 3 is a diagram showing an embodiment of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】マスクROM,1チップマイコン等のLS
Iチップに搭載するROM部にデータを記録するため、
ROM入力データとLSIチップ上ROM部のレイアウ
ト情報よりレイアウトし、マスクパターンを自動生成す
る工程で、予め、ROM部レイアウト情報ライブラリお
よびROMセル情報ライブラリを用意しておき、これら
のライブラリから所望のROM部レイアウト情報および
ROMセル情報をロードしてROM部レイアウト処理と
その後にROM部マスクパターン生成とを行うことを特
徴とする汎用ROM部マスクパターン自動生成方法。
1. An LS such as a mask ROM or a one-chip microcomputer
In order to record data in the ROM section mounted on the I-chip,
A ROM section layout information library and a ROM cell information library are prepared in advance in the process of laying out the ROM input data and the layout information of the ROM section on the LSI chip and automatically generating a mask pattern. A general-purpose ROM section mask pattern automatic generation method, characterized by loading section layout information and ROM cell information and performing ROM section layout processing and then ROM section mask pattern generation.
JP4080720A 1992-04-02 1992-04-02 Automatic generating method for mask pattern of general-purpose rom part Pending JPH05282400A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4080720A JPH05282400A (en) 1992-04-02 1992-04-02 Automatic generating method for mask pattern of general-purpose rom part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4080720A JPH05282400A (en) 1992-04-02 1992-04-02 Automatic generating method for mask pattern of general-purpose rom part

Publications (1)

Publication Number Publication Date
JPH05282400A true JPH05282400A (en) 1993-10-29

Family

ID=13726198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4080720A Pending JPH05282400A (en) 1992-04-02 1992-04-02 Automatic generating method for mask pattern of general-purpose rom part

Country Status (1)

Country Link
JP (1) JPH05282400A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0684571A2 (en) * 1994-05-23 1995-11-29 Winbond Electronics Corporation Automatic code pattern generator for integrated circuit layout

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0684571A2 (en) * 1994-05-23 1995-11-29 Winbond Electronics Corporation Automatic code pattern generator for integrated circuit layout
EP0684571A3 (en) * 1994-05-23 1996-08-28 Winbond Electronics Corp Automatic code pattern generator for integrated circuit layout.

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