JPH05273532A - Liquid crystal element - Google Patents

Liquid crystal element

Info

Publication number
JPH05273532A
JPH05273532A JP4358844A JP35884492A JPH05273532A JP H05273532 A JPH05273532 A JP H05273532A JP 4358844 A JP4358844 A JP 4358844A JP 35884492 A JP35884492 A JP 35884492A JP H05273532 A JPH05273532 A JP H05273532A
Authority
JP
Japan
Prior art keywords
substrate
substrates
liquid crystal
thermal expansion
crystal element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4358844A
Other languages
Japanese (ja)
Inventor
Teruhiko Furushima
輝彦 古島
Mamoru Miyawaki
守 宮脇
Shigetoshi Sugawa
成利 須川
Moriyuki Okamura
守之 岡村
Masaru Kamio
優 神尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP4358844A priority Critical patent/JPH05273532A/en
Publication of JPH05273532A publication Critical patent/JPH05273532A/en
Priority to US08/312,172 priority patent/US5644373A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13454Drivers integrated on the active matrix substrate

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)

Abstract

PURPOSE:To lessen the influence of a heat history in a process for assembling substrates and to lessen the restriction on the process temp. in the process by confining the difference in the coefft. of thermal expansion between the two substrates within a specific value. CONSTITUTION:Two sheets of the substrates are disposed to face each other at a desired spacing and a liquid crystal is encapsulated therebetween. The materials of these two substrates vary and the difference in the coefft. of thermal expansion of these substrates is confined within + or -50% of the coefft. of thermal expansion of the one substrate. A thermosetting adhesive 2 is formed by screen printing on the substrate 1 in such a case. On the other hand, resin balls 3 of 7mu spherical diameter for maintaining the prescribed inter-substrate spacing are sprayed onto the substrate 1' and thereafter, an ultraviolet curing adhesive 6 is applied by a precision discharger to the prescribed position exclusive of the region to be used as a liquid crystal display in the final. The two substrates are then superposed on each other in the prescribed position while the marks for superposing formed on both substrates at the time of forming electrodes thereon are checked with a microscope by using a superposing device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、液晶表示装置(LC
D)や液晶プリンター用の液晶光バルブ(LCLV)等
に用いられる液晶素子に関する。
BACKGROUND OF THE INVENTION The present invention relates to a liquid crystal display device (LC
D) and a liquid crystal element used for a liquid crystal light valve (LCLV) for a liquid crystal printer.

【0002】[0002]

【従来の技術】一般的な液晶素子は2つの基板間に液晶
材料を挟持させ、該基板の周辺部を封止剤で封止した構
造を有している。
2. Description of the Related Art A general liquid crystal element has a structure in which a liquid crystal material is sandwiched between two substrates and the peripheral portion of the substrates is sealed with a sealant.

【0003】従来は該2つの基板として、同種類の基板
が使用されていた。一方、アクティブマトリクスLCD
のようにTFT基板として、Siウェハを使用した場合
には、Siウェハが非光透過性であるため他方の基板と
して同じSiウェハを使用することが出来ず、、代わり
に透明基板を使用していた。また、TFT基板としてS
iウェハではなく石英ガラスを使用する場合にも他方の
基板には生産コストを考慮して安価な透明基板を使用し
ていた。
Conventionally, substrates of the same type have been used as the two substrates. On the other hand, active matrix LCD
When a Si wafer is used as the TFT substrate as described above, the same Si wafer cannot be used as the other substrate because the Si wafer is non-light transmissive, and a transparent substrate is used instead. It was Also, as a TFT substrate, S
Even when quartz glass is used instead of the i-wafer, an inexpensive transparent substrate is used as the other substrate in consideration of production costs.

【0004】[0004]

【発明が解決しようとする課題】しかし、低アルカリガ
ラスとして一般に使用されているコーニング社製#70
59は熱膨張係数がSiウェハと大きく異なり、両基板
を貼り合わせて熱硬化を行った場合には、熱歪が残り、
セルのそり等の問題が発生し良好な液晶素子を製作する
ことが難しく歩留りの向上を妨げる一つの要因になって
いた。
However, Corning # 70, which is commonly used as a low alkali glass, is used.
No. 59 has a thermal expansion coefficient greatly different from that of the Si wafer, and when both substrates are bonded and thermoset, thermal strain remains,
Problems such as cell warpage occur and it is difficult to manufacture a good liquid crystal device, which is one of the factors that hinder the improvement of yield.

【0005】一方、液晶素子に、望まれる高性能を充分
に発揮させる為には、必要に応じて異なる材料(組成や
結晶構造が異なるものも含む)の基板を用いなければな
らない。
On the other hand, in order for the liquid crystal element to sufficiently exhibit the desired high performance, it is necessary to use substrates of different materials (including those having different compositions and crystal structures) as needed.

【0006】[0006]

【発明の目的】本発明の目的は、上述した技術的課題を
解決するものであり、2つの基板における熱歪による悪
影響が生じにくい液晶素子を提供することにある。
SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned technical problems and to provide a liquid crystal element in which adverse effects due to thermal strain on two substrates are unlikely to occur.

【0007】本発明の別の目的は、異なる材料の2つの
基板を用いた高性能な液晶素子の製造歩留りを向上さ
せ、液晶素子を安価に提供することにある。
Another object of the present invention is to improve the manufacturing yield of a high-performance liquid crystal device using two substrates made of different materials and to provide the liquid crystal device at a low cost.

【0008】[0008]

【課題を解決するための手段及び作用】本発明の目的
は、2枚の基板を所望の間隔で対向させ、その間に液晶
を封入した液晶素子に於いて、該2つの基板の材料が異
なり、その基板の熱膨張係数の差が一方の基板の熱膨張
係数の±50%以内であることを特徴とする液晶素子に
より達成される。
SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal device in which two substrates are opposed to each other at a desired interval and liquid crystal is sealed between them, and the materials of the two substrates are different from each other. This is achieved by a liquid crystal element characterized in that the difference in the coefficient of thermal expansion of the substrates is within ± 50% of the coefficient of thermal expansion of one of the substrates.

【0009】本発明によれば、いかなる使用環境下にお
いても基板のずれや液晶セルのずれが生じ難くなり、
又、製造時においても上記ずれの発生に基く歩留りの低
下を防ぐことができる。
According to the present invention, the displacement of the substrate or the displacement of the liquid crystal cell is less likely to occur under any use environment,
In addition, it is possible to prevent a decrease in yield due to the occurrence of the above deviation even during manufacturing.

【0010】[0010]

【好適な実施態様の説明】本発明に用いられる基板の組
み合わせとしては、互いの熱膨張係数の差が±50%以
内のものであり、より好ましくは±10%以内のもので
あり、最適には±5%以内であることが望ましい。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The combination of substrates used in the present invention is such that the difference in the coefficient of thermal expansion between them is within ± 50%, more preferably within ± 10%, and most preferably Is preferably within ± 5%.

【0011】具体的には、一方の基板としてSiウェハ
(227℃での熱膨張係数:36.1×10-7/℃)を
用いる場合には、コーニング社製#1733(36.5
×10-7/℃)、コーニング社製#1729(35×1
-7/℃)、旭硝子社製AL(37×10-7/℃)、N
Hテクノグラス社製NA−35(37×10-7/℃)、
等から選択される1つのガラスが挙げられる。
Specifically, when a Si wafer (coefficient of thermal expansion at 227 ° C .: 36.1 × 10 -7 / ° C.) is used as one of the substrates, Corning # 1733 (36.5) is used.
× 10 −7 / ° C.), Corning # 1729 (35 × 1)
0 -7 / ° C), Asahi Glass Co. AL (37 x 10 -7 / ° C), N
NA-35 (37 × 10 −7 / ° C.) manufactured by H Techno Glass Co.,
One glass selected from the following.

【0012】本発明において、熱膨張係数の測定は、試
料と石英ガラスでつくった標準体との膨張差を温度との
関連に於いて測定する示差膨張計にて測定することがで
きる。
In the present invention, the coefficient of thermal expansion can be measured by a differential expansion meter which measures the difference in expansion between the sample and the standard body made of quartz glass in relation to the temperature.

【0013】そして、熱膨張に伴う変位を測定する方法
に、ダイヤルゲージによる方法、差動トランスによる方
法が一般的に使用されている。
A method using a dial gauge and a method using a differential transformer are generally used as a method of measuring the displacement due to thermal expansion.

【0014】一例を挙げるなら6インチSiウェハを使
用し、セル組プロセス温度を25℃から200℃とした
場合の伸び量は、SiWaferは94.9μ、ALは
97.1μであり、Siウェハとの差は2.2μと非常
に小さく画素ズレを起こしづらいことが分かる。一方、
従来一般に使用されている#7059の伸び量は12
3.4μでありSiウェハとの差は29μと非常に大き
い。
As an example, when a 6-inch Si wafer is used and the cell assembly process temperature is changed from 25 ° C. to 200 ° C., the amount of elongation is 94.9 μ for SiWafer and 97.1 μ for AL. It can be seen that the difference between the two is as very small as 2.2 μ and that pixel deviation is unlikely to occur. on the other hand,
Conventionally commonly used # 7059 has an elongation of 12
The difference from the Si wafer is 3.4 μ, which is very large at 29 μ.

【0015】そして、上記基板を光透過型の液晶素子に
用いる場合には、一方の基板として透明な石英ガラスを
用いることが望ましい。逆に、高性能なアクティブ素子
を有するアクティブマトリクス型の液晶素子とする場合
には石英ガラスでもよいが、一方の基板として不透明な
Siウェハ等の半導体基板を用いることがより望まし
い。
When the above substrate is used for a light transmission type liquid crystal element, it is desirable to use transparent quartz glass as one substrate. On the contrary, in the case of an active matrix type liquid crystal element having a high performance active element, quartz glass may be used, but it is more preferable to use an opaque semiconductor substrate such as an Si wafer as one substrate.

【0016】更に、高性能なアクティブ素子を有するア
クティブマトリクス型で且つ光透過型の液晶素子とする
場合には半導体基板上に透光性の絶縁膜を形成し、該膜
の下にある基板の一部分を除去した部分透過型の半導体
基板を用いることが望ましい。ここで、部分透過型の基
板について説明しておく。図1は部分透過型の基板10
0を示す模式的断面図であり、ここで110が光透過
部、111が不透光部である。このような基板100は
光透過部110を構成する為の光透過層104と不透光
層107とを含み、それぞれの膜厚はTSI>TOXの関係
にある。光透過層104としてはシリコン酸化膜やシリ
コン窒化膜或いはそれらの積層膜等の絶縁層が好ましく
用いられる。
Further, in the case of an active matrix type and light transmissive liquid crystal element having a high performance active element, a translucent insulating film is formed on a semiconductor substrate, and a substrate under the film is formed. It is desirable to use a partially transmissive semiconductor substrate with a part removed. Here, the partially transmissive substrate will be described. FIG. 1 shows a partially transmissive substrate 10.
FIG. 2 is a schematic cross-sectional view showing 0, where 110 is a light transmitting portion and 111 is a non-light transmitting portion. Such a substrate 100 includes a light transmitting layer 104 and an opaque layer 107 for forming the light transmitting portion 110, and the respective film thicknesses have a relationship of T SI > T OX . As the light transmission layer 104, an insulating layer such as a silicon oxide film, a silicon nitride film, or a laminated film thereof is preferably used.

【0017】一方、不透光層107としてはシリコン等
の半導体層が好ましく用いられる。そして光透過層10
4上には液晶素子を形成する為の電極、配線更には必要
に応じて配向膜やアクティブ素子が設けられる。
On the other hand, as the opaque layer 107, a semiconductor layer such as silicon is preferably used. And the light transmission layer 10
Electrodes for forming a liquid crystal element, wirings, and if necessary, an alignment film and an active element are provided on the surface 4.

【0018】図2は図1に示した基板100上に液晶材
料206を介して他方の基板200を設けた液晶素子を
示す模式的断面図である。ここで基板100の主たる支
持部分である不透光層107と基板200との熱膨張係
数の差は一方の基板の50%以内、望ましくは10%以
内、最適には5%以内とする。
FIG. 2 is a schematic sectional view showing a liquid crystal element in which the other substrate 200 is provided on the substrate 100 shown in FIG. 1 with the liquid crystal material 206 interposed therebetween. Here, the difference in the coefficient of thermal expansion between the opaque layer 107, which is the main supporting portion of the substrate 100, and the substrate 200 is within 50% of one substrate, preferably within 10%, and optimally within 5%.

【0019】更に望ましくは液晶素子を構成する為に、
アクティブ素子としての薄膜トランジスタや走査電極配
線及び信号電極配線を含むアクティブマトリクス部20
4や、該マトリクス部を駆動する為の周辺回路部203
等が、基板100上に設けられている。又、201,2
02は封止部材である。このうち202は液晶206の
封止部材であり、201は周辺回路部203を封止する
為の封止部材である。そして封止部材201,202は
それぞれ不透光層107上にある。
More preferably, in order to form a liquid crystal element,
Active matrix portion 20 including thin film transistors as active elements, scan electrode wiring, and signal electrode wiring
4 and peripheral circuit section 203 for driving the matrix section
Etc. are provided on the substrate 100. Also, 201,2
Reference numeral 02 is a sealing member. Of these, 202 is a sealing member for the liquid crystal 206, and 201 is a sealing member for sealing the peripheral circuit portion 203. The sealing members 201 and 202 are on the non-translucent layer 107, respectively.

【0020】本発明の一つの実施態様である図2に示す
液晶素子においては、両基板(100,200)の間に
アクティブマトリクス部204だけでなく周辺回路部2
03の半導体素子も介在している為に両基板が周辺回路
の保護部材となっている。
In the liquid crystal element shown in FIG. 2, which is one embodiment of the present invention, not only the active matrix section 204 but also the peripheral circuit section 2 is provided between both substrates (100, 200).
Since the semiconductor device No. 03 is also interposed, both substrates serve as protective members for peripheral circuits.

【0021】[0021]

【実施例】以下、本発明の各実施例について説明する
が、本発明はこれらの各実施例に限定されることはな
く、本発明の目的を達成する範囲内での各構成要素の設
計変更や各部材の置換がなされたものをも含む。
EXAMPLES Hereinafter, each example of the present invention will be described, but the present invention is not limited to these examples, and design changes of each component within the scope of achieving the object of the present invention. It also includes those in which each member is replaced.

【0022】(実施例1)図3(a)〜(d)は、本発
明による実施例1の液晶素子を作製する為の方法を示し
ている。一方の基板としてTFT付のSiウェハ、対向
基板としてSiウェハに対して熱膨張係数の差が5%以
内のガラス(旭硝子社製AL)を使用する。
Example 1 FIGS. 3A to 3D show a method for producing a liquid crystal device of Example 1 according to the present invention. A glass having a difference in thermal expansion coefficient of 5% or less with respect to the Si wafer with TFT as one substrate and the Si wafer as the opposite substrate (AL manufactured by Asahi Glass Co., Ltd.) is used.

【0023】本実施例によれば、以下に詳述するように
UV硬化型樹脂を基板上に仮止めし、位置ズレを防止し
ながら熱硬化型樹脂による封止剤を熱硬化で完全に硬化
させる。これにより、基板の熱膨張係数の差が明らかに
±50%以内であることとUV硬化型樹脂の仮止めの2
つの硬化により位置ズレ(アライメントズレ)の防止が
可能となる。
According to the present embodiment, as described in detail below, the UV curable resin is temporarily fixed on the substrate, and the encapsulant made of the thermosetting resin is completely cured by thermosetting while preventing misalignment. Let As a result, the difference in the coefficient of thermal expansion of the substrate is clearly within ± 50%, and 2
It is possible to prevent misalignment (alignment misalignment) by curing one.

【0024】まず、図3(a)のように基板1’上の所
定の位置に封止の為の所定の厚みを保つため、粒径6μ
のスペーサー(不図示)を配置する。熱硬化接着剤(封
止剤)2をスクリーン印刷で基板1上に形成する。一
方、基板1’上に、所定の基板間隔を保つための球径7
μの樹脂ボール(スペーシング材)3を散布した後、精
密吐出装置により、最終的に液晶ディスプレイとして使
用される領域外の所定の位置に紫外線硬化型接着剤6を
約0.5mm2 塗布する。次に、重ね合わせ装置を用い
て図3(b)のように双方の基板に電極形成時に形成さ
れた重ね合わせ用マーク(不図示)を顕微鏡で確認しな
がら、所定の位置で重ね合わせる。位置決め完了後、図
3(c)のように矢印4の方向に0.5kgf/cm2
程の圧力で基板全域に均一にプレスする。シール剤の厚
みがほぼ所定の厚みとなった時、再度重ね合わせ用マー
クを確認しながらプレス装置に切り欠いた紫外線照射用
すき間から照射域φ10mm程のスポット露光装置を用
いて、塗布した紫外線硬化型接着剤6へ紫外線7を照射
し、接着剤6を硬化させる。前記、重ね合わせ→位置決
め→プレス→紫外線照射、の工程は同一装置内で処理さ
れる。次に、重ね合わせの位置を確認し、固定された2
枚の基板を加熱プレス装置を用いて図1(d)に示すよ
うに0.5kgf/cm2 程の圧力4’下でヒーター8
にて170(℃)に加熱し、シール剤を硬化させる。
First, as shown in FIG. 3A, in order to maintain a predetermined thickness for sealing at a predetermined position on the substrate 1 ', a grain size of 6 μm is used.
Place the spacer (not shown). A thermosetting adhesive (sealant) 2 is formed on the substrate 1 by screen printing. On the other hand, on the substrate 1 ', a spherical diameter 7 for maintaining a predetermined substrate space
After spraying the resin balls (spacing material) 3 of μ, the ultraviolet curable adhesive 6 is applied to a predetermined position outside the area finally used as a liquid crystal display by a precision discharge device by about 0.5 mm 2 . .. Next, as shown in FIG. 3 (b), superposition marks (not shown) formed at the time of forming electrodes on both substrates are superposed at a predetermined position by using a superposition device while observing with a microscope. After the positioning is completed, as shown in FIG. 3C, 0.5 kgf / cm 2 in the direction of arrow 4.
Press uniformly over the entire substrate with moderate pressure. When the thickness of the sealant reaches almost the specified value, while checking the overlay mark again, the UV curing applied using a spot exposure device with an irradiation area of about 10 mm from the UV irradiation gap cut out in the press The mold adhesive 6 is irradiated with ultraviolet rays 7 to cure the adhesive 6. The steps of superimposing → positioning → press → ultraviolet irradiation are processed in the same apparatus. Next, check the position of the stack and
The substrate is heated by a heater 8 under a pressure 4 ′ of about 0.5 kgf / cm 2 using a heating press device as shown in FIG. 1 (d).
At 170 ° C., the sealant is cured.

【0025】(実施例2)図4は、本発明の実施例2に
よる液晶素子の部分的な断面図であり、本実施例2はカ
ラー液晶表示装置への応用に関するものである。TFT
付の基板として、Siウェハ、対向基板として熱膨張係
数の差が±5%以内のガラス(NHテクノグラス社製N
A−35)を使用した。本実施例2では対向基板11上
にカラーフィルター層14を下記a,b,c,dからな
る工程を5回繰り返してR,G,Bをそれぞれ形成す
る。 工程a:染色基材をスピンコート法にて全面に形成し、
所定のパターンにする。 工程b:所定の分光特性を有する染料で着色する。 工程c:保護膜を基板全面にスピンコート法にて形成す
る。 工程d:保護膜14aをパターニングして、周辺のシー
ル剤15が接する領域(以下シールエリアとする。)の
保護膜を除去する。
(Embodiment 2) FIG. 4 is a partial sectional view of a liquid crystal element according to Embodiment 2 of the present invention, and Embodiment 2 relates to application to a color liquid crystal display device. TFT
The attached substrate is a Si wafer, and the opposite substrate is glass with a difference in thermal expansion coefficient of ± 5% or less (NH Techno Glass Co., Ltd.
A-35) was used. In the second embodiment, the color filter layer 14 is formed on the counter substrate 11 by repeating the following steps of a, b, c and d five times to form R, G and B, respectively. Step a: forming a dyed substrate on the entire surface by spin coating,
Make a predetermined pattern. Step b: Color with a dye having a predetermined spectral characteristic. Step c: A protective film is formed on the entire surface of the substrate by spin coating. Step d: The protective film 14a is patterned to remove the protective film in a region (hereinafter referred to as a seal area) in contact with the peripheral sealing agent 15.

【0026】次に該カラーフィルター層14及び保護膜
14a上にITOをスパッタ法により形成し共通電極1
6とする。
Next, a common electrode 1 is formed by forming ITO on the color filter layer 14 and the protective film 14a by a sputtering method.
6

【0027】前記保護膜の形成法は、パターニングに限
るものではなく、シールエリアに保護膜が形成されなけ
ればよく、たとえばロールコート法、スクリーン印刷
法、マスク蒸着法、マスクスパッタ法などがある。
The method of forming the protective film is not limited to patterning and may be any method as long as the protective film is not formed in the seal area, and examples thereof include a roll coating method, a screen printing method, a mask vapor deposition method and a mask sputtering method.

【0028】一方、基板13上にはTFTに接続された
画素電極12が形成される。
On the other hand, the pixel electrode 12 connected to the TFT is formed on the substrate 13.

【0029】そして上記一対の基板それぞれに配向膜1
7をロールコート法または各種の印刷法により形成した
後ラビング処理を行なう。
The alignment film 1 is formed on each of the pair of substrates.
After forming No. 7 by a roll coating method or various printing methods, rubbing treatment is performed.

【0030】そして、一方の基板上にシール剤15とし
てスペーサ18を混入した紫外線硬化型樹脂をスクリー
ン印刷により形成する。次に前記一対の基板を貼り合わ
せ、押圧した後、紫外線を照射してシール剤を硬化さ
せ、液晶セルを形成し、液晶19を封入して液晶表示パ
ネルを得る。
Then, an ultraviolet curable resin mixed with a spacer 18 as a sealant 15 is formed on one of the substrates by screen printing. Next, the pair of substrates are bonded together, pressed, and then irradiated with ultraviolet rays to cure the sealant to form a liquid crystal cell, and the liquid crystal 19 is sealed therein to obtain a liquid crystal display panel.

【0031】以上説明した本実施例2において、基板の
選定により基板や画素の位置ズレを防止でき、更にカラ
ーフィルター層をシール剤が接する部分を除いて形成
し、シール剤を直接共通電極と接したことより、スペー
サーがカラーフィルター層中にくい込むことがなくな
り、液晶のセルギャップのコントロールが容易になる。
また、カラーフィルター層による紫外線の吸収がなくな
り、紫外線硬化型のシール剤を短時間で硬化させること
ができるようになり、シール剤の未硬化を防止させるこ
とができる。さらにシール剤の密着性も向上し、信頼性
が大巾に改善される。
In the second embodiment described above, it is possible to prevent the positional deviation of the substrate and the pixel by selecting the substrate, and further, the color filter layer is formed except for the portion in contact with the sealant, and the sealant is directly contacted with the common electrode. As a result, the spacer is not easily embedded in the color filter layer, and the cell gap of the liquid crystal can be easily controlled.
Further, the absorption of ultraviolet rays by the color filter layer is eliminated, the ultraviolet-curable sealing agent can be cured in a short time, and the uncured sealing agent can be prevented. Further, the adhesiveness of the sealant is also improved, and the reliability is greatly improved.

【0032】(実施例3)本実施例3は前記実施例1の
変形例である。
(Third Embodiment) The third embodiment is a modification of the first embodiment.

【0033】本実施例3は、TFT基板1’としてSi
ウェハ、対向基板1として熱膨張係数の差が±5%以内
のガラス(コーニング社製#1733)を使用し、シー
ル剤としてUV硬化型樹脂を使用し、スペーサをシール
部のみに混合した(画素部にはスペーシング材3は散布
しない)以外は実施例1と同様にして、セル組を行なう
ものである。本実施例によれば、基板の選定により位置
ズレが防止できると共に、シール剤をUV硬化樹脂のみ
とすることによりセル組時の加熱条件が緩和される。ま
た、スペーサをシール剤のみに混合し、表示部に散布し
ない為表示品位が向上する。
In the third embodiment, the TFT substrate 1'is made of Si.
As the wafer and the counter substrate 1, glass having a difference in coefficient of thermal expansion of ± 5% or less (# 1733 manufactured by Corning Co., Ltd.) was used, a UV curable resin was used as a sealant, and a spacer was mixed only in the seal part (pixels. A cell assembly is carried out in the same manner as in Example 1 except that the spacing material 3 is not sprinkled on the parts. According to the present embodiment, misalignment can be prevented by selecting the substrate, and the heating condition at the time of cell assembly can be eased by using only the UV curing resin as the sealant. In addition, the display quality is improved because the spacer is mixed only with the sealant and is not scattered on the display part.

【0034】(実施例4)本実施例4は厚さ0.5μの
コーニング社製#1727(熱膨張係数:44×10-7
/℃)に所定の電極を形成後に、電極を形成していない
面にエポキシ樹脂で厚さ0.5μのコーニング社製#1
733(熱膨張係数:36.5×10-7/℃)を接着し
た対向基板の、#1727側をSiウェハよりなるTF
T基板側としてセル組を行なうものである。本実施例に
よれば、対向基板として熱膨張係数が異なるガラスを貼
り合せ、Siウェハより+側の熱膨張係数を有するガラ
スとすることにより、セル組後にSiウェハにかかる応
力を引張り応力とすることができる。
(Embodiment 4) In this embodiment 4, Corning # 1727 (coefficient of thermal expansion: 44 × 10 −7 ) having a thickness of 0.5 μm is used.
/ ° C) and then a predetermined electrode is formed on the surface on which no electrode is formed with an epoxy resin and a thickness of 0.5 μ is manufactured by Corning Co.
TF made of Si wafer on the # 1727 side of the counter substrate to which 733 (coefficient of thermal expansion: 36.5 × 10 −7 / ° C.) is bonded.
The cell set is performed on the T substrate side. According to the present embodiment, glass having a different thermal expansion coefficient is bonded as the opposite substrate to obtain glass having a thermal expansion coefficient on the + side of the Si wafer, so that the stress applied to the Si wafer after the cell assembly is used as the tensile stress. be able to.

【0035】以上説明した各実施例においてはTFT付
の基板としてSiウェハ以外に石英ガラスを用いること
ができる。しかし、特に好ましいのは、図5に示す方法
により製造されたSi基板である。該Si基板は経済性
に優れて、大面積に渡り均一平坦な極めて優れた結晶性
を有するSi単結晶基板であり、半導体アクティブ素子
が、欠落の著しく少ないSi単結晶層上に作成されてい
るため、上記半導体素子の浮遊容量が低減し、高速動作
が可能で、ラッチアップ現象等のない、耐放射線特性の
優れた素子及び回路を液晶画像表示画素と同一基板上に
集積した高性能な液晶表示体を提供できる。
In each of the embodiments described above, quartz glass can be used as the substrate with the TFT in addition to the Si wafer. However, particularly preferred is a Si substrate manufactured by the method shown in FIG. The Si substrate is a Si single crystal substrate which is excellent in economy and has an extremely excellent crystallinity which is uniform and flat over a large area, and a semiconductor active element is formed on a Si single crystal layer having a significantly small number of defects. Therefore, the stray capacitance of the semiconductor element is reduced, high-speed operation is possible, and a high-performance liquid crystal in which elements and circuits excellent in radiation resistance without latch-up phenomenon are integrated on the same substrate as the liquid crystal image display pixel. A display can be provided.

【0036】以下に、図5に従い該Si基板の製造方法
の一例を説明する。
An example of the method for manufacturing the Si substrate will be described below with reference to FIG.

【0037】300ミクロンの厚みを持ったP型(10
0)単結晶Si基板にHF溶液中において陽極化成を施
し、多孔質Si基板を形成する。
A P-type (10
0) A single crystal Si substrate is anodized in an HF solution to form a porous Si substrate.

【0038】上記陽極化成条件は以下のとおりであっ
た。
The above anodization conditions were as follows.

【0039】印加電圧: 2.6 (V) 電流密度: 30 (mA・cm-2) 陽極化成溶液: HF:H2 O:C25 OH=1:
1:1 時間: 2.4 (時間) 多孔質Siの厚み:300 (μm) Porosity: 56 (%) こうして得られたP型(100)多孔質Si基板101
上に減圧CVD法により、Siエピタキシャル層102
を1.0ミクロンの層厚で成長させる。堆積条件は、以
下のとおりである。
Applied voltage: 2.6 (V) Current density: 30 (mA · cm -2 ) Anodizing solution: HF: H 2 O: C 2 H 5 OH = 1:
1: 1 time: 2.4 (hour) Porous Si thickness: 300 (μm) Porosity: 56 (%) P-type (100) porous Si substrate 101 thus obtained
The Si epitaxial layer 102 is formed on the upper surface by low pressure CVD.
Are grown with a layer thickness of 1.0 micron. The deposition conditions are as follows.

【0040】ソースガス: SiH4 キャリヤーガス: H2 温度: 850℃ 圧力: 1×10-2Torr 成長速度: 3.3nm/sec 次に、このエピタキシャル層102の表面に1000オ
ングストロームの酸化層103を形成し、その酸化表面
に、表面に5000オングストロームの酸化層104、
1000オングストロームの窒化層105を形成したも
う一方のSi基板107を重ね合せ、窒素雰囲気中で8
00℃、0.5時間加熱することにより、2つのSi基
板を、強固に貼り合せる。
Source gas: SiH 4 carrier gas: H 2 Temperature: 850 ° C. Pressure: 1 × 10 -2 Torr Growth rate: 3.3 nm / sec Next, a 1000 angstrom oxide layer 103 is formed on the surface of the epitaxial layer 102. Forming an oxide layer 104 of 5000 angstroms on the surface,
The other Si substrate 107 on which the nitride layer 105 of 1000 angstrom is formed is laid on top of one another and placed in a nitrogen atmosphere for 8 hours.
By heating at 00 ° C. for 0.5 hour, the two Si substrates are firmly bonded together.

【0041】その後、該貼り合わせた基板を49%弗酸
とアルコールと30%過酸化水素水との混合液(10:
6:50)中で撹拌することなく選択エッチングした。
65分後には、非多孔質Si層だけがエッチングされず
に残り、単結晶Siをエッチ・ストップの材料として、
多孔質Si基板101は選択エッチングされ、完全に除
去された。非多孔質Si単結晶の該エッチング液にたい
するエッチング速度は、極めて低く65分後でもエッチ
ング層は50オングストローム以下であり、多孔質層の
エッチング速度との選択比は十の五乗以下にも達し、非
多孔質層におけるエッチング量(数十オングストロー
ム)は実用上無視できる程度のものである。こうする
と、200ミクロンの厚みをもった多孔質化されたSi
基板101は、除去され、SiO2 103上に1.0μ
mの厚みを持った単結晶Si層102が形成できる。ソ
ースガスとして、SiH2 Clを用いた場合には、成長
温度を数十度上昇させる必要があるが、多孔質基板に特
有な増速エッチング特性は、維持される。
Then, the bonded substrates are mixed with a mixed solution of 49% hydrofluoric acid, alcohol and 30% hydrogen peroxide (10:
The selective etching was carried out in the 6:50) without stirring.
After 65 minutes, only the non-porous Si layer remains without being etched, and the single crystal Si is used as an etch stop material.
The porous Si substrate 101 was selectively etched and completely removed. The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, the etching layer is 50 angstroms or less even after 65 minutes, and the selectivity with the etching rate of the porous layer reaches 10 5 or less, The etching amount (tens of angstroms) in the non-porous layer is practically negligible. In this way, porous Si having a thickness of 200 microns is obtained.
Substrate 101 was removed and 1.0 μ on SiO 2 103
A single crystal Si layer 102 having a thickness of m can be formed. When SiH 2 Cl is used as the source gas, it is necessary to raise the growth temperature by several tens of degrees, but the enhanced etching characteristic peculiar to the porous substrate is maintained.

【0042】上記単結晶シリコン薄膜102にTFTを
形成し、そののちSi基板側に液晶画素部の直下を除い
て耐弗酸性ゴムを被覆し、弗酸、酢酸、硝酸の混合液を
用いて、絶縁層までシリコン基板を部分的に除去し、光
透過部110を形成する。
A TFT is formed on the single-crystal silicon thin film 102, and thereafter, a Si substrate side is covered with a hydrofluoric acid resistant rubber except under the liquid crystal pixel portion, and a mixed solution of hydrofluoric acid, acetic acid and nitric acid is used. The silicon substrate is partially removed up to the insulating layer to form the light transmission part 110.

【0043】こうして図5の(d)に示すようなTFT
付基板を作製する。
Thus, the TFT as shown in FIG.
The attached substrate is produced.

【0044】(実施例5)図6は本発明の実施例5によ
る液晶素子の作製方法を説明する為の模式図である。
(Embodiment 5) FIG. 6 is a schematic view for explaining a method of manufacturing a liquid crystal element according to Embodiment 5 of the present invention.

【0045】本発明は石英ガラスのような光透過基板又
はSiウェハのような不透光基板を一方の基板とし、対
向基板として、上記石英ガラス又はSiウェハとの間の
熱膨張係数の差が±5%以内となる熱膨張係数を有する
光透過基板を用いるものである。しかも一方の基板上に
は半導体の島状領域が複数設けられ、そこにTFT等の
アクティブ素子が形成される。
In the present invention, a light-transmitting substrate such as quartz glass or an opaque substrate such as Si wafer is used as one substrate, and the opposite substrate has a difference in coefficient of thermal expansion from the quartz glass or Si wafer. A light-transmitting substrate having a thermal expansion coefficient within ± 5% is used. Moreover, a plurality of semiconductor island regions are provided on one substrate, and active elements such as TFTs are formed therein.

【0046】図6の工程(a)に示すように単結晶基板
の一部を多孔質化するか、多孔質半導体基板上に半導体
層をエピタキシャル成長させるか、のいずれかの方法で
多孔質層101上に半導体層を有する基体を用意する。
As shown in step (a) of FIG. 6, the porous layer 101 is formed by either partially making the single crystal substrate porous or epitaxially growing a semiconductor layer on the porous semiconductor substrate. A substrate having a semiconductor layer thereon is prepared.

【0047】一方、図6の工程(a)に示すように石英
ガラスからなる基板か、又はシリコンウェハ上に絶縁膜
を有する基板を用意する。そして図6の工程(b)に示
すように上述した両基板を貼り合わせる。ここで104
は絶縁層であり、これは石英ガラスの時は基板107の
一部の領域であり、Siウェハの場合は表面に形成した
酸化シリコン膜に対応する。
On the other hand, as shown in step (a) of FIG. 6, a substrate made of quartz glass or a substrate having an insulating film on a silicon wafer is prepared. Then, as shown in step (b) of FIG. 6, the above-mentioned both substrates are bonded together. Where 104
Is an insulating layer, which is a partial region of the substrate 107 in the case of quartz glass, and corresponds to the silicon oxide film formed on the surface in the case of a Si wafer.

【0048】次に、図6の工程(c)に示すように選択
エッチングにより多孔質層101をエッチングにより除
去する。フッ酸とアルコールと過酸化水素水との混合液
はエッチャントとして、多孔質層101と半導体層(多
孔質でない)102との選択比が大きくとれるものであ
り、上記選択エッチングを可能にする。
Next, as shown in step (c) of FIG. 6, the porous layer 101 is removed by etching by selective etching. A mixed liquid of hydrofluoric acid, alcohol, and hydrogen peroxide water, which serves as an etchant, can provide a large selection ratio between the porous layer 101 and the semiconductor layer (not porous) 102, and enables the selective etching.

【0049】図6の工程(d)に示すように得られた半
導体層102に素子分離領域210を形成し、アクティ
ブマトリクスを構成するアクティブ素子を領域204
に、周辺回路を構成する素子を領域203に形成する。
Element isolation regions 210 are formed in the semiconductor layer 102 obtained as shown in step (d) of FIG. 6, and active elements constituting the active matrix are formed in the regions 204.
Then, elements forming peripheral circuits are formed in the region 203.

【0050】次いで、図6の工程(e)に示すように基
板107とほぼ同じ面積(平面積)を有する対向基板2
00としてガラスをシール剤202を介して貼り合わせ
る。そして、基板200と基板107との間に液晶材料
206を注入して封入する。ここで、基板200は基板
107とほぼ同じ表面積を有しているので基板200の
端部が領域203上に位置して周辺回路の保護層として
の役割を果たしている。
Next, as shown in step (e) of FIG. 6, the counter substrate 2 having substantially the same area (planar area) as the substrate 107.
Glass is bonded as 00 through the sealant 202. Then, the liquid crystal material 206 is injected and sealed between the substrate 200 and the substrate 107. Here, since the substrate 200 has substantially the same surface area as the substrate 107, the end portion of the substrate 200 is located on the region 203 and serves as a protective layer for peripheral circuits.

【0051】図7は図6の工程(e)における基板10
7と基板200との貼り合わせ工程を説明する為の模式
的上面図である。
FIG. 7 shows the substrate 10 in the step (e) of FIG.
7 is a schematic top view for explaining the step of attaching 7 and the substrate 200. FIG.

【0052】勿論基板としてSiウェハを用いて光透過
型の液晶素子を作製する場合には、図1や図2に示すよ
うに基板107の一部分を除去して、光透過部を形成す
ればよい。
Of course, when a light transmissive liquid crystal element is manufactured using a Si wafer as a substrate, a part of the substrate 107 may be removed to form a light transmissive portion as shown in FIGS. ..

【0053】図8は本発明による液晶素子を用いた画像
情報処理装置を示す模式図である。
FIG. 8 is a schematic diagram showing an image information processing apparatus using a liquid crystal element according to the present invention.

【0054】300は液晶素子であり、その中央に表示
部310が設けられている。図8では模式的にアクティ
ブマトリクス部を拡大して204として示している。表
示部310の周囲の領域203にはシフトレジスタを含
む周辺回路が配置されている。その周辺回路のうち信号
配線に接続され映像信号を供給する水平駆動回路は表示
部310の上下に、ゲート配線に接続されライン選択信
号を発生する駆動回路は表示部310の左右に配置され
ている。
Reference numeral 300 is a liquid crystal element, and a display portion 310 is provided in the center thereof. In FIG. 8, the active matrix portion is schematically shown as an enlarged view 204. Peripheral circuits including shift registers are arranged in a region 203 around the display unit 310. Among the peripheral circuits, horizontal driving circuits connected to signal lines and supplying video signals are arranged above and below the display unit 310, and driving circuits connected to gate lines and generating line selection signals are arranged on the left and right sides of the display unit 310. .

【0055】これらの駆動回路は別基板に実装された駆
動制御回路410に接続されて制御される。
These drive circuits are connected to and controlled by a drive control circuit 410 mounted on another board.

【0056】又、光源412及び光源の点灯を制御する
インバータを含む点灯制御回路411と共に上記駆動制
御回路410は中央制御回路414に接続される。
The drive control circuit 410 is connected to a central control circuit 414 together with a lighting control circuit 411 including a light source 412 and an inverter for controlling lighting of the light source.

【0057】更に、この画像情報処理装置では画像情報
を入力するレンズを含む光学系422と光電変換要素を
含むイメージセンサ421とその駆動回路420を有し
ている。
Further, this image information processing apparatus has an optical system 422 including a lens for inputting image information, an image sensor 421 including a photoelectric conversion element, and a drive circuit 420 thereof.

【0058】加えて、イメージセンサ421による画像
情報及び/又は表示された画像情報は記録ヘッド431
を含む記録制御回路430により記録媒体に記録され
る。
In addition, the image information by the image sensor 421 and / or the displayed image information is recorded by the recording head 431.
The data is recorded on the recording medium by the recording control circuit 430 including.

【0059】図9は、本発明の液晶素子と図8に示した
駆動制御回路410との接続部を説明する為の模式的上
面図である。
FIG. 9 is a schematic top view for explaining a connection portion between the liquid crystal element of the present invention and the drive control circuit 410 shown in FIG.

【0060】図9において、下側の基板170と上側の
基板200との大きさを異ならしめ上側基板200より
下側基板の配線パッド部406がはみ出すようにしてい
る。このパッド部406はフレキシブル配線405を介
して駆動制御回路410と接続されている。勿論この場
合も基板107上の周辺回路半導体素子部は上側基板2
00で覆われ保護されている。
In FIG. 9, the lower substrate 170 and the upper substrate 200 are made different in size so that the wiring pad portion 406 of the lower substrate protrudes from the upper substrate 200. The pad portion 406 is connected to the drive control circuit 410 via the flexible wiring 405. Of course, in this case as well, the peripheral circuit semiconductor element portion on the substrate 107 is the upper substrate 2
It is covered with 00 and protected.

【0061】こうして、液晶素子を表示素子として用い
る場合には画像信号を別基板上の回路410からフレキ
シブル配線405を介して周辺回路に供給して画像を表
示させる。
Thus, when a liquid crystal element is used as a display element, an image signal is supplied from a circuit 410 on another substrate to a peripheral circuit via a flexible wiring 405 to display an image.

【0062】[0062]

【発明の効果】以上説明の如く、本発明によれば、両基
板の熱膨張係数の差を±50%以内にすることにより基
板の組み立てプロセスでの熱履歴の影響が少なくなり、
プロセスでのプロセス温度の制約がゆるくなる。
As described above, according to the present invention, the influence of the thermal history in the process of assembling the substrates is reduced by keeping the difference in the coefficient of thermal expansion between the two substrates within ± 50%.
The process temperature constraint in the process is relaxed.

【0063】具体的には、シール剤として熱硬化型シー
ル剤を使用した場合、通常150℃から200℃でシー
ル剤を硬化させるため、従来の構成ではこの行程での上
下基板の貼り合わせ精度が低下し、画素ズレが発生する
が、本発明によれば熱膨張係数の差を±50%以内とす
ることによりこの画素ズレを防止できる。
Specifically, when a thermosetting sealant is used as the sealant, the sealant is usually cured at 150 to 200 ° C. Therefore, in the conventional configuration, the bonding accuracy of the upper and lower substrates in this process is However, according to the present invention, this pixel shift can be prevented by keeping the difference in coefficient of thermal expansion within ± 50%.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に用いられる一対の基板のうち一方の基
板を示す模式的断面図、
FIG. 1 is a schematic cross-sectional view showing one of a pair of substrates used in the present invention,

【図2】本発明による液晶素子の一例を示す模式的断面
図、
FIG. 2 is a schematic cross-sectional view showing an example of a liquid crystal element according to the present invention,

【図3】本発明の実施例1による液晶素子の作製工程を
説明する為の模式図、
FIG. 3 is a schematic diagram for explaining a manufacturing process of a liquid crystal element according to Example 1 of the present invention,

【図4】本発明の実施例2による液晶素子の一部を示す
模式的断面図、
FIG. 4 is a schematic cross-sectional view showing a part of a liquid crystal element according to Example 2 of the present invention,

【図5】本発明に用いられる基板の作製工程を説明する
為の模式図、
FIG. 5 is a schematic diagram for explaining a manufacturing process of a substrate used in the present invention,

【図6】本発明の実施例5による液晶素子の作製工程を
説明する為の模式図、
FIG. 6 is a schematic diagram for explaining a manufacturing process of a liquid crystal element according to a fifth embodiment of the present invention,

【図7】実施例5による液晶素子を説明する為の模式的
上面図、
FIG. 7 is a schematic top view for explaining a liquid crystal element according to Example 5,

【図8】本発明による液晶素子を用いた画像情報処理装
置を説明する為の模式図、
FIG. 8 is a schematic diagram for explaining an image information processing apparatus using a liquid crystal element according to the present invention,

【図9】本発明の液晶素子と駆動制御回路との接続を説
明する為の模式的上面図。
FIG. 9 is a schematic top view for explaining the connection between the liquid crystal element of the present invention and the drive control circuit.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 岡村 守之 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 神尾 優 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Moriyuki Okamura 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Yu Kamio 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Within the corporation

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 2枚の基板を所定の間隔で対向させ、そ
の間に液晶を封入した液晶素子において、 該2つの基板の材料が異なり、それら基板の熱膨張係数
の差が一方の基板の熱膨張係数の±50%以内であるこ
とを特徴とする液晶素子。
1. In a liquid crystal element in which two substrates are opposed to each other at a predetermined interval and liquid crystal is sealed between them, the materials of the two substrates are different, and the difference in coefficient of thermal expansion between the two substrates is the heat of one substrate. A liquid crystal element having a coefficient of expansion within ± 50%.
【請求項2】 前記2枚の基板のうち一方は石英基板又
は半導体基板である請求項1に記載の液晶素子。
2. The liquid crystal device according to claim 1, wherein one of the two substrates is a quartz substrate or a semiconductor substrate.
【請求項3】 前記2枚の基板のうち一方は光透過部を
有するシリコン基板である請求項1に記載の液晶素子。
3. The liquid crystal device according to claim 1, wherein one of the two substrates is a silicon substrate having a light transmitting portion.
【請求項4】 前記2枚の基板のうち一方は、半導体集
積回路を有する基板であり、該回路の半導体素子を覆う
ように他方の基板が配置されている請求項1に記載の液
晶素子。
4. The liquid crystal element according to claim 1, wherein one of the two substrates is a substrate having a semiconductor integrated circuit, and the other substrate is arranged so as to cover the semiconductor element of the circuit.
【請求項5】 2枚の基板を所定の間隔で対向させ、そ
の間に液晶を封入し、該2つの基板の材料が異なり、そ
れら基板の熱膨張係数の差が一方の基板の熱膨張係数の
±50%以内である液晶素子と、 該素子に入力する画像信号を供給する前記基板上とは別
に設けられた画像信号発生回路と、を具備する画像情報
処理装置。
5. Two substrates are made to face each other at a predetermined interval, liquid crystal is sealed between them, the materials of the two substrates are different, and the difference in the coefficient of thermal expansion between the two substrates is equal to the coefficient of thermal expansion of one substrate. An image information processing apparatus comprising: a liquid crystal element within ± 50%; and an image signal generation circuit provided separately from the substrate for supplying an image signal input to the element.
【請求項6】 前記画像情報処理装置は更に前記画像信
号の基になる情報を発生するイメージセンサーを有する
ことを特徴とする請求項5に記載の画像情報処理装置。
6. The image information processing apparatus according to claim 5, wherein the image information processing apparatus further includes an image sensor that generates information that is a basis of the image signal.
【請求項7】 前記画像情報処理装置は更に前記画像信
号に応じた情報を記録媒体に記録する記録手段を有する
ことを特徴とする請求項5ないし6に記載の画像情報処
理装置。
7. The image information processing apparatus according to claim 5, further comprising recording means for recording information according to the image signal on a recording medium.
JP4358844A 1992-01-31 1992-12-28 Liquid crystal element Pending JPH05273532A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP4358844A JPH05273532A (en) 1992-01-31 1992-12-28 Liquid crystal element
US08/312,172 US5644373A (en) 1992-01-31 1994-09-26 Liquid crystal device with substrates of different materials and similar thermal expansion coefficients

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP4-40493 1992-01-31
JP4049392 1992-01-31
JP4358844A JPH05273532A (en) 1992-01-31 1992-12-28 Liquid crystal element

Publications (1)

Publication Number Publication Date
JPH05273532A true JPH05273532A (en) 1993-10-22

Family

ID=26379954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4358844A Pending JPH05273532A (en) 1992-01-31 1992-12-28 Liquid crystal element

Country Status (2)

Country Link
US (1) US5644373A (en)
JP (1) JPH05273532A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001133761A (en) * 1999-11-04 2001-05-18 Toshiba Corp Liquid crystal display device and organic led device
JP2005283969A (en) * 2004-03-30 2005-10-13 Nec Corp Liquid crystal display device and liquid crystal projector using the same

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3256834B2 (en) * 1995-06-01 2002-02-18 キヤノン株式会社 Liquid crystal display
JP3737176B2 (en) 1995-12-21 2006-01-18 株式会社半導体エネルギー研究所 Liquid crystal display
WO1997043117A1 (en) * 1996-05-16 1997-11-20 Lockheed Martin Energy Systems, Inc. Low temperature material bonding technique
US6288764B1 (en) * 1996-06-25 2001-09-11 Semiconductor Energy Laboratory Co., Ltd. Display device or electronic device having liquid crystal display panel
JP3571887B2 (en) * 1996-10-18 2004-09-29 キヤノン株式会社 Active matrix substrate and liquid crystal device
JP3513371B2 (en) * 1996-10-18 2004-03-31 キヤノン株式会社 Matrix substrate, liquid crystal device and display device using them
JP3188411B2 (en) * 1996-10-18 2001-07-16 キヤノン株式会社 Pixel electrode substrate for reflective liquid crystal device, liquid crystal device using the pixel electrode substrate, and display device using the liquid crystal device
JPH10186102A (en) * 1996-12-26 1998-07-14 Yazaki Corp Anti-reflection film
WO1998038261A1 (en) 1997-02-27 1998-09-03 Seiko Epson Corporation Adhesive, liquid crystal device, method of manufacturing liquid crystal device, and electronic apparatus
US6671024B1 (en) * 1997-02-27 2003-12-30 Seiko Epson Corporation Connecting structure, liquid crystal device, electronic equipment, and anisotropic conductive adhesive agent and a manufacturing method thereof
GB9827965D0 (en) 1998-12-19 1999-02-10 Secr Defence Assembly of cells having spaced opposed substrates
JP4298131B2 (en) * 1999-05-14 2009-07-15 株式会社半導体エネルギー研究所 Method for manufacturing liquid crystal display device
US6718281B2 (en) * 2000-02-15 2004-04-06 Virginia Polytechnic Institute & State University Apparatus and method for volumetric dilatometry
US7365809B2 (en) * 2003-03-25 2008-04-29 Sanyo Electric Co., Ltd. Stereoscopic image display device having negative pressure regions within
TW200729364A (en) * 2006-01-26 2007-08-01 Ind Tech Res Inst Circuit substrate and packaging thereof and method for fabricating the packaging
CN102271457B (en) * 2011-07-19 2013-05-01 南京中电熊猫液晶显示科技有限公司 Display device
US8797495B2 (en) * 2011-10-25 2014-08-05 Shenzhen China Star Optoelectronics Technology Co., Ltd. LCD panel and method of forming the same
KR102608091B1 (en) 2016-10-07 2023-12-04 삼성디스플레이 주식회사 Display device and method for manufacturing the same
US10777153B1 (en) * 2019-05-16 2020-09-15 Himax Display, Inc. Method for calculating pixel voltage for liquid crystal on silicon display device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1566558A (en) * 1976-09-03 1980-05-08 Standard Telephones Cables Ltd Large liquid crystal cells
JPS5528024A (en) * 1978-08-18 1980-02-28 Seiko Epson Corp Lquid crystal display panel
US4256382A (en) * 1979-05-03 1981-03-17 Hughes Aircraft Company Liquid crystal devices having uniform thermal expansion coefficient components
NL7906695A (en) * 1979-09-07 1981-03-10 Philips Nv DISPLAY DEVICE.
DE3140078A1 (en) * 1980-10-08 1982-04-22 Kabushiki Kaisha Suwa Seikosha, Tokyo OPTICAL LIQUID CRYSTAL DEVICE AND PRINTER USING SUCH AN OPTICAL DEVICE AS A LIGHT VALVE
JPS58143374A (en) * 1982-02-19 1983-08-25 セイコーエプソン株式会社 Manufacture of liquid crystal display panel
JPS60198581A (en) * 1984-03-22 1985-10-08 松下電器産業株式会社 Liquid crystal image display unit
JPS61147232A (en) * 1984-12-20 1986-07-04 Canon Inc Liquid-crystal element
US4917471A (en) * 1986-08-30 1990-04-17 Canon Kabushiki Kaisha Liquid crystal device
GB2204980A (en) * 1987-05-22 1988-11-23 Philips Electronic Associated Active matrix addressed liquid crystal display devices
DE69013984T2 (en) * 1989-06-09 1995-04-20 Sharp Kk Liquid crystal display device.
US5148301A (en) * 1990-02-27 1992-09-15 Casio Computer Co., Ltd. Liquid crystal display device having a driving circuit inside the seal boundary
US5200847A (en) * 1990-05-01 1993-04-06 Casio Computer Co., Ltd. Liquid crystal display device having driving circuit forming on a heat-resistant sub-substrate
JP3090979B2 (en) * 1990-09-04 2000-09-25 株式会社リコー Thin film laminated device with substrate and method of manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001133761A (en) * 1999-11-04 2001-05-18 Toshiba Corp Liquid crystal display device and organic led device
JP2005283969A (en) * 2004-03-30 2005-10-13 Nec Corp Liquid crystal display device and liquid crystal projector using the same

Also Published As

Publication number Publication date
US5644373A (en) 1997-07-01

Similar Documents

Publication Publication Date Title
JPH05273532A (en) Liquid crystal element
US7868984B2 (en) Electro-optical device and method of manufacturing the same
EP1507162B1 (en) Liquid crystal display device
US6567147B1 (en) Liquid crystal display device and method of fabricating the same
JPH04253028A (en) Active matrix type liquid crystal display device
JPH0667205A (en) Semiconmductor device for light valve and its manufacture
JPH05313201A (en) Semiconductor thin-film element and its application device and production of semiconductor thin-film element
JPH02234134A (en) Active matrix substrate for liquid crystal display device
KR20070028307A (en) Liquid crystal display and method for fabricating the same
JP3103981B2 (en) Semiconductor single crystal substrate liquid crystal panel device
US20120329185A1 (en) Display apparatus and method of fabricating the same
JPH1164882A (en) Reflection type liquid crystal panel and its production
JPH07159772A (en) Liquid crystal display device
JPH02198428A (en) Active matrix substrate for liquid crystal display device
JP3941401B2 (en) Manufacturing method of liquid crystal device
KR100569202B1 (en) Flexible electro-optical device and method of manufacturing the same
KR100906410B1 (en) Liquid crystal display devices having a black seal pattern and an resin external pattern around the black seal pattern
JP3171844B2 (en) Semiconductor single crystal thin film substrate liquid crystal light valve device
JPH06331971A (en) Liquid crystal display device
JPS6145221A (en) Device for image display and its manufacture
JP4081906B2 (en) Microlens substrate manufacturing method, electro-optical device manufacturing method, microlens substrate, electro-optical device including the same, and projection display device including the same
JPH08194212A (en) Liquid crystal display element
JP3058212B2 (en) Liquid crystal display
JP3210233B2 (en) Liquid crystal display
KR100280348B1 (en) Thin film transistor array and lmage display device using the same

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20011204