JPH05267847A - Multilayer printed circuit board - Google Patents

Multilayer printed circuit board

Info

Publication number
JPH05267847A
JPH05267847A JP4058646A JP5864692A JPH05267847A JP H05267847 A JPH05267847 A JP H05267847A JP 4058646 A JP4058646 A JP 4058646A JP 5864692 A JP5864692 A JP 5864692A JP H05267847 A JPH05267847 A JP H05267847A
Authority
JP
Japan
Prior art keywords
pad
hole
penetrating
diameter
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4058646A
Other languages
Japanese (ja)
Inventor
Yoshio Matsumoto
佳夫 松本
Mitsuo Saito
光雄 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4058646A priority Critical patent/JPH05267847A/en
Publication of JPH05267847A publication Critical patent/JPH05267847A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Abstract

PURPOSE:To eliminate peeling of a pad on a non-penetrating through hole by forming a diameter of the hole at the side of an outer layer surface smaller than that at the side of an inner surface in a multilayer printed circuit board having the hole in the pad. CONSTITUTION:A non-penetrating through hole 3 in a conical pad in which a diameter of a multilayer surface is formed smaller than that of an inner surface is provided under a pad 2 of a multilayer printed circuit board 1. Resin is filled in the hole 3 in the pad, and the pad 2 on a surface of a flat copper- plated layer 5 formed with the layer 5 is formed on the surface. Thus, since the diameter of the hole 3 at the outer layer surface in the pad is reduced to decrease the surface of the resinous copper-plated layer 5 filled at the time of laminating, a ratio of a copper foil area on the board is increased, and an adhesive strength of the entire pad 2 can be resultantly improved. Thus, the copper-plated layer of the pad is not peeled.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は多層印刷配線板に関し、
特にパッド内に非貫通スルーホールを有する多層印刷配
線板に関する。
The present invention relates to a multilayer printed wiring board,
In particular, it relates to a multilayer printed wiring board having a non-through hole in a pad.

【0002】[0002]

【従来の技術】従来、パッド内の非貫通スルーホールを
有する多層印刷配線板は、図3に示すように、部品実装
用パッド2内にパッド2の面に対し垂直に円筒状のパッ
ド内の非貫通スルーホール23を設けて積層時にパッド
内の非貫通スルーホール23内に樹脂を充てんした後、
その表面に銅めっき層5を形成し、フラットな銅めっき
層5の面のパッド23を形成している。
2. Description of the Related Art Conventionally, as shown in FIG. 3, a multilayer printed wiring board having a non-penetrating through hole in a pad has a cylindrical pad inside the component mounting pad 2 perpendicular to the surface of the pad 2. After the non-penetrating through holes 23 are provided and the non-penetrating through holes 23 in the pad are filled with resin at the time of stacking,
The copper plating layer 5 is formed on the surface, and the pad 23 on the surface of the flat copper plating layer 5 is formed.

【0003】[0003]

【発明が解決しようとする課題】従来のパッド内の非貫
通スルーホールを有する多層印刷配線板は、積層時に樹
脂を充てんしたパッド下の非貫通スルーホール内の樹脂
と銅めっき層の接着強度が周囲の基材と銅箔との接着強
度よりも弱い特性があり、実装部品が小さくなりそれに
伴いパッドも小さくなると、パッド内の非貫通スルーホ
ールの面積割合が増加しパッド全体の接着強度が弱くな
り、部品実装時の熱ストレスなどにより、パッドがはが
れ易くなるという問題点があった。
A conventional multilayer printed wiring board having a non-penetrating through hole in a pad has a bonding strength between the resin and the copper plating layer in the non-penetrating through hole under the pad filled with resin at the time of lamination. There is a characteristic that it is weaker than the adhesive strength between the surrounding base material and the copper foil, and when the mounting parts become smaller and the pad becomes smaller accordingly, the area ratio of the non-through through holes in the pad increases and the adhesive strength of the entire pad becomes weaker. Therefore, there is a problem that the pad is easily peeled off due to thermal stress when mounting the component.

【0004】本発明の目的は、非貫通スルーホール上の
パッドのはがれのない多層印刷板を提供することにあ
る。
It is an object of the present invention to provide a multilayer printing plate in which the pads on the non-penetrating through holes are not peeled off.

【0005】[0005]

【課題を解決するための手段】本発明は、パッド内に非
貫通スルーホールを有する多層印刷配線板において、前
記非貫通スルーホールの外層面側の径を内装面側の径よ
りも小さく形成する。
According to the present invention, in a multilayer printed wiring board having a non-penetrating through hole in a pad, the diameter of the non-penetrating through hole on the outer layer side is smaller than the diameter on the interior side. .

【0006】[0006]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0007】図1は本発明の第1の実施例の要部断面図
である。
FIG. 1 is a sectional view of the essential portions of the first embodiment of the present invention.

【0008】第1の実施例は、図1に示すように、多層
印刷配線板1のパッド2の下に外層面の径を内層面の径
よりも小さくした円すい状のパッド内の非貫通スルーホ
ール3を設け、このパッド内の非貫通スルーホール3に
樹脂を充てんし、その表面に銅めっき層5を形成したフ
ラットな銅めっき層5の面のパッド2を形成している。
In the first embodiment, as shown in FIG. 1, a non-penetrating through in a conical pad having a diameter of an outer layer surface smaller than a diameter of an inner layer surface under a pad 2 of a multilayer printed wiring board 1. The holes 3 are provided, the non-penetrating through holes 3 in the pads are filled with resin, and the pads 2 on the surface of the flat copper plating layer 5 on which the copper plating layer 5 is formed are formed.

【0009】このように、パッド内の非貫通スルーホー
ル3の外層面の径を小さくして積層時に充てんされた樹
脂上の銅めっき層5の面積を小さくしているので、基材
上の銅箔面積の割合が増し、結果的にパッド2全体の接
着強度を向上することができる。
As described above, since the diameter of the outer layer surface of the non-penetrating through hole 3 in the pad is reduced to reduce the area of the copper plating layer 5 on the resin filled during lamination, the copper on the base material is reduced. The ratio of the foil area is increased, and as a result, the adhesive strength of the entire pad 2 can be improved.

【0010】図2は本発明の第2の実施例の要部断面図
である。
FIG. 2 is a sectional view of the essential portions of the second embodiment of the present invention.

【0011】第2の実施例は、図2に示すように、パッ
ド内の非貫通スルーホール3をつり鐘状の形状にしたも
ので、非貫通スルーホールの穴明け時に、ドリルを完全
に貫通させず、穴明け深さ方向に制御することで、パッ
ド2の下の外層面の径を内層面の径よりも小さく形成す
ることができ、第1の実施例と同じ効果が得られる。
In the second embodiment, as shown in FIG. 2, the non-penetrating through hole 3 in the pad is formed into a bell shape, and the drill is completely penetrated when the non-penetrating through hole is drilled. The diameter of the outer layer surface under the pad 2 can be formed smaller than the diameter of the inner layer surface by controlling the hole depth direction without performing the above operation, and the same effect as that of the first embodiment can be obtained.

【0012】第2の実施例では、0.5mmピッチQF
Pの部品を搭載する0.3mm幅のパッド下に径が0.
3mmのドリルを使用して、内層面側が0.3mmの径
で外層面側を0.15mmの径にするパッド内の非貫通
スルーホール13を設けることができる。
In the second embodiment, a 0.5 mm pitch QF is used.
Under the pad of 0.3mm width which mounts P parts, the diameter is 0.
A 3 mm drill can be used to provide the non-penetrating through holes 13 in the pad with a diameter of 0.3 mm on the inner surface side and a diameter of 0.15 mm on the outer surface side.

【0013】[0013]

【発明の効果】以上説明したように本発明は、パッド内
の非貫通スルーホールの外層面の径を内層面の径よりも
小さくすることにより、パッド内の非貫通スルーホール
上の銅めっき層の面積を小さくし、基材上の銅箔面積の
割合を大きくし、結果的に、パッド全体の接着強度を大
きくしたので、部品実装時の熱ストレスに対してパッド
部の銅めっき層がはがれなくなるという効果を有する。
As described above, according to the present invention, the diameter of the outer layer surface of the non-penetrating through hole in the pad is made smaller than the diameter of the inner layer surface so that the copper plating layer on the non-penetrating through hole in the pad is formed. Area and the ratio of the copper foil area on the base material were increased, and as a result, the adhesive strength of the entire pad was increased, so the copper plating layer of the pad part peeled off against the thermal stress during component mounting. It has the effect of disappearing.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の要部断面図である。FIG. 1 is a cross-sectional view of a main part of a first embodiment of the present invention.

【図2】本発明の第2の実施例の要部断面図である。FIG. 2 is a cross-sectional view of essential parts of a second embodiment of the present invention.

【図3】従来の多層印刷配線板の一例の要部断面図であ
る。
FIG. 3 is a cross-sectional view of essential parts of an example of a conventional multilayer printed wiring board.

【符号の説明】[Explanation of symbols]

1 多層印刷配線板 2 パッド 3,13,23 パッド内の非貫通スルーホール 4 貫通スルーホール 5 銅めっき層 1 Multilayer printed wiring board 2 Pads 3, 13, 23 Non-penetrating through holes in pads 4 Through through holes 5 Copper plating layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 パッド内に非貫通スルーホールを有する
多層印刷配線板において、前記非貫通スルーホールの外
層面側の径を内装面側の径よりも小さく形成したことを
特徴とする多層印刷配線板。
1. A multilayer printed wiring board having a non-penetrating through hole in a pad, wherein a diameter of the non-penetrating through hole on an outer layer side is smaller than a diameter on an interior surface side. Board.
JP4058646A 1992-03-17 1992-03-17 Multilayer printed circuit board Pending JPH05267847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4058646A JPH05267847A (en) 1992-03-17 1992-03-17 Multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4058646A JPH05267847A (en) 1992-03-17 1992-03-17 Multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPH05267847A true JPH05267847A (en) 1993-10-15

Family

ID=13090355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4058646A Pending JPH05267847A (en) 1992-03-17 1992-03-17 Multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH05267847A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6105246A (en) * 1999-05-20 2000-08-22 International Business Machines Corporation Method of making a circuit board having burr free castellated plated through holes
JP2020061409A (en) * 2018-10-05 2020-04-16 株式会社村田製作所 Multilayer electronic component
CN111148355A (en) * 2019-12-31 2020-05-12 生益电子股份有限公司 Method for improving bonding force between copper layer and resin in back drilling area and PCB

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03129795A (en) * 1989-03-20 1991-06-03 Hitachi Seiko Ltd Printed board and manufacture thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03129795A (en) * 1989-03-20 1991-06-03 Hitachi Seiko Ltd Printed board and manufacture thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6105246A (en) * 1999-05-20 2000-08-22 International Business Machines Corporation Method of making a circuit board having burr free castellated plated through holes
US6483046B1 (en) 1999-05-20 2002-11-19 International Business Machines Corporation Circuit board having burr free castellated plated through holes
JP2020061409A (en) * 2018-10-05 2020-04-16 株式会社村田製作所 Multilayer electronic component
CN111148355A (en) * 2019-12-31 2020-05-12 生益电子股份有限公司 Method for improving bonding force between copper layer and resin in back drilling area and PCB
CN111148355B (en) * 2019-12-31 2022-12-23 生益电子股份有限公司 Method for improving bonding force between copper layer and resin in back drilling area and PCB

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Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19980421