JPH05267698A - Photovoltaic device - Google Patents

Photovoltaic device

Info

Publication number
JPH05267698A
JPH05267698A JP4093445A JP9344592A JPH05267698A JP H05267698 A JPH05267698 A JP H05267698A JP 4093445 A JP4093445 A JP 4093445A JP 9344592 A JP9344592 A JP 9344592A JP H05267698 A JPH05267698 A JP H05267698A
Authority
JP
Japan
Prior art keywords
amorphous semiconductor
type amorphous
semiconductor film
photovoltaic device
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4093445A
Other languages
Japanese (ja)
Other versions
JP3358164B2 (en
Inventor
Hisao Haku
久雄 白玖
Akira Terakawa
朗 寺川
Yukio Nakajima
行雄 中嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP09344592A priority Critical patent/JP3358164B2/en
Publication of JPH05267698A publication Critical patent/JPH05267698A/en
Application granted granted Critical
Publication of JP3358164B2 publication Critical patent/JP3358164B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

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  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain a photovoltaic device of high performance which can sufficiently maintain light confinement effect and have a large open voltage and a large short current. CONSTITUTION:In a photovoltaic device formed by laminating, from the light incidence side, a P-type amorphous semiconductor film 31, an I-type amorphous semiconductor film 32, an N-type amorphous semiconductor film 33 and a back surface electrode 4, an amorphous silicon germanium film 35 of high impurity concentration wherein unevenness is formed on the surface is arranged in the vicinity of the N-type amorphous semiconductor film 33 side in the I-type amorphous semiconductor film 32.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、光起電力装置に関す
る。
FIELD OF THE INVENTION This invention relates to photovoltaic devices.

【0002】[0002]

【従来の技術】一般に、光起電力装置としては、例えば
ガラス等の絶縁性基板と、該基板上に順に積層された透
明電極と、p−i−nの順に積層した非晶質半導体と、
裏面電極とを有するものが知られている。
2. Description of the Related Art Generally, as a photovoltaic device, an insulating substrate such as glass, a transparent electrode sequentially laminated on the substrate, an amorphous semiconductor laminated in the order p-i-n,
Those having a back electrode are known.

【0003】裏面電極としては光反射率の高い銀等が主
流を占めており、p−i−nの順に積層した非晶質半導
体としては、アモルファスシリコン、アモルファスシリ
コンカーバイド、アモルファスシリコンゲルマニウム等
が用いられる。また、透明電極としては、酸化錫(Sn
2 )、酸化インジウム(In23 )、酸化インジウ
ム錫(ITO)、酸化亜鉛(ZnO)等が用いられる。
As the back surface electrode, silver having a high light reflectance occupies the mainstream, and as an amorphous semiconductor laminated in the order of pin, amorphous silicon, amorphous silicon carbide, amorphous silicon germanium, etc. are used. Be done. Further, as the transparent electrode, tin oxide (Sn
O 2 ), indium oxide (In 2 O 3 ), indium tin oxide (ITO), zinc oxide (ZnO) and the like are used.

【0004】この従来の光起電力装置においては、変換
効率を高めるため、光入射側の透明電極膜の表面に凹凸
を形成し、非晶質半導体層の表面と裏面の一方又は双方
を微細な凹凸を有する凹凸面、いわゆるテクスチャー構
造に形成して裏面電極の表面で光を散乱させ、非晶質半
導体を透過する裏面電極の反射光の光路長を長くするよ
うにして、いわゆる光閉じ込め効果を利用している。
In this conventional photovoltaic device, in order to improve conversion efficiency, unevenness is formed on the surface of the transparent electrode film on the light incident side, and one or both of the front surface and the back surface of the amorphous semiconductor layer are finely divided. A so-called light trapping effect is obtained by forming an uneven surface having unevenness, that is, a so-called texture structure to scatter light on the surface of the back electrode and lengthen the optical path length of the reflected light of the back electrode that transmits the amorphous semiconductor. We are using.

【0005】[0005]

【発明が解決しようとする課題】前記光閉じ込め構造に
おいては、凹凸形状により、光活性層内での実行的な光
の走行距離を増加せしめ、光起電力装置の短絡電流は増
加できる。しかしその反面、開放電圧が著しく低下する
問題があった。
In the above light confinement structure, the uneven shape can increase the effective travel distance of light in the photoactive layer, and can increase the short-circuit current of the photovoltaic device. However, on the other hand, there is a problem that the open circuit voltage is significantly reduced.

【0006】この原因は、光入射側の透明電極膜の表面
に形成された凹凸の程度が、一導電型非晶質半導体の膜
厚と比較して非常に大きいものであることから、この一
導電型非晶質半導体膜が良好に形成出来ないからであ
る。
The cause of this is that the degree of unevenness formed on the surface of the transparent electrode film on the light incident side is extremely large compared with the film thickness of one conductivity type amorphous semiconductor. This is because the conductive amorphous semiconductor film cannot be formed well.

【0007】この発明は、光閉じ込め効果を十分に保つ
ことができ、開放電圧及び短絡電流とも大きな値を持つ
高性能な光起電力装置を提供することを目的とするもの
である。
It is an object of the present invention to provide a high-performance photovoltaic device which can maintain a sufficient light confinement effect and has a large open circuit voltage and short circuit current.

【0008】[0008]

【課題を解決するための手段】この発明の光起電力装置
は、光入射側より、一導電型非晶質半導体膜、i型非晶
質半導体膜、他導電型非晶質半導体膜及び裏面電極を積
層してなる光起電力装置記において、前記i型非晶質半
導体膜内の前記他導電型非晶質半導体側近傍に、その表
面に凹凸状が形成された不純物濃度の高い非晶質シリコ
ンゲルマニウム膜を設けたこと特徴とする。
A photovoltaic device according to the present invention comprises a one-conductivity type amorphous semiconductor film, an i-type amorphous semiconductor film, another conductivity type amorphous semiconductor film and a back surface from the light incident side. In a photovoltaic device formed by stacking electrodes, an amorphous material having a high impurity concentration, in which irregularities are formed on the surface of the i-type amorphous semiconductor film in the vicinity of the other conductivity type amorphous semiconductor side. And a high quality silicon germanium film is provided.

【0009】また、この発明の光起電力装置は、光入射
側より、一導電型非晶質半導体膜、i型非晶質半導体
膜、他導電型非晶質半導体膜及び裏面電極を積層してな
る光起電力装置において、前記他導電型非晶質半導体膜
内の前記裏面電極側近傍に、その表面に凹凸形状が形成
された不純物濃度の高い非晶質シリコンゲルマニウム膜
を設けたことを特徴とする。
Further, in the photovoltaic device of the present invention, one conductivity type amorphous semiconductor film, i-type amorphous semiconductor film, another conductivity type amorphous semiconductor film and the back electrode are laminated from the light incident side. In the photovoltaic device formed as described above, an amorphous silicon germanium film having a high impurity concentration and having an uneven shape formed on its surface is provided in the vicinity of the back electrode side in the other conductivity type amorphous semiconductor film. Characterize.

【0010】更に、前記凹凸形状は、酸素、炭素並びに
窒素等の不純物をバンドギャップの変化として1%以内
に収まる量として添加された非晶質シリコンゲルマニウ
ム膜の表面を水素等のガス雰囲気中でプラズマ放電を行
うことにより形成すると良い。
Further, the irregular shape has a surface of an amorphous silicon germanium film in which impurities such as oxygen, carbon, and nitrogen are added in an amount within 1% as a change in band gap in a gas atmosphere such as hydrogen. It may be formed by performing plasma discharge.

【0011】[0011]

【作用】この発明によれば、i型非晶質半導体膜内の前
記他導電型非晶質半導体側近傍に、その表面に凹凸状が
形成された不純物濃度の高い非晶質シリコンゲルマニウ
ム(以下、a−SiGeという。)膜を介在させること
により、光入射側の透明電極の表面に形成された凹凸の
程度を一導電型非晶質半導体膜が良好に形成できるよう
に極力小さくしても、光閉じ込め効果を充分保つことが
出来、開放電圧、短絡電流とも大きな値を持つ高性能な
光起電力装置が得られる。
According to the present invention, in the i-type amorphous semiconductor film, near the side of the other conductivity type amorphous semiconductor, unevenness is formed on the surface of the amorphous silicon germanium (hereinafter referred to as high impurity concentration). , A-SiGe), even if the degree of unevenness formed on the surface of the transparent electrode on the light incident side is made as small as possible so that the one conductivity type amorphous semiconductor film can be formed well. In addition, a high-performance photovoltaic device can be obtained which can sufficiently maintain the light confinement effect and has large values of open circuit voltage and short circuit current.

【0012】[0012]

【実施例】この発明の実施例に係る光起電力装置を図面
に基づき具体的に説明すれば、以下の通りである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The photovoltaic device according to the embodiments of the present invention will be described below in detail with reference to the drawings.

【0013】図1の模式図に示すように、この光起電力
装置は、ガラス等からなる透明基板1と、これの一面に
順に積層された透明電極としてのTCO膜2、非晶質半
導体層3及び裏面電極4とを備える。
As shown in the schematic view of FIG. 1, this photovoltaic device has a transparent substrate 1 made of glass or the like, a TCO film 2 as a transparent electrode laminated in this order on one surface, and an amorphous semiconductor layer. 3 and the back surface electrode 4.

【0014】TCO膜2は例えば酸化錫(SnO2 )、
酸化インジウム(In23 )、酸化インジウム錫(I
TO)、酸化亜鉛(ZnO)等で構成すればよいが、こ
こでは酸化錫(SnO2 )を用いている。
The TCO film 2 is, for example, tin oxide (SnO 2 ),
Indium oxide (In 2 O 3 ), indium tin oxide (I
TO), zinc oxide (ZnO) or the like may be used, but tin oxide (SnO 2 ) is used here.

【0015】非晶質半導体層3は、それぞれプラズマC
VD法によって形成されたp型アモルファスシリコンカ
ーバイド(a−SiC)からなるp型非晶質半導体層3
1、i型アモルファスシリコンゲルマニウム(a−Si
Ge)からなるi型非晶質半導体層32、n型アモルフ
ァスシリコンからなるn型非晶質半導体層33及びこの
n型非晶質半導体層近傍に形成されたこの発明の特徴で
ある不純物が添加されたa−SiGe層35とを備え
る。
The amorphous semiconductor layers 3 are formed of plasma C, respectively.
P-type amorphous semiconductor layer 3 made of p-type amorphous silicon carbide (a-SiC) formed by VD method
1, i-type amorphous silicon germanium (a-Si
Ge), i-type amorphous semiconductor layer 32, n-type amorphous semiconductor layer 33 made of n-type amorphous silicon, and an impurity which is a feature of the present invention and is formed in the vicinity of the n-type amorphous semiconductor layer. A-SiGe layer 35 that has been formed.

【0016】裏面電極4はアルミニウム(Al)を蒸着
法によって形成すればよい。
The back electrode 4 may be formed of aluminum (Al) by a vapor deposition method.

【0017】さて、この発明者等は、a−SiGeに酸
素、炭素並びに窒素等の不純物をバンドギャップの変化
として1%以内に収まる量として添加し、水素等のガス
雰囲気中でプラズマ放電を行うと、その表面に凹凸が形
成されることを見出した。この発明は、a−SiGe表
面に凹凸を形成し、この凹凸面を用いていわゆるテクス
チャー構造を形成し、裏面電極の表面で光を散乱させる
ように構成したものである。
The inventors of the present invention add impurities such as oxygen, carbon, and nitrogen to a-SiGe in an amount within 1% as a change in band gap, and perform plasma discharge in a gas atmosphere such as hydrogen. Then, it was found that unevenness was formed on the surface. The present invention is configured such that unevenness is formed on the surface of a-SiGe, a so-called texture structure is formed using this uneven surface, and light is scattered on the surface of the back electrode.

【0018】表1にアモルファスシリコンゲルマニウム
(a−SiGe)の形成条件を示し、表2にi型非晶質
半導体層32とこの発明の特徴である不純物が添加され
たa−SiGe層35との不純物量を示す。
Table 1 shows conditions for forming amorphous silicon germanium (a-SiGe), and Table 2 shows the i-type amorphous semiconductor layer 32 and the impurity-added a-SiGe layer 35 which is a feature of the present invention. Indicates the amount of impurities.

【0019】不純物の添加方法としては、脱ガス/リー
ク量の少ないプラズマCVDの反応室にリークポートを
設け、意図的に空気を導入し、脱ガス/リーク量を増や
すことによる。
As a method of adding impurities, a leak port is provided in a reaction chamber of plasma CVD with a small amount of degassing / leakage, and air is intentionally introduced to increase the amount of degassing / leakage.

【0020】[0020]

【表1】 [Table 1]

【0021】[0021]

【表2】 [Table 2]

【0022】図4はSiGeの組成及び膜中不純物の異
なるa−SiGe膜の表面にH2〜100SCCM、基
板温度〜180℃、パワー密度170mW/cm2の条
件で水素プラズマ処理を2分施し、STMで観測した状
態を示す模式図である。図4(a)(b)は上記i層3
2に示す不純物濃度のものであり、(a)はa−Si
0.87Ge0.13の組成、(b)はa−Si0.64Ge0.36
組成のものである。図4(c)(d)は上記a−SiG
e層35に示す不純物濃度のものであり、(c)はa−
Si0.87Ge0.13の組成、(d)はa−Si0.64Ge
0.36の組成のものである。この図4から分かるように不
純物の増加により、その部分が容易にエッチングされ表
面の凹凸が大きくなる。更にGe量の多いほど凹凸が大
きくなる。従って、テクスチャ効果をより得ようとする
と、図4(d)で示す組成並びに不純物濃度のものをa
−SiGe層35に用い。これに水素プラズマ処理を施
して、凹凸面を形成すれば良い。
In FIG. 4, the surface of an a-SiGe film having different composition and impurities of SiGe is subjected to hydrogen plasma treatment for 2 minutes under the conditions of H 2 to 100 SCCM, substrate temperature to 180 ° C. and power density 170 mW / cm 2 . It is a schematic diagram which shows the state observed by STM. 4A and 4B show the i layer 3 described above.
2 has an impurity concentration shown in FIG. 2, and (a) is a-Si.
The composition is 0.87 Ge 0.13 , and (b) is the composition a-Si 0.64 Ge 0.36 . 4C and 4D show the a-SiG.
The impurity concentration shown in the e layer 35 is shown in FIG.
Composition of Si 0.87 Ge 0.13 , (d) is a-Si 0.64 Ge
It has a composition of 0.36 . As can be seen from FIG. 4, due to the increase of impurities, that portion is easily etched and the surface unevenness becomes large. Further, the larger the amount of Ge, the larger the unevenness. Therefore, in order to obtain a better texture effect, the composition and impurity concentration shown in FIG.
-Used for the SiGe layer 35. Hydrogen plasma treatment may be applied to this to form an uneven surface.

【0023】このa−SiGe層35上に、n型非晶質
半導体層33及び裏面電極4を設けることで、光入射側
の透明電極2の表面に凹凸の程度をp型非晶質半導体膜
31が良好に形成できるように極力小さくしても、光閉
じ込め効果を充分に保つことが出来る。
By providing the n-type amorphous semiconductor layer 33 and the back surface electrode 4 on the a-SiGe layer 35, the degree of unevenness on the surface of the transparent electrode 2 on the light incident side is reduced to the p-type amorphous semiconductor film. Even if it is made as small as possible so that 31 can be formed well, the light confinement effect can be sufficiently maintained.

【0024】次に、この発明の光起電力装置の製造例を
図3を参照して説明すると、基板1上にp型非晶質半導
体膜31が良好に形成できるように凹凸の程度を極力小
さくした透明電極2を形成し、その上にa−SiCから
成るp型非晶質半導体膜31を形成する。その後、a−
SiGeからなるi型層32の形成を所定膜厚行った
後、酸素等の不純物とGeの比率を上記の表2のように
増加させた膜35を形成する。そして、H2〜100S
CCM、基板温度〜180℃、パワー密度170mW/
cm2の水素プラズマ処理を2分施して、その表面に凹
凸を形成する。その後、n型非晶質半導体層33及び裏
面電極4を形成する。
Next, a manufacturing example of the photovoltaic device of the present invention will be described with reference to FIG. 3. The degree of unevenness is minimized so that the p-type amorphous semiconductor film 31 can be formed well on the substrate 1. The reduced transparent electrode 2 is formed, and the p-type amorphous semiconductor film 31 made of a-SiC is formed thereon. After that, a-
After the i-type layer 32 made of SiGe is formed to a predetermined thickness, a film 35 in which the ratio of Ge such as oxygen and Ge is increased as shown in Table 2 above is formed. Then, H 2 ~100S
CCM, substrate temperature ~ 180 ° C, power density 170mW /
A hydrogen plasma treatment of cm 2 is applied for 2 minutes to form irregularities on the surface. Then, the n-type amorphous semiconductor layer 33 and the back surface electrode 4 are formed.

【0025】この発明の他の実施例を図2に示す。この
ではn型非晶質半導体層にn型a−SiGeを用い、そ
の裏面電極4側に、酸素等の不純物を多くしたn型a−
SiGe膜35を設けてその表面を水素プラズマ処理を
行うことで凹凸面を形成し、その後に裏面電極4を形成
している。この実施例のその他の構成は、上記実施例と
同じである。
Another embodiment of the present invention is shown in FIG. In this case, n-type a-SiGe is used for the n-type amorphous semiconductor layer, and n-type a- with a large amount of impurities such as oxygen is provided on the back electrode 4 side.
The SiGe film 35 is provided, and the surface of the SiGe film 35 is subjected to hydrogen plasma treatment to form an uneven surface, and then the back electrode 4 is formed. The other structure of this embodiment is the same as that of the above embodiment.

【0026】[0026]

【発明の効果】以上説明したように、この発明によれ
ば、光入射側の透明電極の表面に形成された凹凸の程度
を一導電型非晶質半導体膜が良好に形成できるように極
力小さくしても、光閉じ込め効果を充分保つことが出
来、開放電圧、短絡電流とも大きな値を持つ高性能な光
起電力装置が得られる。
As described above, according to the present invention, the degree of unevenness formed on the surface of the transparent electrode on the light incident side is made as small as possible so that the one-conductive type amorphous semiconductor film can be formed well. Even so, the light confinement effect can be sufficiently maintained, and a high-performance photovoltaic device having large values of open circuit voltage and short circuit current can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例の模式図である。FIG. 1 is a schematic view of an embodiment of the present invention.

【図2】この発明の他の実施例の模式図である。FIG. 2 is a schematic view of another embodiment of the present invention.

【図3】この発明の光起電力装置の製造例を示す模式図
である。
FIG. 3 is a schematic view showing a manufacturing example of the photovoltaic device of the present invention.

【図4】SiGeの組成及び膜中不純物の異なるa−S
iGe膜の表面に水素プラズマ処理を施し、STMで観
測した状態を示す模式図である。
FIG. 4 is a-S having different composition of SiGe and different impurities in the film.
It is a schematic diagram which shows the state which performed the hydrogen plasma process on the surface of the iGe film, and observed by STM.

【符号の説明】[Explanation of symbols]

1 基板 2 透明電極 3 非晶質半導体層 4 裏面電極 31 p型非晶質半導体層 32 i型非晶質半導体層 33 n型非晶質半導体層 35 a−SiGe層 DESCRIPTION OF SYMBOLS 1 Substrate 2 Transparent electrode 3 Amorphous semiconductor layer 4 Back electrode 31 p-type amorphous semiconductor layer 32 i-type amorphous semiconductor layer 33 n-type amorphous semiconductor layer 35 a-SiGe layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 光入射側より、一導電型非晶質半導体
膜、i型非晶質半導体膜、他導電型非晶質半導体膜及び
裏面電極を積層してなる光起電力装置において、前記i
型非晶質半導体膜内の前記他導電型非晶質半導体側近傍
に、その表面に凹凸形状が形成された不純物濃度の高い
非晶質シリコンゲルマニウム膜を設けたことを特徴とす
る光起電力装置。
1. A photovoltaic device comprising a one-conductivity type amorphous semiconductor film, an i-type amorphous semiconductor film, another conductivity type amorphous semiconductor film and a back electrode laminated in this order from the light incident side. i
Photovoltaic device characterized in that an amorphous silicon germanium film having a high impurity concentration and having irregularities formed on the surface thereof is provided in the vicinity of the other conductivity type amorphous semiconductor side in the type amorphous semiconductor film. apparatus.
【請求項2】 光入射側より、一導電型非晶質半導体
膜、i型非晶質半導体膜、他導電型非晶質半導体膜及び
裏面電極を積層してなる光起電力装置において、前記他
導電型非晶質半導体膜内の前記裏面電極側近傍に、その
表面に凹凸形状が形成された不純物濃度の高い非晶質シ
リコンゲルマニウム膜を設けたことを特徴とする光起電
力装置。
2. A photovoltaic device comprising a one-conductivity type amorphous semiconductor film, an i-type amorphous semiconductor film, another conductivity type amorphous semiconductor film and a back electrode stacked in this order from the light incident side. A photovoltaic device, characterized in that an amorphous silicon germanium film having a high impurity concentration and having irregularities formed on its surface is provided in the vicinity of the back electrode side in the other conductivity type amorphous semiconductor film.
【請求項3】 前記凹凸形状は、酸素、炭素並びに窒素
等の不純物をバンドギャップの変化として1%以内に収
まる量として添加された非晶質シリコンゲルマニウム膜
の表面を水素等のガス雰囲気中でプラズマ放電を行うこ
とにより形成されていることを特徴とする請求項1又は
2に記載の光起電力装置。
3. The concavo-convex shape is such that impurities such as oxygen, carbon and nitrogen are added in an amount of 1% or less as a change in band gap to the surface of an amorphous silicon germanium film in a gas atmosphere such as hydrogen. The photovoltaic device according to claim 1 or 2, wherein the photovoltaic device is formed by performing plasma discharge.
JP09344592A 1992-03-19 1992-03-19 Method for manufacturing photovoltaic device Expired - Fee Related JP3358164B2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003332605A (en) * 2002-05-15 2003-11-21 Sharp Corp Surface roughening method of semiconductor substrate and solar battery

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003332605A (en) * 2002-05-15 2003-11-21 Sharp Corp Surface roughening method of semiconductor substrate and solar battery
JP4518731B2 (en) * 2002-05-15 2010-08-04 シャープ株式会社 Method for forming irregularities on the surface of a polycrystalline silicon substrate

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