JPH05259342A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH05259342A
JPH05259342A JP5256392A JP5256392A JPH05259342A JP H05259342 A JPH05259342 A JP H05259342A JP 5256392 A JP5256392 A JP 5256392A JP 5256392 A JP5256392 A JP 5256392A JP H05259342 A JPH05259342 A JP H05259342A
Authority
JP
Japan
Prior art keywords
solder
lead frame
foil sheet
solder foil
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5256392A
Other languages
Japanese (ja)
Inventor
Kanji Yahiro
寛司 八尋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5256392A priority Critical patent/JPH05259342A/en
Publication of JPH05259342A publication Critical patent/JPH05259342A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Abstract

PURPOSE:To provide a lead frame that needs no solder bumps on the electrodes of a wiring board. CONSTITUTION:A lead frame 11 has outer leads 15a with solder foil 1. This eliminates the need for solder bumps on electrodes of a wiring board. In- addition, the thickness of solder 4 can accuratelyl be controlled and sufficiently increased.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はリードフレームに係り、
アウターリードに半田箔シートを接着することにより、
基板の半田部を不要にしたものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame,
By bonding the solder foil sheet to the outer leads,
This eliminates the need for the solder portion of the board.

【0002】[0002]

【従来の技術】IC,LSIなどのリード付電子部品
は、アウターリードを基板の電極に半田付けすることに
より、基板に搭載される。現在、半田部の形成方法は、
スクリーン印刷機により基板の電極にクリーム半田を塗
布する方法と、半田メッキや半田レベラ等のコーティン
グ手段により基板の電極上に半田層(一般に半田プリコ
ートと称される)を形成する方法に大別される。
2. Description of the Related Art Leaded electronic components such as ICs and LSIs are mounted on a substrate by soldering outer leads to electrodes on the substrate. Currently, the method of forming the solder part is
It is roughly divided into a method of applying cream solder to the electrodes of the board with a screen printer and a method of forming a solder layer (generally called a solder precoat) on the electrodes of the board by a coating means such as solder plating or solder leveler. It

【0003】[0003]

【発明が解決しようとする課題】ところがスクリーン印
刷機による方法では、クリーム半田の塗布量がばらつき
やすい問題点があった。因みに、塗布量が過多である
と、クリーム半田を加熱処理する際に、半田ブリッジや
半田ボールを生じやすく、また過少であると、接着力が
不足し、最悪の場合には導通不良となる。また近年電子
部品のアウターリードは益々狭ピッチ化する傾向にあ
り、これに対応して基板の電極も益々極細化する傾向に
あるが、スクリーン印刷機によっては、極細の電極にク
リーム半田を塗布しにくく、更には短絡の原因となるク
リーム半田のダレやにじみを生じやすいという問題点が
あった。
However, the method using the screen printer has a problem that the amount of cream solder applied tends to vary. By the way, if the coating amount is too large, solder bridges or solder balls are likely to be formed during the heat treatment of the cream solder, and if it is too small, the adhesive force is insufficient, and in the worst case, poor conduction occurs. In recent years, the outer leads of electronic parts have tended to have a narrower pitch, and in response to this, the electrodes on the substrate have also tended to become even finer.However, depending on the screen printing machine, the solder paste may be applied to the fine electrodes. In addition, there is a problem that cream solder is easily sagged or bleeding, which causes a short circuit.

【0004】また半田プリコートは、アウターリードの
狭ピッチ化には対応しやすい長所があるものの、半田層
の厚さを厚くすることには困難であり、その結果、アウ
ターリードにわずかな浮きがあっても、アウターリード
を電極に接着できないという問題点や、リードが半田プ
リコートから滑り落ちやすいという問題点があった。
Further, although the solder precoat has an advantage that it is easy to cope with a narrower pitch of the outer leads, it is difficult to increase the thickness of the solder layer, and as a result, the outer leads have a slight floating. However, there are problems that the outer leads cannot be bonded to the electrodes and that the leads easily slip off from the solder precoat.

【0005】そこで本発明は、上記従来手段の問題点を
解消できるリードフレームを提供することを目的とす
る。
Therefore, an object of the present invention is to provide a lead frame which can solve the problems of the above-mentioned conventional means.

【0006】[0006]

【課題を解決するための手段】このために本発明は、リ
ードフレームのアウターリードに、半田箔シートを接着
したものである。
To this end, the present invention provides a solder foil sheet bonded to the outer leads of a lead frame.

【0007】[0007]

【作用】上記構成によれば、半田箔シートの厚さを変え
ることにより、所望厚さの半田部をアウターリードに形
成でき、また基板の電極に半田部を形成することを不要
にできる。
According to the above construction, by changing the thickness of the solder foil sheet, the solder portion having a desired thickness can be formed on the outer lead, and it is not necessary to form the solder portion on the electrode of the substrate.

【0008】[0008]

【実施例】次に、図面を参照しながら本発明の実施例を
説明する。図1は半田箔シートとリードフレームの斜視
図である。リードフレーム11のアイランドには、ウェ
ハーから切り出されたチップ12がボンディングされて
おり、チップ12の電極とリードフレーム11のインナ
ーリード15bはワイヤ13により接続されている。1
4はリードフレーム11のピッチ送り用ピン孔、15は
開口部である。
Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a perspective view of a solder foil sheet and a lead frame. The chip 12 cut out from the wafer is bonded to the island of the lead frame 11, and the electrode of the chip 12 and the inner lead 15b of the lead frame 11 are connected by the wire 13. 1
Reference numeral 4 is a pitch feed pin hole of the lead frame 11, and 15 is an opening.

【0009】半田箔シート1のリードフレーム11上の
チップ12や開孔部15に対応する位置には、開口部
2,3が開口されている。また開口部2の内縁部アウタ
ーリード15aに対応する位置には、櫛歯状に舌片4が
形成されている。
Openings 2 and 3 are opened at positions corresponding to the chip 12 and the opening 15 on the lead frame 11 of the solder foil sheet 1. Further, a comb-shaped tongue piece 4 is formed at a position corresponding to the inner edge outer lead 15a of the opening 2.

【0010】図2は、半田箔シート1をリードフレーム
11に接着する接着装置を示しており、半田箔シート1
は、プレスヘッド21に吸着されている。23は半田箔
シート1の吸着孔、24はこの吸着孔23に接続された
吸引チューブであり、吸入装置(図示せず)により、半
田箔シート1をプレスヘッド21のフラットな下面に吸
着する。22はチップ12に対応する位置に形成された
逃げ用凹部である。またリードフレーム11はヒートブ
ロックのような加熱テーブル25上に載置されて、予め
加熱されている。半田箔シート1の溶融温度は例えば1
83℃程度であり、リードフレーム11はこれよりも若
干低温の170℃程度に加熱されている。プレスヘッド
21を下降させると、半田箔シート1はリードフレーム
11に接着される。
FIG. 2 shows an adhesive device for adhering the solder foil sheet 1 to the lead frame 11.
Are adsorbed to the press head 21. Reference numeral 23 is a suction hole of the solder foil sheet 1, and 24 is a suction tube connected to the suction hole 23. The solder foil sheet 1 is sucked onto the flat lower surface of the press head 21 by a suction device (not shown). Reference numeral 22 is a relief recess formed at a position corresponding to the chip 12. Further, the lead frame 11 is placed on a heating table 25 such as a heat block and preheated. The melting temperature of the solder foil sheet 1 is, for example, 1
The temperature is about 83 ° C., and the lead frame 11 is heated to about 170 ° C., which is slightly lower than this. When the press head 21 is lowered, the solder foil sheet 1 is bonded to the lead frame 11.

【0011】図3は、半田箔シート1をリードフレーム
11に接着した平面図を示している。図中、15はリー
ドであって、アウターリード15aと、上記ワイヤ13
が接続されるインナーリード15bから成っている。1
6はチップ12が搭載されたアイランドである。図示す
るように、半田箔シート1の舌片4は、アウターリード
15aの基板の電極への着地部15a’(後述)に合致
させて接着されている。この接着は仮接着であって、後
工程において加熱溶融させることにより、完全接着す
る。
FIG. 3 shows a plan view in which the solder foil sheet 1 is bonded to the lead frame 11. In the figure, 15 is a lead, and the outer lead 15a and the wire 13
Of the inner lead 15b to which is connected. 1
Reference numeral 6 is an island on which the chip 12 is mounted. As shown in the figure, the tongue piece 4 of the solder foil sheet 1 is bonded to the outer lead 15a so as to match the landing portion 15a '(described later) of the outer lead 15a to the electrode of the substrate. This adhesion is temporary adhesion, and complete adhesion is achieved by heating and melting in a later step.

【0012】このようにしてリードフレーム11に半田
箔シート1を接着したならば、モールドプレス装置によ
り、チップ12を保護するモールド体26を形成する
(図4参照)。次いで、モールド体26から延出するア
ウターリード15aをプレス装置により打抜くととも
に、屈曲フォーミングすれば、電子部品10が完成する
(図5参照)。図3及び図4において、破線aはプレス
装置による打抜き線である。
After the solder foil sheet 1 is adhered to the lead frame 11 in this way, a mold pressing device is used to form a mold body 26 for protecting the chip 12 (see FIG. 4). Next, the outer lead 15a extending from the mold body 26 is punched by a pressing device and is bent and formed, whereby the electronic component 10 is completed (see FIG. 5). In FIGS. 3 and 4, the broken line a is a punching line formed by the press machine.

【0013】図5はチップマウンタにより電子部品10
を基板31に搭載した状態を示している。図示するよう
に、半田部である上記舌片4は、アウターリード15a
の着地部15a’の下面に接着されており、この舌片4
は基板31の電極32に着地している。次にリフロー装
置などにより加熱処理して舌片(半田部)4を溶融固化
させると、アウターリード15aは電極32に接着され
る(図6参照)。
FIG. 5 shows an electronic component 10 using a chip mounter.
Is mounted on the substrate 31. As shown in the figure, the tongue piece 4 which is the solder portion has the outer lead 15a.
Of the tongue piece 4 which is adhered to the lower surface of the landing portion 15a 'of
Touches the electrode 32 of the substrate 31. Next, when the tongue piece (solder portion) 4 is melted and solidified by heat treatment with a reflow device or the like, the outer lead 15a is bonded to the electrode 32 (see FIG. 6).

【0014】上記実施例では、チップ12が搭載された
リードフレーム11に半田箔シート1を接着している
が、半田箔シート1の接着タイミングはこれに限定され
ないのであって、チップ12を搭載前に接着してもよ
く、また以下に説明するようにモールドプレス装置によ
りモールド体26を形成する際に、これと同時に半田箔
シート1を接着してもよいものである。
In the above embodiment, the solder foil sheet 1 is bonded to the lead frame 11 on which the chip 12 is mounted, but the bonding timing of the solder foil sheet 1 is not limited to this. Alternatively, the solder foil sheet 1 may be adhered at the same time when the mold body 26 is formed by the mold pressing apparatus as described below.

【0015】図7はモールドプレス装置により半田箔シ
ート1を接着中の断面図であって、下型42上にリード
フレーム11を載置し、上型41の下面に半田箔シート
1が吸着されている。43,44は溶融樹脂が圧入され
るキャビティ、45は半田箔シート1の吸着孔、46は
吸引チューブである。上型41を下型42上に着地さ
せ、キャビティ43,44に溶融樹脂を圧入することに
より、チップ12をモールドするモールド体が形成され
るが、その際、半田箔シート1は上型41によりリード
フレーム11に押し付けられて接着される。但しこの場
合、モールドプレス時の温度が半田箔シート1の溶融温
度よりも高くなると、半田箔シート1が溶融してしまう
ので、モールドプレス時の温度は半田箔シート1の溶融
温度よりも低くする。
FIG. 7 is a cross-sectional view of the solder foil sheet 1 being bonded by the mold pressing apparatus. The lead frame 11 is placed on the lower mold 42, and the solder foil sheet 1 is adsorbed on the lower surface of the upper mold 41. ing. 43 and 44 are cavities into which molten resin is press-fitted, 45 is suction holes of the solder foil sheet 1, and 46 is a suction tube. A mold body for molding the chip 12 is formed by landing the upper mold 41 on the lower mold 42 and press-fitting the molten resin into the cavities 43, 44. At this time, the solder foil sheet 1 is formed by the upper mold 41. The lead frame 11 is pressed and adhered. However, in this case, if the temperature during mold pressing becomes higher than the melting temperature of the solder foil sheet 1, the solder foil sheet 1 will melt, so the temperature during mold pressing should be lower than the melting temperature of the solder foil sheet 1. .

【0016】[0016]

【発明の効果】以上説明したように本発明は、リードフ
レームのアウターリードに半田箔シートを接着するよう
にしているので、基板の電極に半田部を形成する必要は
ない。また半田箔シートの厚さを変えることにより、ア
ウターリードに形成される半田部(舌片)の厚さを変え
られるので、半田部(舌片)の厚さ管理を正確に行うこ
とができ、しかもその厚さを厚くすることができるの
で、アウターリードに少々の浮きがあっても、基板の電
極に確実に接着できる。
As described above, according to the present invention, since the solder foil sheet is adhered to the outer leads of the lead frame, it is not necessary to form the solder portion on the electrode of the substrate. Further, by changing the thickness of the solder foil sheet, the thickness of the solder portion (tongue) formed on the outer lead can be changed, so that the thickness of the solder portion (tongue) can be accurately controlled. Moreover, since the thickness can be increased, even if the outer leads are slightly lifted, they can be reliably bonded to the electrodes on the substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る半田箔シートとリードフレームの
斜視図
FIG. 1 is a perspective view of a solder foil sheet and a lead frame according to the present invention.

【図2】本発明に係る半田箔シートの接着装置の断面図FIG. 2 is a sectional view of a solder foil sheet bonding apparatus according to the present invention.

【図3】本発明に係る半田箔シートとリードフレームの
接着状態の平面図
FIG. 3 is a plan view of a bonded state of a solder foil sheet and a lead frame according to the present invention.

【図4】本発明に係るモールドプレス後の側面図FIG. 4 is a side view after the mold press according to the present invention.

【図5】本発明に係る基板に搭載した電子部品の側面図FIG. 5 is a side view of an electronic component mounted on a substrate according to the present invention.

【図6】本発明に係るリフロー後の電子部品の部分側面
FIG. 6 is a partial side view of the electronic component after reflow according to the present invention.

【図7】本発明の他の実施例に係る半田箔シートの接着
装置の断面図
FIG. 7 is a sectional view of a solder foil sheet bonding apparatus according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 半田箔シート 11 リードフレーム 15a アウターリード 1 Solder foil sheet 11 Lead frame 15a Outer lead

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】アウターリードに半田箔シートを接着して
成ることを特徴とするリードフレーム。
1. A lead frame comprising a solder foil sheet adhered to an outer lead.
JP5256392A 1992-03-11 1992-03-11 Lead frame Pending JPH05259342A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5256392A JPH05259342A (en) 1992-03-11 1992-03-11 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5256392A JPH05259342A (en) 1992-03-11 1992-03-11 Lead frame

Publications (1)

Publication Number Publication Date
JPH05259342A true JPH05259342A (en) 1993-10-08

Family

ID=12918273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5256392A Pending JPH05259342A (en) 1992-03-11 1992-03-11 Lead frame

Country Status (1)

Country Link
JP (1) JPH05259342A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002111201A (en) * 2000-10-03 2002-04-12 Ibiden Co Ltd Method of manufacturing printed board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002111201A (en) * 2000-10-03 2002-04-12 Ibiden Co Ltd Method of manufacturing printed board

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