JPH05252419A - Video signal processor - Google Patents

Abstract

PURPOSE:To execute AGC and a gamma correction at the time of A/D conversion, and also, to simplify the circuit configuration, and to realize the low power consumption. CONSTITUTION:The processor is provided with an AGC/gamma correcting function built-in parallel type A/D converter 105, and its control is executed by feedback control which passes through a DSP 106 of the post-stage and a control circuit 108 of a microcomputer, etc. In such a way, with regard to an AGC function/gamma correcting function block, an analog processing block is curtailed, and also, the video signal processor which can execute realization of low power consumption and programmable control, and improves the performance of a system can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image including an automatic gain control (hereinafter referred to as AGC) system which is one of signal processing blocks in a digital camera system and a gamma (hereinafter referred to as γ) correction system. The present invention relates to a signal processing device.

[0002]

2. Description of the Related Art A conventional video signal processing apparatus will be described below with reference to the drawings.

FIG. 4 is a block diagram of a video signal processing apparatus including a conventional AGC and γ correction processing circuit. FIG. 5 (a)
FIG. 3 is a characteristic diagram showing the relationship between the amount of light and the output of an image sensor (hereinafter referred to as CCD). FIG. 5B is a characteristic diagram showing the relationship between the AGC input and the AGC / γ correction output. FIG. 5C is a characteristic diagram showing the relationship between the input level and the output level due to the difference in γ. FIG. 6 is a basic model diagram showing a converter for converting a parallel type analog signal into a digital signal (hereinafter referred to as an A / D converter). FIG. 7 is a basic characteristic diagram of a parallel type A / D converter.

In FIG. 4, reference numeral 301 is a video signal input terminal for CCD output or the like. 302 CDS circuit for only the sample-and-hold signal components from the CCD output (C orelation
D ouble S ampling). Reference numeral 303 denotes an AGC for controlling the gain of the CDS output whose level changes depending on the brightness and for suppressing the high-luminance component to have a γ characteristic.
It is a γ correction circuit. 304 is the AGC / γ correction circuit 3
This is a parallel type A / D converter for converting the analog output of 03 into n-bit digital data. 305 generates a luminance signal and a color signal as digital data from the video signal that has passed through the parallel A / D converter 304, and
It is a digital video signal processing circuit (hereinafter referred to as DSP) that detects an input video signal level. 306 is the D
It is a D / A converter for converting a luminance signal and a color signal, which are digital signal outputs of the SP 305, into analog signals. Reference numeral 307 is a video signal output terminal. 308 is the D
It is the detection data of the input video signal level output from the SP 305. 309 is A based on the detection data 308
A control circuit such as a microcomputer for controlling the GC / γ correction circuit 303. Reference numeral 310 is an AGC / γ correction circuit control signal output as an arbitrary DC value from the control circuit 309.

The operation of the AGC / γ correction circuit of the conventional video signal processing apparatus configured as described above will be described below.

First, as shown in FIG. 5 (a), the CCD output changes linearly with respect to the light amount until it reaches saturation. Is AG as shown in FIG.
The AGC / γ correction output is adjusted to be constant with respect to an arbitrary level change width of the C input, including the γ correction shown in FIG. 5C.

The parallel type A / D converter 304 shown in FIG.
_Has two reference voltage inputs, a lower reference voltage (V _{ref Bott} ) and an upper reference voltage (V _{ref Top} ) as shown in FIG. In addition, as shown in FIG.
AGC output since the digital output code "0" corresponds to the input equal to _{ref Bott} ) and the digital output code full scale corresponds to the input equal to (V _{ref Top} ).
The output level width of the γ correction circuit 303 is (V _{ref Top} ) −
The value is controlled to (V _{ref Bott} ).

Therefore, conventionally, in FIG. 4, the input signal level is detected by the DSP 305 from the output data of the parallel A / D converter 304, and the detected data 308 is input to the control circuit 309. Then, the AGC / γ correction circuit control signal 31 as an arbitrary DC value from the control circuit 309.
0 is input to the AGC / γ correction circuit 303. As a result, the output of the AGC / γ correction circuit is in the fixed input voltage range of the parallel A / D converter 304 (V _{ref Top} ) − (V
_The feedback control was performed to adjust the gain so as to match the _{ref Bott} ).

[0009]

However, in the above-mentioned conventional configuration, from the aspect of digitization of analog video signal processing, an analog processing circuit is left for AGC / γ correction, which reduces the number of parts and reduces the system. There was a problem in that the advantages peculiar to digital such as power consumption and programmable control could not be fully utilized.

The present invention solves the above-mentioned conventional problems, and the AG which has been conventionally performed in the analog processing block.
It is an object of the present invention to provide a video signal processing device having improved performance by working on a parallel type A / D converter which is the entrance of a digital processing block for C / γ correction processing.

[0011]

In order to solve the above conventional problems, a video signal processing apparatus according to the present invention has the following configuration. That is, the input signal level is detected from a converter for converting an analog signal having a plurality of DC control input terminals into a digital signal and an output signal code of the converter having a plurality of DC control input terminals for converting an analog signal into a digital signal. A digital signal processing circuit,
And a control circuit having a plurality of control output terminals for controlling a converter for converting an analog signal having the plurality of DC control input terminals into a digital signal according to the detection output of the digital signal processing circuit.

[0012]

With the above configuration, the parallel type A / D converter can be used as an AG
By incorporating the C function and γ correction function, and performing the control by feedback control via a control circuit such as a DSP and a microcomputer, analog processing blocks of the AGC function and γ correction function block are reduced and low power consumption is achieved. It is possible to realize a video signal processing device with improved performance and system performance.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a video signal processing device according to an embodiment of the present invention. FIG. 2 is a block diagram showing a configuration of a parallel A / D converter with a built-in AGC / γ correction function in a video signal processing apparatus according to an embodiment of the present invention. 3 (a), (b), and (c) are the AGC of the present invention.
It is a characteristic view which shows the input-output characteristic of the parallel type A / D converter with a gamma correction function.

In FIG. 1, reference numeral 101 is a video signal input terminal such as a CCD output. A CDS circuit 102 samples and holds only a signal component from a video signal such as a CCD output. An amplifier 103 gives a constant gain to the output of the CDS circuit 102. Reference numeral 104 is a clamp circuit for clamping the reference level of the signal to an arbitrary potential. Reference numeral 105 denotes a parallel A / D converter with an AGC / γ correction function for performing AGC / γ correction and converting an analog input signal into n-bit digital data.
Reference numeral 106 denotes a DSP that generates a digital luminance signal and a digital color signal from the digital video signal that has passed through the parallel type A / D converter 105 with the built-in AGC / γ correction function, and detects the input video signal level. 107 is the DS
This is the detection data of the input video signal level output from P106. Reference numeral 108 is a control circuit such as a microcomputer that controls the parallel A / D converter 105 with a built-in AGC / γ correction function based on the detection data 107. 109 is the AG
This is a control signal for controlling the parallel A / D converter 105 with a built-in C / γ correction function. Reference numeral 110 denotes a D / A converter for converting the digital luminance signal and the digital color signal output from the DSP 106 into an analog signal. 1
Reference numeral 11 is a video signal output terminal.

In FIG. 2, 201 is a reference voltage (V
_IN ) Input terminal. 202 is AGC / γ correction and A
This is an input terminal for the lower limit reference voltage (V _{ref Bott} ) at the time of / D conversion. Reference numeral 203 denotes an intermediate voltage (V _{ref Mid} ) input terminal that realizes the AGC function and determines the knee point of γ correction. Reference numeral 204 is an upper limit reference voltage (V _{ref Top} ) input terminal for realizing the AGC function. Reference numeral 205 denotes a group of 2 ⁿ -1 comparators that give a determination output of 2 ⁿ -1 stages to the subsequent stage for n-bit resolution. Reference _numeral 206 designates a lower limit reference voltage (V _{ref Bott} ) input terminal 202 and an intermediate voltage (V _ref
Mid) input terminal 203, an upper limit reference voltage (V _{r ef Top)} connected resistor groups to the input terminal 204. 207 is 2 ⁿ −
It is an encoder logic circuit that encodes one comparator output into n bits. Reference numeral 208 is an n-bit digital output.

Regarding the video signal processing device according to the present invention configured as described above, the AGC by the A / D converter will be described below.
The function and the γ correction function will be mainly described.

First, in order to realize the AGC function, the CCD output signal input from the video signal input terminal 101 is CDS.
Parallel circuit A / with AGC / γ correction function via circuit 102
The gain is increased by the amplifier 103 so that the level becomes an arbitrary level within the variable input voltage range of the D converter 105. The optical black (hereinafter referred to as OB) level, which is the reference level in the clamp circuit 104, matches the pre-fixed lower limit reference voltage (V _{ref Bott} ) of the parallel A / D converter 105 with a built-in AGC / γ correction function. Clamp as you would. Then, assuming that an arbitrary input signal is input to the AGC / γ correction function built-in parallel A / D converter 105 having the configuration shown in FIG. 2, the digital data after A / D conversion is peaked at the input signal level by the DSP 106. , An average value, etc. are detected, and the detected data 107 is input to a control circuit 108 such as a microcomputer. Then, when the control circuit 108 determines that the input signal level is low, the degree of the input signal level is converted into a negative DC voltage change component, and the control signal 109
Is sent to the upper limit reference voltage (V _{ref Top} ) input terminal 204 of the parallel A / D converter 105 with a built-in AGC / γ correction function.

As shown in FIG. 3A, when the upper limit reference voltage (V _{ref Top} ) becomes smaller, the reference voltage (V _IN ) of the 2 ⁿ -1 comparator group 205 becomes smaller, and the input signals are compared by analog comparison. It can be seen that the output digital data becomes larger than before control. Conversely, control circuit 1
08 determines that the input signal level is high, the degree of the level is determined by the upper limit reference voltage (V _{ref Top} ) input terminal 2
It is output as an increasing component of the voltage input to 04.

As shown in FIG. 3B, when the upper limit reference voltage (V _{ref Top} ) increases, the reference voltage (V _IN ) of the 2 ⁿ -1 comparator groups 205 increases, and the input signals are compared by analog comparison. It can be seen that the output digital data becomes smaller than before control. By sequentially performing these two controls as feedback control,
AGC function can be realized.

Next, the gamma correction function will be described. First, as shown in FIG. 3C, the lower limit reference voltage (V _{ref Bott} )
Is set to a fixed level that matches the OB level, and the upper limit reference voltage (V _{ref Top} ) is considered to be a fixed level. The intermediate voltage (V _{ref Mid} ) controls the reference potential at a position set to _½ of the A / D conversion output from zero to full scale. In the above setting, in FIG. 3C, the intermediate voltage (V _{ref Mid} ) is set to (V _{ref Bott} ) <(V _{ref Mid} ) <(V _{ref Top} −V
_{ref Bott)} / By controlling the negative direction in the second range shown in FIG. 3 (c) in (1) to (2) inclined intermediate voltage (V _{ref Mid)} as knee point as to (3) Can be changed. The change ratio of the slope at this time is the intermediate voltage (V
_{Assuming that} the voltage control position of _{ref Mid} ) is at the ^nth gradation with the full scale being the 2nd gradation, x / (V _{ref Mid} −V _{ref Bott} ) = (2 ⁿ −x) / (V _{ref Top} -V _{ref Mid} ) (1) In the above embodiment, since x = 2 ⁿ −x and x = 2 ^n−1, equation 1
Becomes 1 / (V _{ref Mid} −V _{ref Bott} ) = 1 / (V _{ref Top} −V _{ref Mid} ) ... (2).

The change ratio of the slope when controlled by a plurality of control signals such as (V _{ref Mid1} ) and (V _{ref Mid2} ) as the intermediate voltage (V _{ref Mid} ) is x ₁ / (V _{ref Mid1} −V _{ref Bott) = x 2 / (V} ref Mid2 -V ref Mid1) = x 3 / (V ref Top -V ref Mid2) becomes ......... (3).

The AGC function and the γ correction function can be realized at the time of A / D conversion by sequentially performing the feedback control by interlocking the AGC function and the γ correction function described above, thereby reducing the power consumption, A video signal processing device capable of programmable control can be realized.

[0023]

As described above, the present invention is provided with a control circuit such as a microcomputer for controlling the DSP and the A / D converter in order to determine the variable reference potential of the A / D converter by the feedback control of the video signal. As a result, both AGC and γ correction can be performed during A / D conversion. In addition, it is possible to realize an excellent video signal processing device that realizes simplification of the circuit and reduction of power consumption and can perform programmable control.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a video signal processing device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a parallel type A / D converter with a built-in AGC / γ correction function in a video signal processing device according to an embodiment of the present invention.

FIG. 3 is a characteristic diagram showing input / output characteristics of a parallel A / D converter with a built-in AGC / γ correction function in a video signal processing apparatus according to an embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a video signal processing device including a conventional AGC / γ correction processing circuit.

FIG. 5 is a characteristic diagram of a conventional CCD, AGC circuit, and γ correction circuit.

FIG. 6 is a model diagram showing a conventional parallel type A / D converter.

FIG. 7 is a basic characteristic diagram of a conventional parallel type A / D converter.

[Explanation of reference numerals] 101 video signal input terminal 102 CDS circuit 103 amplifier 104 clamp circuit 105 parallel A / D converter with built-in AGC / γ correction function 106 DSP 107 detection data 108 control circuit 109 control signal 110 D / A converter 111 Video signal output terminal 201 Reference voltage (V _IN ) input terminal 202 Lower limit reference voltage (V _{ref Bott} ) input terminal 203 Intermediate voltage (V _{ref Mid} ) input terminal 204 Upper reference voltage (V _{ref Top} ) input terminal 205 2 ⁿ −1 Number of comparators 206 Resistor group 207 Encoder logic circuit 208 n-bit digital output 301 Video signal input terminal 302 CDS circuit 303 AGC / γ correction circuit 304 Parallel A / D converter 305 DSP 306 D / A converter 307 Video signal output Terminal 308 Detection data 309 Control Road 310 AGC · gamma correction circuit control signal

Claims (1)

[Claims] 1. A converter for converting an analog signal having a plurality of DC control input terminals into a digital signal, and an output signal code of the converter for converting an analog signal having a plurality of DC control input terminals into a digital signal. A digital signal processing circuit for detecting a signal level, and a plurality of control output terminals for controlling a converter for converting an analog signal having a plurality of DC control input terminals into a digital signal by the detection output of the digital signal processing circuit are provided. A video signal processing device comprising: a control circuit.