JPH05235508A - Manufacture of ceramic wiring board - Google Patents

Manufacture of ceramic wiring board

Info

Publication number
JPH05235508A
JPH05235508A JP3535992A JP3535992A JPH05235508A JP H05235508 A JPH05235508 A JP H05235508A JP 3535992 A JP3535992 A JP 3535992A JP 3535992 A JP3535992 A JP 3535992A JP H05235508 A JPH05235508 A JP H05235508A
Authority
JP
Japan
Prior art keywords
wiring board
ceramic substrate
ceramic
electroless plating
ceramic wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3535992A
Other languages
Japanese (ja)
Inventor
Satoru Ogawa
悟 小川
Yoshiharu Kasai
笠井与志治
Kazunobu Morioka
一信 盛岡
Masaya Koyama
雅也 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP3535992A priority Critical patent/JPH05235508A/en
Publication of JPH05235508A publication Critical patent/JPH05235508A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the dropping-out of nuclear, and easily form a metal film having high adhesion on the surface of a ceramic substrate without skip phenomenon. CONSTITUTION:In a manufacturing method of a ceramic wiring board which method contains a process wherein, after a nucleation process is performed on the surface of a ceramic substrate, a metal film is formed by using electroless plating, heat treatment is performed after the nucleation process is performed, and the electroless plating is performed. Thus a ceramic wiring board is manufactured.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、セラミック配線板の
製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a ceramic wiring board.

【0002】[0002]

【従来の技術】無電解メッキを利用してセラミック配線
板を製造する方法の一つに、フルアディティブ法があ
る。この場合、セラミック基板の表面に、無電解メッキ
用の核(例えばPd核)を付着させた(核付け処理し
た)後、レジストマスクを形成してから、セラミック基
板の表面のうちレジスト層で覆われていない部分に、無
電解メッキにより金属膜(導体層)を析出させるという
ものである。
2. Description of the Related Art One of the methods for manufacturing a ceramic wiring board using electroless plating is the full additive method. In this case, after depositing (nucleating) nuclei for electroless plating (for example, Pd nuclei) on the surface of the ceramic substrate, a resist mask is formed and then covered with a resist layer on the surface of the ceramic substrate. A metal film (conductor layer) is deposited by electroless plating on the unetched portion.

【0003】上記の方法は、低コスト化が図れるという
利点があるが、無電解メッキ用の核が脱落し易いという
問題がある。核の脱落は、無電解メッキにおいて、スキ
ップ現象(部分的に金属膜が析出しない現象)を引き起
こしたり、金属膜のセラミック基板に対する密着性を低
下させたりする原因となる。核の脱落が起こり易いの
は、核がセラミック基板の表面に物理的に吸着している
からであるが、この核の脱落の問題は、以下の場合に特
に顕著である。
The above method has an advantage that the cost can be reduced, but has a problem that the core for electroless plating is easily dropped. The detachment of the nuclei causes a skip phenomenon (a phenomenon in which the metal film is not partially deposited) in the electroless plating or a decrease in adhesion of the metal film to the ceramic substrate. The reason why the nuclei fall off easily occurs because the nuclei are physically adsorbed on the surface of the ceramic substrate, but the problem of the nuclei fall off is particularly remarkable in the following cases.

【0004】レジストマスクの形成に感光性有機レジス
ト材を用いた場合、高精度で微細な回路形成が可能であ
るという利点がある。普通、感光性有機レジスト材を塗
布したあと露光して現像することによりレジストマスク
を完成するのであるが、不要なレジスト材を除く洗浄処
理を行う必要があり、この洗浄処理で核が脱落し易い。
特に回路が微細な場合、僅かなスキップ現象や金属膜の
密着性低下が回路の不良につながるため、核の脱落を確
実に防止する必要がある。
When a photosensitive organic resist material is used for forming the resist mask, there is an advantage that a fine circuit can be formed with high accuracy. Normally, a resist mask is completed by applying a photosensitive organic resist material, then exposing and developing it, but it is necessary to carry out a cleaning process to remove unnecessary resist materials, and this cleaning process causes the nucleus to fall off easily. ..
In particular, when the circuit is fine, a slight skip phenomenon and a decrease in the adhesion of the metal film lead to a defective circuit, so it is necessary to reliably prevent the core from falling off.

【0005】[0005]

【発明が解決しようとする課題】この発明は、上記事情
に鑑み、核の脱落を防ぎ、スキップ現象が無く、しか
も、密着力の高い金属膜を容易にセラミック基板の表面
に形成することのできるセラミック配線板の製造方法を
提供することを課題とする。
SUMMARY OF THE INVENTION In view of the above circumstances, the present invention is capable of easily forming a metal film on the surface of a ceramic substrate, which prevents the nucleus from falling off, has no skip phenomenon, and has high adhesion. An object is to provide a method for manufacturing a ceramic wiring board.

【0006】[0006]

【課題を解決するための手段】この発明は、上記事情に
鑑み、この発明にかかるセラミック配線板の製造方法で
は、セラミック基板の表面に核付け処理を施してから無
電解メッキにより金属膜を形成する工程において、前記
核付け処理のあと熱処理してから前記無電解メッキを行
うようにしている。
In view of the above circumstances, the present invention provides a method for manufacturing a ceramic wiring board according to the present invention, in which a surface of a ceramic substrate is subjected to a nucleating treatment and then a metal film is formed by electroless plating. In the step of performing, the electroless plating is performed after the heat treatment after the nucleation treatment.

【0007】この発明で用いるセラミック基板として
は、特定のものである必要はなく、アルミナ基板を始め
公知の様々なセラミック基板が挙げられる。ただ、セラ
ミック基板の表面が粗面化されているものが好ましい。
粗面化することで無電解メッキで形成される金属膜が基
板表面に機械的に接合され高い密着力が得られるように
なるからである。粗面化の方法は特に限定されない。
The ceramic substrate used in the present invention does not have to be a specific one, and various known ceramic substrates such as an alumina substrate can be used. However, it is preferable that the surface of the ceramic substrate is roughened.
This is because by roughening the surface, the metal film formed by electroless plating is mechanically bonded to the surface of the substrate and high adhesion can be obtained. The method of surface roughening is not particularly limited.

【0008】この発明の場合、まず、セラミック基板の
表面に核付け処理する。核付け処理方法としては、特定
の方法である必要はなく、公知のセンシタイザー−アク
チベーター法、キャタリスト−アクセレーター法等が挙
げられる。核付け処理の後、セラミック基板を熱処理す
る。この熱処理は、例えば、窒素雰囲気といった不活性
雰囲気中あるいは真空雰囲気中で行うことが好ましい。
そうでないと、例えばPd核などように酸化して核とし
ての機能を失う事態が生じるからである。ただ、核とし
ての機能が損なわれないのであれば、特定の雰囲気で熱
処理を行う必要はない。熱処理を実施する場合、核付け
したセラミック基板を、500〜900℃程度の温度で
5〜30分程度保持するようにする。この熱処理によ
り、セラミック基板の表面に付着した核(例えばPd
核)は固定化されることになる。
In the case of the present invention, first, the surface of the ceramic substrate is subjected to a nucleating treatment. The nucleation treatment method does not have to be a specific method, and known sensitizer-activator method, catalyst-accelerator method and the like can be mentioned. After the nucleation process, the ceramic substrate is heat treated. This heat treatment is preferably performed in an inert atmosphere such as a nitrogen atmosphere or in a vacuum atmosphere.
Otherwise, for example, Pd nuclei may be oxidized to lose the function as nuclei. However, if the function as the core is not impaired, it is not necessary to perform the heat treatment in a specific atmosphere. When heat treatment is performed, the nucleated ceramic substrate is held at a temperature of about 500 to 900 ° C. for about 5 to 30 minutes. By this heat treatment, nuclei (for example, Pd) attached to the surface of the ceramic substrate are
The nucleus will be fixed.

【0009】続いて、セラミック基板の表面にレジスト
マスクを形成する。このレジストマスクは、感光性有機
レジスト材(感光性有機樹脂組成物など)を用いて形成
することが好ましい。感光性有機レジスト材をセラミッ
ク基板の表面に塗布した後、露光、現像処理して所定の
パターンのレジストマスクにする。勿論、レジストマス
ク形成用のレジスト材は、感光性有機レジスト材に限ら
ず、洗浄処理を伴わずにマスク形成が可能なレジスト材
(例えば、熱硬化型のレジスト材等)を用いるようにし
てもよい。
Subsequently, a resist mask is formed on the surface of the ceramic substrate. This resist mask is preferably formed using a photosensitive organic resist material (photosensitive organic resin composition or the like). A photosensitive organic resist material is applied to the surface of the ceramic substrate, and then exposed and developed to form a resist mask having a predetermined pattern. Of course, the resist material for forming the resist mask is not limited to the photosensitive organic resist material, and a resist material (for example, a thermosetting resist material) capable of forming a mask without a cleaning process may be used. Good.

【0010】レジストマスクは無電解メッキの後、除去
される場合もあるし除去せず永久レジストマスクとする
場合もある。最後に、無電解メッキを行い、セラミック
基板の表面におけるレジスト層のない部分に金属膜を析
出形成する。なお、無電解メッキ処理の前に酸による核
の活性化を行うことが好ましい。無電解メッキとして
は、無電解銅メッキ、無電解ニッケルメッキなど様々な
ものが利用でき、特定のものに限らない。
The resist mask may be removed after electroless plating or may be a permanent resist mask without being removed. Finally, electroless plating is performed to deposit and form a metal film on the surface of the ceramic substrate where there is no resist layer. It is preferable to activate the nucleus with an acid before the electroless plating treatment. As electroless plating, various ones such as electroless copper plating and electroless nickel plating can be used and are not limited to particular ones.

【0011】以上の説明においては、いわゆるフルアデ
ィティブ法に従ってセラミック配線板を得ているのであ
るが、この発明は、フルアディティブ法に従う必要は必
ずしもなく、例えば、セミアディティブ法に従うようで
あってもよい。
In the above description, the ceramic wiring board is obtained according to the so-called full-additive method. However, the present invention does not necessarily follow the full-additive method, and may follow the semi-additive method, for example. ..

【0012】[0012]

【作用】この発明のセラミック配線板の製造方法の場
合、前記核付け処理の後に行われる熱処理で、核がセラ
ミック基板の表面に固定化されているため、レジストマ
スク形成において洗浄処理が行われる場合においても、
核の脱落が起こり難く、析出した金属膜にはスキップ現
象や密着力低下が見られなくなる。それに、核の脱落防
止のために従来の工程に加わるのが、熱処理という非常
に簡単な操作だけであるため、上記の適正な金属膜が容
易にセラミック基板の表面に形成できることになる。
In the method of manufacturing a ceramic wiring board according to the present invention, since the nuclei are fixed on the surface of the ceramic substrate by the heat treatment performed after the nucleation process, the cleaning process is performed in the resist mask formation. Even in
It is difficult for the nucleus to fall off, and the deposited metal film does not show a skip phenomenon or a decrease in adhesion. Besides, since only a very simple operation of heat treatment is added to the conventional process for preventing the detachment of the nuclei, the above-mentioned appropriate metal film can be easily formed on the surface of the ceramic substrate.

【0013】通常、無電解メッキ前にレジストマスクを
形成するが、感光性有機レジスト材を用いてレジストマ
スクを形成する場合、微細なパターンのレジストマスク
を作ることが出来、その結果、微細な回路のセラミック
配線板が製造可能であるという利点が加わる。
Usually, a resist mask is formed before electroless plating. However, when the resist mask is formed using a photosensitive organic resist material, a resist mask having a fine pattern can be formed, and as a result, a fine circuit can be formed. The additional advantage is that the ceramic wiring board can be manufactured.

【0014】[0014]

【実施例】以下、この発明の実施例を詳しく説明する。
この発明は、下記の実施例に限らない。 −実施例1− セラミック基板として、市販の96%アルミナ基板(縦
10cm、横10cm、厚み0.5mm)を使い、これ
を330℃の熱リン酸浴に3分間浸漬し、粗面化処理し
た。
Embodiments of the present invention will be described in detail below.
The present invention is not limited to the following embodiments. -Example 1-As a ceramic substrate, a commercially available 96% alumina substrate (length 10 cm, width 10 cm, thickness 0.5 mm) was used, and this was immersed in a hot phosphoric acid bath at 330 ° C for 3 minutes for roughening treatment. .

【0015】粗面化の後、センシタイザー−アクチベー
タ法により、無電解メッキの核となるPd核をセラミッ
ク基板の表面に付着させる核付け処理を行った。つい
で、核付け処理したセラミック基板を、窒素雰囲気中、
800℃の温度で15分間熱処理した。この後、感光性
のソルダーレジスト材(感光性有機レジスト材)をセラ
ミック基板の表面に塗布した後、露光、現像処理し所定
のパターンのレジストマスクを基板表面に設けた。
After the roughening, a sensitizer-activator method was used to carry out a nucleation treatment for adhering Pd nuclei, which are nuclei for electroless plating, to the surface of the ceramic substrate. Then, the ceramic substrate subjected to the nucleation treatment was placed in a nitrogen atmosphere,
Heat treatment was performed at a temperature of 800 ° C. for 15 minutes. Then, a photosensitive solder resist material (photosensitive organic resist material) was applied on the surface of the ceramic substrate, and then exposed and developed to form a resist mask having a predetermined pattern on the surface of the substrate.

【0016】そして、5%の塩酸でPd核を活性化して
おいてから、公知の高速無電解銅メッキ浴中にセラミッ
ク基板を浸漬し、厚み10μmの銅膜をレジスト層のな
い部分に析出させた。なお、レジストマスクは除去せず
に残すようにした。セラミック基板の表面に析出させた
銅膜にはスキップ現象は全く見られず、銅膜の密着力も
2.5kg/mm2 以上と十分に高かった。
After activating the Pd nuclei with 5% hydrochloric acid, the ceramic substrate is dipped in a known high-speed electroless copper plating bath to deposit a copper film having a thickness of 10 μm on a portion without a resist layer. It was The resist mask was left without being removed. No skip phenomenon was observed in the copper film deposited on the surface of the ceramic substrate, and the adhesion of the copper film was sufficiently high at 2.5 kg / mm 2 or more.

【0017】 −実施例2− 熱処理を、窒素雰囲気中、900℃の温度で10分間行
うようにした他は、実施例1と同様にしてセラミック配
線板を得たが、実施例1と同様の結果が得られた。 −実施例3− レジストマスクを感光性のメッキレジスト材(感光性有
機レジスト材)で形成するとともに、無電解メッキのあ
とレジストマスクを除去するようにした他は、実施例2
と同様にしてセラミック配線板を得たが、実施例2と同
様の結果が得られた。
Example 2 A ceramic wiring board was obtained in the same manner as in Example 1 except that the heat treatment was performed in a nitrogen atmosphere at a temperature of 900 ° C. for 10 minutes, but the same as in Example 1. Results were obtained. -Example 3 Example 2 was repeated except that the resist mask was formed of a photosensitive plating resist material (photosensitive organic resist material) and the resist mask was removed after electroless plating.
A ceramic wiring board was obtained in the same manner as in, but the same results as in Example 2 were obtained.

【0018】−実施例4− レジストマスクを熱硬化型のソルダーレジスト材を所定
のパターンでセラミック基板の表面に塗布し硬化させる
ことにより形成するようにした他は、実施例1と同様に
してセラミック配線板を得たが、実施例1と同様の結果
が得られた。 −実施例5− 熱処理を、真空中、600℃の温度で20分間行うよう
にした他は、実施例1と同様にしてセラミック配線板を
得たが、実施例1と同様の結果が得られた。
Example 4 A ceramic is prepared in the same manner as in Example 1 except that the resist mask is formed by applying a thermosetting solder resist material on the surface of the ceramic substrate in a predetermined pattern and curing it. A wiring board was obtained, and the same results as in Example 1 were obtained. Example 5 A ceramic wiring board was obtained in the same manner as in Example 1 except that the heat treatment was performed in vacuum at a temperature of 600 ° C. for 20 minutes, but the same results as in Example 1 were obtained. It was

【0019】−比較例1− 熱処理を省略した他は、実施例1と同様にしてセラミッ
ク配線板を得たが、銅膜にはスキップ現象が見られ、銅
膜の密着力も0.5kg/mm2 程度と非常に低かっ
た。実施例1と比較例1の結果を比べれば、核付け処理
のあと行う熱処理が核の脱落阻止に非常に有効であるこ
とが良く分かる。
-Comparative Example 1-A ceramic wiring board was obtained in the same manner as in Example 1 except that the heat treatment was omitted. However, a skip phenomenon was observed in the copper film and the adhesion of the copper film was 0.5 kg / mm. It was very low, around 2. Comparing the results of Example 1 and Comparative Example 1, it can be clearly seen that the heat treatment performed after the nucleation treatment is very effective in preventing the nucleus from falling off.

【0020】[0020]

【発明の効果】この発明のセラミック配線板の製造方法
の場合、熱処理で核がセラミック基板の表面に固定化さ
れているため、レジストマスク形成において洗浄処理が
行われる場合においても、核の脱落が起こり難く、析出
した金属膜にはスキップ現象や密着力低下が見られなく
なるだけでなく、核の脱落防止のために従来の工程に加
わるのが、熱処理という非常に簡単な操作だけであるか
ら、上記適正な金属膜のセラミック基板の表面への形成
は容易であり、したがって、この発明は非常に有用であ
る。
In the method for manufacturing a ceramic wiring board according to the present invention, since the nuclei are fixed on the surface of the ceramic substrate by the heat treatment, the nuclei do not fall off even when the cleaning process is performed in forming the resist mask. It is hard to occur, and not only the skip phenomenon and the decrease in adhesion force are not seen in the deposited metal film, but it is only a very simple operation called heat treatment that is added to the conventional process to prevent the nucleus from falling off, It is easy to form the appropriate metal film on the surface of the ceramic substrate, and the present invention is very useful.

【0021】また、セラミック基板の表面に感光性有機
レジスト材を用いてレジストマスクを形成する場合、微
細な回路のセラミック配線板が製造可能であるという利
点が加わる。
Further, when the resist mask is formed on the surface of the ceramic substrate by using the photosensitive organic resist material, there is an additional advantage that a ceramic wiring board having a fine circuit can be manufactured.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小山 雅也 大阪府門真市大字門真1048番地松下電工株 式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masaya Koyama 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 セラミック基板の表面に核付け処理を施
してから無電解メッキにより金属膜を形成する工程を含
むセラミック配線板の製造方法において、前記核付け処
理のあと熱処理してから前記無電解メッキを行うように
することを特徴とするセラミック配線板の製造方法。
1. A method for manufacturing a ceramic wiring board, comprising a step of forming a metal film by electroless plating after performing a nucleating treatment on the surface of a ceramic substrate, and performing a heat treatment after the nucleating treatment and then performing the electroless plating. A method for manufacturing a ceramic wiring board, which comprises performing plating.
【請求項2】 熱処理のあと、セラミック基板の表面に
感光性有機レジスト材を用いてレジストマスクを形成し
てから無電解メッキを行う請求項1記載のセラミック配
線板の製造方法。
2. The method for manufacturing a ceramic wiring board according to claim 1, wherein after the heat treatment, a resist mask is formed on the surface of the ceramic substrate using a photosensitive organic resist material, and then electroless plating is performed.
JP3535992A 1992-02-21 1992-02-21 Manufacture of ceramic wiring board Pending JPH05235508A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3535992A JPH05235508A (en) 1992-02-21 1992-02-21 Manufacture of ceramic wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3535992A JPH05235508A (en) 1992-02-21 1992-02-21 Manufacture of ceramic wiring board

Publications (1)

Publication Number Publication Date
JPH05235508A true JPH05235508A (en) 1993-09-10

Family

ID=12439693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3535992A Pending JPH05235508A (en) 1992-02-21 1992-02-21 Manufacture of ceramic wiring board

Country Status (1)

Country Link
JP (1) JPH05235508A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001119128A (en) * 1999-08-11 2001-04-27 Mitsuboshi Belting Ltd Method of making ceramics circuit board
JP2009081208A (en) * 2007-09-25 2009-04-16 Panasonic Electric Works Co Ltd Method for manufacturing printed wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001119128A (en) * 1999-08-11 2001-04-27 Mitsuboshi Belting Ltd Method of making ceramics circuit board
JP4503792B2 (en) * 1999-08-11 2010-07-14 三ツ星ベルト株式会社 Manufacturing method of ceramic circuit board
JP2009081208A (en) * 2007-09-25 2009-04-16 Panasonic Electric Works Co Ltd Method for manufacturing printed wiring board

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