JPH05233847A - Microcomputer - Google Patents

Abstract

PURPOSE:To respectively independently measure a power source monitor circuit operating voltage and the bottom operating voltage by providing a switching circuit to switch and output a power source monitor signal while being controlled by a switching signal outputted from a system control circuit. CONSTITUTION:In addition to a ROM 1, RAM 2, CPU 3 and input/output port 4 provided at the conventional microcomputer, a switching circuit 13 is provided to connect the output signal of a power source monitor circuit 8 by switching that signal through a terminal (b) to a reset signal generating circuit 9 and through a terminal (c) to a power source monitor output signal line 16 while being controlled by a switching signal 14 outputted from a system control circuit 5. When a power supply voltage VD is decreased to a certain point, the power source monitor circuit 8 is operated, and that signal is outputted through the power source monitor output signal line 16 to the outside. An LSI tester reads this signal and decides the power supply voltage at that time as the power source monitor circuit operating voltage. Since the switching circuit 13 is connected to a terminal (a) or (c) at such a time, no reset signal 10 is generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer, and more particularly to a microcomputer test circuit having a power supply monitoring circuit built therein.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 3, a microcomputer having a built-in power supply monitoring circuit has a ROM 1 and its bus control circuit 15, RAM 2, CPU 3, system control circuit 5, reset signal generation circuit 9, power supply monitoring circuit. 8. The internal bus 6, the test mode setting signal line 11, the test mode signal line 12 and the reset signal line 10 are provided, and signals are exchanged with an external circuit via the external bus 7.

Next, the test of the minimum operation guarantee voltage among the selection test items of the microcomputer will be described. As the minimum operation guarantee voltage, this microcomputer is connected to the LSI tester via the external bus 7 and the power supply voltage is set to a predetermined voltage value. Then, the test mode setting signal 11 is activated and the bus control circuit 15 connected to the ROM 1 is controlled to disconnect the ROM 1 from the internal bus 6.

Next, the input / output port 4 is controlled to input an instruction from the LSI tester through the external bus 7, and the execution state is output to the external bus 7. The LSI tester reads this state and compares it with expected value data which is obtained in advance by simulation and determines whether the microcomputer is operating normally.

[0005]

In the conventional microcomputer incorporating the power supply monitoring circuit, a minimum operation guarantee voltage test (minimum operation guarantee voltage) VMIN>
(Power supply monitoring circuit operating voltage) VOP> (Minimum operating voltage) V
It is important to test whether the OMI conditions are met. In a conventional test, as shown in FIG. 4, an appropriate margin is set below the minimum operation guarantee voltage VMIN specified in the operation standard of the microcomputer,
It was determined whether to operate normally with the power supply voltage.

In general, the operation cannot be guaranteed with a power supply voltage lower than the minimum operation guarantee voltage, so that a malfunction may occur. On the other hand, when the power is turned on at a certain temperature, in the process of transitioning from the OV to the operating voltage, there is no choice but to pass through the malfunction region mentioned above. In other words, there is a possibility that the microcomputer will start operating in the normal operation area while retaining the operation history of the operation area when the power is turned on.

As a solution to this problem, as shown in FIG. 5 (a), the power supply monitoring circuit operates at a level higher than the minimum operating voltage at which the microcomputer actually starts operating, and the entire system is initialized. There is.

In the conventional test, as shown in FIG. 4, the test is performed at the test point P of the power supply voltage with a proper margin below the minimum operation guarantee voltage VMIN.
Therefore, when a test is performed on a microcomputer having a power supply monitoring circuit, there is a problem that the power supply monitoring circuit operates and the microcomputer may be tested while being reset.

Further, since it is not possible to independently test the operating voltage VOP and the minimum operating voltage of the power supply monitoring circuit, FIG.
As shown in (b), ICs that satisfy VMIN>VOMI> VOP are also judged as non-defective products.

In such an IC, when the power supply voltage is raised from OV, the power supply monitoring circuit operates first, and then the IC starts operating, so that the history of the malfunction area B is extended to the stable operation area above the minimum guaranteed operation voltage. This is a defective product that causes malfunctions when carried. That is, there is a problem that the defective product cannot be removed, and such an IC also malfunctions with respect to the voltage change at the time of battery replacement as shown in FIG.

[0011]

A microcomputer of the present invention internally includes a ROM, a RAM, a CPU, an input / output port internal bus, and a system control circuit and a reset signal generation circuit for controlling an internal circuit system constituted by them. A microcomputer including a power supply voltage monitoring circuit that monitors a power supply voltage supplied to the internal circuit system, outputs a power supply monitoring signal at a predetermined voltage, and outputs a reset signal generation signal for operating a reset signal generation circuit. A switching circuit for switching and outputting the power supply monitoring signal under the control of the switching signal output from the system control circuit is inserted between the output terminal of the power supply monitoring circuit and the input terminal of the reset signal generating circuit. ing.

[0012]

The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a microcomputer of the present invention. The microcomputer of this embodiment is the ROM1 and RAM of the conventional microcomputer shown in FIG.
2, the CPU 3 and the input / output port 4 are controlled by the switching signal 14 output from the system control circuit 5 to output the output signal of the power supply monitoring circuit 8 to the reset signal generation circuit 9 via the terminal b.
In addition, a switching circuit 13 for switching and connecting to the power supply monitoring output signal line 16 via the terminal c is added.

Next, the operation will be described. At the start of power-on in the normal mode, the ends a and b of the switching circuit 13 are in contact with each other, and as the power supply voltage VD rises, the individual circuits start to operate independently. The reset signal generation circuit 9 operates by the operation of the power supply monitoring circuit 8 as a trigger to reset the system and enter the normal operation state.

On the other hand, in the test mode, the test mode signal 12 is activated by externally activating the test mode setting signal 11, the bus control circuit 15 is operated, and the ROM 1 is disconnected from the internal bus 6. In addition, an instruction is input from the external bus via the input / output port 4, various tests are performed, the results are output to the external bus 7 via the input / output port 4, the results are read, and the LSI tester outputs the pattern. Match.

Further, in the test of the minimum operating voltage VOMI, when the test mode starts, the switching circuit 13 is switched to the a / b end direction to turn on the power supply, the system is reset to start the operation, and then the switching signal 14 is applied. After the switch circuit 13 is activated and the switching circuit 13 is switched to the terminals a and c, a command is input from the outside, and the output is used to lower the power supply voltage while checking the internal operation.

When the power supply voltage VD drops to a certain point, the power supply monitoring circuit 8 operates and its signal is output to the outside through the power supply monitoring output signal line 16. The LSI tester reads this signal and uses the power supply voltage at that time as the power supply monitoring circuit operating voltage. At this time, since the switching circuit 13 is connected to the terminals a and c, the reset signal 10 is not generated.

When the power supply voltage VD is further lowered, a portion where the internal state output and the expected value of the LSI tester are different appears. The power supply voltage VD at this time is the minimum operating voltage VOMI. Here, when the power supply monitoring circuit operating voltage VOP and the minimum operating voltage VOMI are opposite to the above description, the order of change of each state is also opposite to the above description.

FIG. 2 is a block diagram of the second embodiment of the present invention. The difference from the first embodiment is that the test R in which a test program is previously stored in the microcomputer.
The point is that the OM 17 and the control bus 15 are added.

In the case of the first embodiment, when the minimum operating voltage VOMI is obtained, an instruction is input from the outside and it is determined whether the instruction is executed correctly.

In the case of the present embodiment, the test ROM 17 is previously prepared.
Is executed, the instruction written in the test ROM 17 is read and executed. The execution result is once stored in the RAM, read out later, and compared with the expected value on the LSI tester, and the correct result is used as the minimum operating voltage VO.
Let's call it MI. The microcomputer of this embodiment is an RO
Test ROM for the minimum operating voltage VOMI due to M1
If the physical structure of the ROM 17 is the same as that of the ROM 1, the limit of the test ROM 17 can be substituted.

Further, according to this embodiment, since the execution result of the internal instruction group is read from the RAM 2 by applying the clock, L
Parallel measurement can be performed using the SI tester, increasing the production capacity.

[0022]

As described above, the present invention has an effect that the operating voltage of the power supply monitoring circuit and the minimum operating voltage can be measured independently in the microcomputer having the power supply monitoring circuit.

Due to this, [(minimum operation guarantee voltage) VMI
N> (power supply monitoring circuit operating voltage) VOP> (minimum operating voltage) VOMI] can be assured, and chips that cause defective operation when power is turned on can be selected and removed, which is a great improvement in quality.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of a second embodiment of the present invention.

FIG. 3 is a block diagram of an example of a conventional microcomputer.

FIG. 4 is a voltage characteristic diagram for explaining the operation of the block of FIG.

5 (a) to 5 (c) are diagrams showing respective voltages and power supply voltage of FIG.

[Explanation of symbols]

 1 ROM 2 RAM 3 CPU 4 I / O port 5 System control circuit 6 Internal bus 7 External bus 8 Power supply monitoring circuit 9 Reset signal generation circuit 10 Reset signal 11 Test mode setting signal 12 Test mode signal 13 Switching circuit 14 Switching signal 15 Bus control Circuit 16 Power supply monitoring output signal line 17 Test ROM

Claims (2)

[Claims] 1. A ROM, a RAM, a CPU, an input / output port internal bus, and a system control circuit for controlling an internal circuit system constituted by them and a reset signal generating circuit, and the power is supplied to the internal circuit system. In a microcomputer including a power supply voltage monitoring circuit that monitors a voltage and outputs a power supply monitoring signal at a predetermined voltage to operate a reset signal generation circuit, an output terminal of the power supply monitoring circuit and the reset A microcomputer, wherein a switching circuit for switching and outputting the power supply monitoring signal under the control of a switching signal output from the system control circuit is inserted between input terminals of the signal generating circuit. 2. The microcomputer according to claim 1, further comprising a test ROM which stores a test program in advance.