JP4179190B2 - One-chip microcomputer and one-chip microcomputer overvoltage application test method - Google Patents

Description

  The present invention relates to an overvoltage application test performed on a one-chip microcomputer.

  The burn-in test, which is a type of overvoltage application test, applies a power supply voltage higher than normal to the circuit in an environment where the temperature is higher than normal use before shipment when a semiconductor device such as a microcomputer is manufactured. The purpose of this is to reduce the initial failure rate in the field by performing the operation for a predetermined time in such a state and removing the product in which the failure has occurred in the process (screening).

  For example, Patent Document 1 discloses a technique for performing probing (needle alignment) for each chip in a state where chips as a semiconductor device are formed on a wafer, and applying a high voltage to perform a burn-in test. Yes. In such a system, since it is necessary to probe the minute electrodes on the chip, the operability is poor, and the equipment probe is very expensive because accuracy is required for the wafer prober and other jigs.

Further, since the probe pressure cannot be secured when the probing exceeds a predetermined number, the number of chips that can be processed at one time is limited. Further, since a certain amount of time is required for the burn-in test, for example, there is a problem that it takes time and the throughput is low as compared with the case where a burn-in test board such as that used for a monolithic IC is used.
JP-A-9-17832

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a one-chip microcomputer capable of performing an overvoltage application test more easily and an overvoltage application test method for the one-chip microcomputer. is there.

  According to the one-chip microcomputer of the first aspect, since the booster circuit is mounted on the same chip, the microcomputer alone boosts the power supply voltage supplied from the outside, and the overvoltage application test is performed using the boosted voltage. Easy to implement. Therefore, it is not necessary to perform probing for each chip using a jig as in the prior art, and the cost and time required for the overvoltage application test can be greatly reduced.

Then , when performing an overvoltage application test, the power supply switching means switches so that the boosted voltage generated by the booster circuit is supplied to a specific circuit unit that is supplied with the power supply having the highest voltage, and the other circuits. The same means performs switching so as to supply power to the unit with a voltage one step higher. Therefore, even when a circuit portion that operates at a different voltage is provided, an overvoltage application test can be efficiently performed.

According to the one-chip microcomputer of the second aspect, since the booster circuit is configured to operate only when the overvoltage application test is executed, an increase in power consumption due to the provision of the booster circuit is suppressed as much as possible. Can do.
According to the one-chip microcomputer of the third aspect , since the CPU executes the test program and executes the overvoltage application test, the execution of the test and the determination of the result can be performed by the microcomputer alone.

According to the one-chip microcomputer of claim 4 , when the CPU executes the test program, the CPU outputs a test signal to the data bus every time a predetermined time elapses, and the circuit unit to which the test signal is given outputs. Since the suitability of the response signal is determined, the quality of the circuit function can be confirmed at any time during the overvoltage application test.

(First embodiment)
A first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows a configuration of a one-chip microcomputer (microcomputer) 1 only in a portion related to the gist of the present invention. The microcomputer 1 includes a 3.3V system circuit unit 2 that operates with a power supply voltage of 3.3V and a 5V system circuit unit 3 that operates with a power supply voltage of 5V. The 3.3V circuit unit 2 corresponds to, for example, a part that performs internal processing of the microcomputer 1, and the 5V system unit 3 inputs and outputs signals to and from peripheral circuits (not shown) connected to the outside of the microcomputer 1, for example. It corresponds to the external signal interface part.

  Further, the microcomputer 1 has a booster circuit 4 mounted on the chip. The booster circuit 4 is configured to boost a power supply voltage of 5V supplied by a power supply IC connected to the outside of the microcomputer 1 to 6 to 7V. The 5V power is supplied to the 5V circuit unit 3 via the switch (power switching means) 5, and the voltage boosted by the booster circuit 4 is supplied to the switch (power switching means) 6. And is supplied to the 5V system circuit unit 3. The 3.3V power is supplied to the 3.3V system circuit section 2 via the switch (power switching means) 7, and the 5V power is also supplied via the switch (power switching means) 8. It is supplied to the 5V system circuit unit 3.

  These switches 5 to 8 are switched by setting the external terminal TEST of the microcomputer 1 to a level corresponding to the test mode. That is, the switches 5 and 8 are turned on in the normal mode, and the switches 6 and 7 are turned on in the test mode. The booster circuit 4 performs a boost operation when the external terminal is set to the test mode level. That is, in the test mode, the 5V power source is supplied to the 3.3V system circuit unit 2, and the boosted voltage of the booster circuit 4 is supplied to the 5V system circuit unit 3.

Next, the operation of this embodiment will be described. When the microcomputer 1 is normally operated, the level of the external terminal TEST is set to be low, for example. Then, the switches 5 and 8 are closed, 5V power is supplied to the 5V circuit unit 3, and 3.3V power is supplied to the 3.3V circuit unit 2 .

When performing the burn-in test (test mode), the external terminal TEST is set to be high. Then, the switches 6 and 7 are closed and the connection configuration shown in FIG. 1 is obtained, and the 5V power supply is supplied to the 3.3V system circuit unit 2 and the boosted voltage of the booster circuit 4 is supplied to the 5V system circuit unit 3 .

  By setting the power supply system as described above, the 3.3 V system circuit section 2 and the 5 V system circuit section 3 of the microcomputer 1 are in a state in which a power supply voltage higher than the normal operation state is supplied. Then, the microcomputer 1 is exposed to a high temperature environment (for example, 125 ° C.) in a high temperature bath, and a test signal output device (not shown) is connected to the input terminal IN. A dynamic burn-in test is performed by inputting a signal. The test time is 20 hours, for example.

  As described above, according to the present embodiment, since the booster circuit 4 is mounted on the chip of the microcomputer 1, the microcomputer 1 alone can boost the 5V power supply voltage supplied from the outside and perform the burn-in test. . Accordingly, it is not necessary to perform probing for each chip using a jig as in the prior art, and the cost and time required for the burn-in test can be greatly reduced.

  In the test mode, the 3.3V circuit unit 2 is switched to supply 5V power, and the 5V circuit unit 3 is switched to supply the boosted voltage of the booster circuit 4. Even when the 3.3V circuit unit 2 and the 5V system unit 3 are provided, it is not necessary to provide a booster circuit corresponding to each circuit unit 3 and 5, and the burn-in test is efficiently performed at low cost. can do. Furthermore, since the booster circuit 4 is configured to operate only when the burn-in test is performed, an increase in power consumption due to the provision of the booster circuit 4 can be suppressed as much as possible.

(Second embodiment)
2 and 3 show a second embodiment of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof is omitted, and only different parts will be described below. In the second embodiment, the microcomputer is equipped with a self-determination program for performing a monitor burn-in test, and the on-chip CPU of the microcomputer is configured to execute the self-determination program.

FIG. 2 shows the configuration of the one-chip microcomputer 21. Since the configuration of the power supply system is exactly the same as that of the microcomputer 1 of the first embodiment, the illustration thereof is omitted. The microcomputer 21 includes a CPU 23 and a memory (storage unit) 24 as a part of the 3.3V system circuit unit 22. The memory 24 stores a self-determination program (test program) 25.

  An external input signal is given to the 5V circuit unit 26 which is an input / output interface with the outside via a multiplexer (MPX, data bus switching means) 27, and the 5V circuit unit 26 receives the input signal. The voltage is converted and output to the 3.3V system circuit unit 22. On the other hand, the signal output from the 3.3V system circuit unit 22 is output to the outside through a demultiplexer (DPX, data bus switching means) 27 when the voltage is converted in the 5V system circuit unit 26. ing. The other input terminal of the MPX 27 and the other output terminal of the DPX 28 are connected to the test data bus of the CPU 23. Here, the “test data bus” is a part of the general-purpose data bus, and the path portion used only during the test is referred to as “for test”.

  MPX27 and DPX28 are selectively switched by setting the level of the external terminal TEST of the microcomputer 21. For example, in the normal mode in which the terminal TEST is set to the low level, the MPX27 and DPX28 select the external input terminal IN and the external output terminal OUT, respectively, and in the test mode in which the terminal TEST is set to the high level, the MPX27 and DPX28 are The CPU 22 selects the test data bus. Further, the CPU 23 reads the self-determination program 25 from the memory 24 and executes it when the test mode is set.

Next will be described with reference to FIG. 3 for the operation of the second embodiment. FIG. 3 shows the processing contents of the self-determination program 25 executed by the CPU 23, that is, the execution contents of the monitor burn-in test. As in the first embodiment, when the test mode is set, 5V power is supplied to the 3.3V circuit unit 22 and the booster circuit 4 (not shown in FIG. 2 ) is supplied to the 5V system circuit unit 26. A boosted voltage is supplied. Also, the environmental temperature setting and test execution time during the test are the same as in the first embodiment.

  When a predetermined time has elapsed (step S1, “YES”), the CPU 23 outputs a test signal to any of the peripheral circuits belonging to the 3.3V circuit unit 22 selected as the test target via the MPX 27 ( Step S2). When a signal (for example, a result of performing a predetermined logical operation on the input data value) that the peripheral circuit responds to the output test signal is read via the DPX 28 (step S3), the response signal It is determined whether or not the data value matches the expected value (step S4).

  If the two match in step S4 (“YES”), the CPU 23 writes and stores the determination result “OK” in the memory 24 (step S5). If the two do not match (“NO”), the determination is made. The result “NG” is written and stored in the memory 24 (step S6). Then, it is determined whether or not the set test execution time has elapsed (step S7). If it has not elapsed ("NO"), the process returns to step S1, and if it has elapsed ("YES"), the process is terminated. To do.

  Therefore, since the test results for each predetermined time are written and stored in the memory 24 at any time, when the burn-in test is completed, if the contents of the memory 24 are dumped using the serial communication function of the microcomputer 1, It is possible to confirm whether the burn-in test execution result is OK or NG in total. That is, if all are “OK”, the implementation result is OK, and if at least one “NG” exists, the implementation result is NG.

  As described above, according to the second embodiment, when the on-chip CPU 23 of the microcomputer 21 is set to the test mode, the self-determination program 25 is read from the memory 24 and executed, so that the burn-in test is performed and the result is determined. This can also be performed by the microcomputer 21 alone. Specifically, the CPU 23 outputs a test signal to the data bus connected to the external input terminal IN every time a predetermined time elapses, and any of the 3.3V system circuit units 23 to which the test signal is given. Since the suitability of the response signal output by such a circuit is determined, the quality of the circuit function can be confirmed at any time during the burn-in test.

The present invention is not limited to the embodiments described above and illustrated in the drawings, and the following modifications or expansions are possible.
The power supply system of the microcomputer may be either 5V or 3.3V (the power supply voltage is an example). Also, there may be more than two power supply systems. In that case, the voltage from the lowest power supply voltage is sequentially switched to one higher in voltage, and the highest voltage is generated by the booster circuit. Switching may be performed so as to supply voltage.

Further, even when there are a plurality of power supply systems, a booster circuit may be provided individually corresponding to each power supply system. In such a configuration, an optimum overvoltage can be set for each circuit unit .

The booster circuit may be configured to always operate when power is supplied to the microcomputer. Further, the booster circuit 4 may be any configuration as long as it can set a suitable overvoltage.

Each of the switches 5 and 6 and the switches 7 and 8 may be composed of one changeover switch.
The static burn-in test may be performed without being limited to the dynamic burn-in test.
In the second embodiment, when the CPU 23 executes the self-determination program, the MPX 27 and DPX 28 may be switched by writing to the control register in the initial process.

  The embodiment of the monitor burn-in test is not limited to that shown in the second embodiment, and may be implemented in any manner as long as it can confirm whether the function of the microcomputer is normal. For example, a measurement circuit may be connected to the microcomputer to measure a standby leakage current value or IDDQ (quiescent power supply current).

FIG. 1 is a diagram showing a configuration of a one-chip microcomputer according to a first embodiment of the present invention, and showing only a portion according to the gist of the present invention FIG. 1 equivalent view showing a second embodiment of the present invention. Flow chart showing processing contents of self-determination program executed by on-chip CPU

Explanation of symbols

In the drawings, 1 is a one-chip microcomputer, 2 is a 3.3V system circuit unit, 3 is a 5V system circuit unit, 4 is a booster circuit, 5 to 8 are switches (power switching means), 21 is a one-chip microcomputer, 22 Is a 3.3V system circuit unit, 23 is a CPU, 24 is a memory (storage unit), 25 is a self-determination program (test program), 26 is a 5V system circuit unit, 27 is a multiplexer (data bus switching means), and 28 is a data processor. A multiplexer (data bus switching means) is shown.

Claims (6)

A booster circuit that boosts the power supply voltage supplied from the outside is mounted on the same chip.
Configured to enable execution of an overvoltage application test using the boosted voltage ;
A plurality of power input terminals each having a different voltage;
A plurality of circuit units which operate by being supplied with respective power via the plurality of power input terminals;
A circuit that switches the boosted voltage generated by the booster circuit to be supplied to a specific circuit unit that operates by being supplied with a power supply having the highest voltage among the plurality of circuit units, and excludes the specific circuit unit The one-chip microcomputer characterized in that the part is provided with power source switching means for switching so as to supply a power source whose voltage is one step higher . 2. The one-chip microcomputer according to claim 1 , wherein the booster circuit is configured to operate only when the overvoltage application test is executed . A storage unit that stores the test program for executing the overvoltage application test and determining the execution result;
The one-chip microcomputer according to claim 1, further comprising a CPU that reads out and executes the test program from the storage unit . Data bus switching means for switching the data bus connected to the external signal input terminal and the data bus connected to the external signal output terminal to connect to the data bus of the CPU,
The CPU executes the test program to output a test signal to the data bus every time a predetermined time elapses, and to determine whether the response signal output from the circuit unit to which the test signal is applied is appropriate. 4. The one-chip microcomputer according to claim 3 . A booster circuit for boosting a power supply voltage supplied from the outside is mounted on the same chip, and a plurality of power supply input terminals each having a different voltage, and each power supply via the plurality of power supply input terminals. In an overvoltage application test method performed for a one-chip microcomputer comprising a plurality of circuit units that are supplied and operate,
The boosted voltage generated by the booster circuit is switched so as to be supplied to a specific circuit unit that operates by being supplied with a power supply having the highest voltage among the plurality of circuit units,
An overvoltage application test method for a one-chip microcomputer, wherein an overvoltage application test is performed by switching the circuit parts excluding the specific circuit part so as to supply a power having a voltage higher by one step . Switch the data bus connected to the external signal input terminal and the data bus connected to the external signal output terminal to connect to the CPU data bus,
6. The CPU according to claim 5, wherein the CPU outputs a test signal to a data bus each time a predetermined time elapses, and determines whether or not a response signal output from the circuit unit to which the test signal is applied is appropriate. Overvoltage application test method for chip microcomputer.

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