JPH0523099B2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a data compression device applicable to electronic files, etc., and particularly relates to a data compression device that performs compression processing on input data according to a predetermined logic to form compressed data. .

BACKGROUND ART Conventionally, a technique is known in which highly redundant binary data such as a digital image signal read from an object is compressed according to a predetermined logic. For example, in so-called facsimile devices that transmit images using telephone lines, compression technology is introduced to reduce the amount of data to be transmitted and to shorten the transmission time.

In addition, in recent years, electronic image file devices using laser disks and magnetic disks that can store large amounts of image data have been proposed, but if compression technology is introduced, the storage capacity of these storage media can be substantially increased. This is an effective way to encourage people to act.

By the way, the Modified Huffman method (M.H. method) is well known as a data compression method. This method generally measures the number of white or black data and the so-called run length of the original digital image data, and converts the image data into a modified Hoffman code (MH code) according to the results. be.

The chord length of this MH chord is not constant, and it starts from 2 pits corresponding to the run length.
Up to 13 pits with irregular pit lengths.
Therefore, it is not easy to connect these MH codes and back them in byte or word units.

Conventionally, the above-mentioned facsimile machines do not require a very high scanning speed to read the original image, and also take advantage of the fact that the mechanical operation for scanning the original can be performed intermittently. Processing was performed at low speed using microcomputers.

In recent years, high-speed data processing and transmission in electronic files and the like has become desired, and as a result, it has become necessary to process MH data at high speed and in real time. However, conventional processing methods cannot completely meet this demand, and this is an impediment to speeding up.

Purpose The present invention has been made in view of the above points, and includes high-speed data processing in electronic files, etc.
The object of the present invention is to provide a data compression device that can sufficiently meet transmission requests.

EXAMPLES Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 shows the configuration of an embodiment in which the present invention is applied to a document image capturing device in an electronic file device. The original 10 is illuminated by an illumination device (not shown), and reflected light from the original 10 is imaged by a lens 11 on an image sensor 12 made of a CCD. The image sensor 12 has a plurality of photoelectric conversion elements arranged in the width direction of the document, and serially outputs an electric signal according to the amount of input light. After the output of the image sensor 12 is amplified by the amplifier 13,
The A/D converter 14 converts the image data into binary signal data indicating white and black levels. A binary signal from the A/D converter 14 is input to a data compression circuit 20. In the data compression circuit 20, the run length counter 21 counts the number of consecutive white or black signals in the input binary signal. The MH encoder 22, which receives this count value and a signal indicating the monochrome state, outputs an MH response code 25 and data 24 indicating the code length of the MH code to the packing circuit 23 in accordance with a well-known conversion table. The packing circuit 23 uses the code length data 24 to
The input MH codes 25 having different code lengths are connected to form data of a predetermined effective code length (for example, 8 pits), and are sequentially output. The data sequentially output from the data compression circuit 20 is output as a serial signal in the buffer memory 15. This output signal is stored in a file device such as an optical disk, or transmitted to a remote receiving unit via a telephone line. Therefore, high-speed data files can be stored on a small-capacity disk.

FIG. 2 is a circuit diagram showing a detailed configuration example of the data compression circuit 20 shown in FIG. As mentioned above, this circuit example converts serial original image data into modified Huffman (MH) codes, and furthermore, the converted pit lengths (code lengths) are different.
By backing the MH code data, the predetermined effective length,
That is, the data is converted into 1-byte parallel data and output to an electronic file or the like.

Serial original image data obtained by scanning the manuscript
The VIDEO is input to an RL (run length) counter 21, and the run lengths of white and black are determined. At the same time, it is determined whether the input signal is at white level or at black level. Determined run length data RL and signals indicating white and black status
The TS is input to the address line of an MH encoder 22 consisting of a ROM memory that stores an MH (Modified Huffman) code conversion table.
The MH encoder 22 is a 13-pit MH encoder.
Convert the effective code length to 4
Generates pit signal. (For example MH code 0011
In this case, the output of the MH code conversion table is 0011××××××××× (× is arbitrary) as the MH code MC, and 4 (0100) as the code length LC. ) The generated MH code MC and effective code length LC are input to the packing circuit 23 and are first stored in a FIFO (first-in/first-out buffer memory) 31.

The series of operations of the RL counter 21, MH encoder 22, and FIFO 31 described above are performed in real time, for example, simultaneously with the reading operation at a constant speed in accordance with the transfer rate (clock φ) of the original image data VIDEO.

The MH code MC and effective code length LC are read out from FIFO31, and the MH code is connected.
That is, pit handling is performed. Here, the operating speed of reading from the FIFO 31 and pit handling is more than twice the transfer speed of the original image data, taking into consideration data expansion due to MH conversion, and in this embodiment is 2φ, which is twice the transfer speed of the original image data. Also, if the speed is set too high, processing down time will occur for data supply, so it is not necessary to do so.

The MH code MC taken out from the FIFO 31 is sequentially moved from the register B32 to the register C33, and is finally packed into 8 pits, that is, 1 byte. However, MH code MC
have different chord lengths depending on their run lengths, so it is necessary to perform pit-joining processing on them. This is done using two 1/8 multiplexers, multiplexer P34 and multiplexer Q35. In addition, in the figure, multiple plexer P34
The × mark indicates an unused state.

The multiplexer Q35 inputs the register B below the MH code MC already stored in the register C33.
It serves to store the subsequent MH code MC stored in 32.

In addition, the multiplexer P34 is connected to the register B32.
It serves to shift the pits of register B32 upward by the number of pits taken into register C33.

The effective code length is determined via the multiplexer 40.
It is taken into count register X36. Then, the addition circuit 37 and the count register Y38 perform cumulative addition. Based on the result of this addition, it is determined how many pits of data are finally packed into the resist C33.

Multiplexer Q35 is count register Y3
By signal SLC indicating the contents of 8, register B32
It is specified how many lower pits in register C33 the data pit is to be fetched from.

Note that since register C33 has a finite number of pits (8 pits in this circuit example), register B3
If all the data pits stored in the register C33 cannot be captured into the register C33, an overflow occurs. In this case, the remaining data pits that were not taken into register C33 are stored in register B.
He will remain at 32. At this time, the number of remaining pits is calculated by the subtraction circuit 39 which inputs the value of the count register X36 and the value of the subtraction circuit 41.
It is reset in the count register X36 through the multiplexer 40 which is selectively operated by the overflow signal OF from the adder circuit 37. This results in the same state as when a data pit is newly set from the FIFO 31 to the register B32.

Also, the remaining data pits in register B32 are the same as the pits taken into register C33.
It is necessary to fill in the upper direction of 32. Therefore, how many pits of data have been taken into the register C33 is calculated by the subtraction circuit 41 which inputs the number of effective pits (8 pits) and the value of the count register Y38. Then, the result of this subtraction is applied to multiple plexer P3.
4 is input as the selection signal SLB, and the register B32 is shifted in the upward direction.

Multiplexer P34 does not operate except when register C33 overflows. Therefore,
While there is no overflow in register C33, the code data is only moved from FIFO 34 to register B32 (shifted by multiplexer Q35) to register C33.

By the way, when register C33 overflows,
The code data reading operation from FIFO 31 is stopped. However, the stitching operation continues. That is, in parallel with the operation of filling the remaining pits of register B32 upward using the multiplexer P34, the remaining pits of register B32 are transferred to the lower register C33.
Fill in part of the pit from step 2. (In this case, one byte of data has been completely packed into the register C33.) Also, a buffer "empty" signal may be output from the FIFO31. At this time, the pit stitching process has caught up with the supply of image data, and the pit stitching operation is temporarily stopped.

Figure 3a shows multiplexer P34 and register B.
32. FIG. 3b shows the input/output relationship between the multiplexer Q35 and the register C33. Also in Figure 4
FIFO31, register B32 and register C33
This shows the operation time chart.

In this way, for the code data taken into the FIFO 31, the data filling operation to the register C33 and the data loading including the shift operation to the register B32 are performed sequentially (the swift operation is performed by loading the remaining data into the register B32). (If there is no, it will not be performed). Furthermore, by setting the packing operation and shift operation at a speed 2φ, which is twice the code data storage rate φ in the FIFO 31, high-speed real-time processing can be performed in consideration of data expansion in MH conversion.

As explained above, MH codes with uneven code lengths output from the MH encoder 22 are
The MH code is input to the FIFO 31 and in subsequent data processing, the MH code is handled as parallel data and the time required for pit connection processing can be shortened. Therefore, the compression process for the input read signal can be executed in real time without restricting the image reading operation at the same processing speed.

In this embodiment, the MH code data is processed in units of 1 byte, but the process is not limited to this. Depending on the processing device such as the subsequent electronic file or the data transfer standard, the MH code data may be processed in units of 1 word or several bytes. It can also be a unit. Also,
In this case, it is natural to use a multiplexer suitable for the amount of packing, but the pit packing process by the multiplexer Q35 and the shifting operation by the multiplexer P34 can be achieved with the same configuration.

Furthermore, the data processing speed may be twice or more the data supply rate.

In addition, the data to be subjected to backing processing is not only image read data converted into MH code, but also data compressed using other compression logic, data read from semiconductor memory, magnetic memory, etc., and data converted according to a predetermined logic. Needless to say, the present invention can be applied to backing processing of data with uneven data length output from various data output devices.

Effects As described above, according to the present invention, code data is stored from the first storage means that stores parallel code data of undefined length to the second storage means that outputs the code data in units of predetermined tables. When storing the data, the data storage state of the second storage means is detected according to the code length of the code data of indefinite length and the output of the code data, and the storage position in the second storage means is determined according to the data storage state. Since the parallel code data is instantaneously shifted by selecting , the process of packing the code data of indefinite length output from the encoding means into code data of a predetermined length can be performed at high speed.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of an embodiment in which the present invention is applied to a document reading device, FIG. 2 is a circuit diagram showing a detailed configuration example of the data compression circuit 20 shown in FIG. 1, and FIGS. b is a diagram showing the input/output relationship, and FIG. 4 is a time chart showing the operation timing of the circuit shown in the second diagram, 21 is an RL counter, 22 is an MH encoder, 23 is a bucking circuit, 31 is a FIFO,
32 is register B, 33 is register C, 34 is multiplexer P, 35 is multiplexer Q, 36
is a count register X, 37 is an addition circuit, 38 is a count register Y, 39 and 41 are subtraction circuits, 4
0 is a multiplexer.

Claims (1)

[Claims] 1. Encoding means for encoding serially input data using a predetermined encoding method and outputting it in parallel as code data of undefined length; and a first storage means that is capable of storing data and outputs the stored code data in parallel; and a first storage means that stores the parallel code data from the first storage means and outputs the code data in parallel in predetermined length units. a second storage means; when storing code data from the first storage means to the second storage means, selects a storage position of the parallel code data, and shifts and stores the parallel code data; a selection means; detecting the storage state of data in the second storage means according to the code length of the code data stored in the first storage means and the output of the code data by the second storage means; A data compression device comprising: control means for controlling a storage position selection operation by the selection means according to a data storage state.