JPH0523043B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a multilayer ceramic capacitor, particularly a multilayer ceramic capacitor.
This invention relates to a multilayer ceramic capacitor that can be applied to circuits that require low equivalent series resistance in the high frequency range of about 100MHz to 1000MHz.

Conventional structure and its problems Traditionally, ceramic derivatives were made of palladium or platinum.
A multilayer ceramic capacitor formed by laminating a conductor layer made of palladium is well known.
This multilayer ceramic capacitor is a typical example of miniaturization of individual elements in response to the integration and miniaturization of today's electronic circuits. i.e. 20μm~100μm
Electrodes are applied to the thin ceramic dielectric layer of the capacitor, and multiple conductor layers are arranged so as to sandwich the ceramic dielectric layer and alternately face each other, so as to obtain the same effect as connecting many such capacitors in parallel. The conductor layers are arranged and laminated, and each conductor layer is connected to terminal electrodes provided by baking silver or silver-palladium alloy or the like on both ends of the laminated body.

In recent years, such laminated ceramic capacitors have become essential for circuit configurations in all fields of electronic equipment, and their usage is increasing. In particular, there is an active movement toward miniaturization of electronic tubes, and along with this, high sensitivity in the high frequency range is required, and therefore, multilayer ceramic capacitors that are compatible with high frequency circuits are absolutely necessary. There is. That is, it is necessary for the capacitor to have a small equivalent series resistance in the MHz band. For example, 300M with a 1000pF capacitor
The minimum required value for the equivalent series resistance at Hz is 0.3Ω or less, and conventional multilayer ceramic capacitors have not always been able to satisfy this value. In general, when a conductor layer and a ceramic dielectric layer are laminated and integrated, 1300 to 1400
℃ firing process is required, and if the thickness of the conductive layer is too thick, delamination will occur during firing, causing separation between the ceramic dielectric layer and the conductive layer, making it impossible to obtain capacitance. , the thickness of the conductor layer is usually 5 μm or less. Therefore, the resistance component of the conductor layer is limited by this thickness, and in the conventional laminated structure, it has been difficult to lower the resistance component of the conductor layer that dominates most of the equivalent series resistance.

FIG. 1 shows a conventional multilayer ceramic capacitor, in which 1 is a ceramic dielectric layer, 2 is a conductor layer, and 3 is a terminal electrode.

OBJECTS OF THE INVENTION It is an object of the present invention to significantly improve the drawback of high equivalent series resistance in conventional multilayer ceramic capacitors as described above, and to provide a multilayer ceramic capacitor that is suitable for high-frequency circuits.

Structure of the Invention In order to achieve this object, the multilayer ceramic capacitor of the present invention has a group of conductive layers sandwiching ceramic dielectric layers, and two of the conductive layers of the group of conductive layers are always connected to each other. The electrodes are arranged so as to form a pair of opposing electrodes.

DESCRIPTION OF EMBODIMENTS The multilayer ceramic capacitor of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a sectional view of the multilayer ceramic capacitor of the present invention, in which the same parts as in the conventional example are given the same numbers. In the figure, 1 is a ceramic dielectric. This ceramic dielectric material 1 is usually made by adding a polyvinyl alcohol binder to raw material powder for ceramic dielectric materials, mixing them, and then forming a thin sheet of about 30 to 100 μm at 1300°C by sheet forming using a doctor blade method. It is obtained by firing at a higher temperature. Reference numeral 2 designates a conductive layer, for example, palladium paste is printed on the dielectric sheet, and the conductive layer 2 is obtained at the same time as the ceramic dielectric layer 1 is formed in the firing process. 3 is a terminal electrode, which is obtained by applying silver-palladium paste and baking at 800 to 850°C. As is clear from FIG. 2, in the structure of the multilayer ceramic capacitor of the present invention, two conductor layers 2 always form a pair of opposing electrodes, whereas in the conventional structure shown in FIG. In this case, one conductor layer 2 faces two upper and lower conductor layers 2. Therefore, in the present invention and the conventional multilayer ceramic capacitor, assuming that the equivalent series resistance is simply contributed by the resistance of the conductive layer, the third
This can be shown in the equivalent circuit shown in the figure. That is, FIG. 3a shows an equivalent circuit of a multilayer ceramic capacitor according to the present invention, and FIG. 3b shows an equivalent circuit of a conventional multilayer ceramic capacitor. As is clear from this figure, the series equivalent resistance of the multilayer ceramic capacitor of the present invention is equivalently (n+1)/2n when an odd number of capacitors are included, compared to the conventional one, and (n+1)/2n when an even number of capacitors are included.
The equivalent series resistance is 2)/2(n+1). Here, n is equivalently the number of capacitors included. However, for simplicity, the calculations were made assuming that the resistances of each conductor layer 2 were all the same. In addition, calculations were made assuming that the capacitance values of the equivalently configured capacitors were the same.

As described above, it is clear that the multilayer ceramic capacitor of the present invention has an equivalent series resistance that is extremely smaller than that of the conventional multilayer ceramic capacitor, and when the number of laminated layers is large, it is approximately 1/2 that of the conventional multilayer ceramic capacitor.
is expected to show the value of

Figure 4 shows a multilayer ceramic capacitor with the configuration shown in Figures 1 and 2 as a ceramic dielectric.
Uses JIS standard YB characteristic ceramic dielectric, 1K
The test results of a prototype with a capacitance of 1000pF±100pF at Hz are shown. As is clear from this figure, the equivalent series resistance A of the multilayer ceramic capacitor of the present invention is extremely better than the conventional equivalent series resistance B, especially at frequencies above 100 MHz. Also, 300M
At Hz, it is 0.23Ω, which fully satisfies the market requirement of 0.3Ω or less.

Effects of the Invention As described above, the multilayer ceramic capacitor of the present invention has an extremely good equivalent series resistance, and is excellent in increasing the sensitivity of electronic tuners, which could not be achieved with conventional multilayer ceramic capacitors, especially in the range from 100MHz to 1000MHz. Its industrial value is enormous, as it can be used in other high-frequency circuits.

[Brief explanation of the drawing]

Fig. 1 is a sectional view of a conventional multilayer ceramic capacitor, Fig. 2 is a sectional view showing an embodiment of the multilayer ceramic capacitor according to the present invention, and Figs. 3a and b.
4 is a diagram showing an equivalent circuit of a laminated ceramic capacitor of the present invention and a conventional product, and FIG. 4 is a diagram showing a comparison of the equivalent series resistances of the product of the present invention and the conventional product. 1... Ceramic dielectric layer, 2... Conductor layer,
3...Terminal electrode.

Claims (1)

[Claims] 1. A laminated ceramic capacitor in which a group of conductive layers are formed to sandwich ceramic dielectric layers, and two of the conductive layers of the group of conductive layers are arranged so as to form a single opposing electrode.