JPH05226273A - Formation of impurity diffusion area on semiconductor substrate - Google Patents

Abstract

PURPOSE:To make it possible to easily form an impurity diffusion area for a gate area required to embody an electrostatic induction thyristor which is high in breakdown strength and minimizes continuity loss and whose inverse breakdown strength between a gate and a cathode is high and, what is more, without incurring the generation of an electrode coverage failure. CONSTITUTION:Windows 8 are bored on oxide films on the bottom of a semiconductor substrate grooves 5 formed on the surface and coated with the oxide films including groove inner planes on the groove formation side so as to carry out anisotropic etching, thereby forming new grooves 9. Impurities are implanted from the inside of the new grooves so as to form an impurity diffusion region 12, thereby developing an impurity diffusion region formation method on a semiconductor substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an impurity diffusion region on a semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, as one of useful semiconductor devices,
The static induction thyristor shown in FIG. 10 is known. The static induction thyristor 60 includes a gate region (p ⁺ region) 62 and a cathode region (n ⁺ region) 6 on the surface side of the semiconductor substrate 61.
3, a back surface side is provided with an anode region (p ⁺ region) 64, and a high specific resistance region (n ⁻ region) 65 serving as a main current path is provided between the cathode region 63 and the anode region 64. A gate electrode 72 is provided in the gate region 62, a cathode electrode 73 is provided in the cathode region 63, and an anode electrode 74 is provided in the anode region 64.

The electrostatic induction thyristor 60 has a gate electrode 7
By controlling the voltage between the cathode 2 and the cathode electrode 73, the main current can be conducted / interrupted, and in recent years, a structure with a short turn-on time / turn-off time has been considered. It has been attracting attention as a semiconductor device for power control. The diffusion depth L1 of the gate region 62 of the electrostatic induction thyristor 60 is mainly determined by the breakdown voltage between the cathode and the anode (forward blocking voltage) when the main current is cut off.
The higher the breakdown voltage is, the deeper the diffusion depth L1 of the gate region 62 becomes. However, as the diffusion depth L1 becomes deeper, the lateral diffusion distance L2 of the gate region 62 becomes proportionally longer. As the diffusion distance L2 becomes longer as the breakdown voltage is improved, the ratio of the gate region to one unit cell (per unit area) is increased, and the ratio of the main current passage (channel area) is decreased accordingly. To do. When the proportion occupied by the main current path decreases, the resistance of the main current path increases and the on-resistance increases, which causes a problem that the loss during conduction increases.

Therefore, as shown in FIG. 11, the diffusion depth L
A digging gate type electrostatic induction thyristor 80 in which the diffusion distance L2 does not become too long even if 1 is deep was considered. In this static induction thyristor 80, a groove 81 is previously formed in the gate region formation region of the semiconductor substrate 61, and the groove 81 is formed.
Impurities are introduced into the inner surface of the gate to form the gate region 82. Since the groove 81 is provided, the diffusion time is short, and the lateral diffusion distance L2 is not so long. As a result, even if the breakdown voltage is increased, the proportion occupied by the main current path does not decrease so much, and the increase in ON resistance can be suppressed.

On the other hand, in the electrostatic induction thyristor,
A large reverse breakdown voltage between the cathodes is also desired. This is because the main current can be driven at high speed. When the main current is cut off, it is necessary to extract minority carriers (holes) in the high specific resistance region 65, but the higher the reverse voltage applied between the gate and the cathode, the shorter the time for extracting the minority carriers,
This is because the time required for interruption is shortened. One of the measures for improving the reverse breakdown voltage between the gate and the cathode is to increase the distance between the gate region and the cathode region.

Therefore, as shown in FIG. 12, an electrostatic induction thyristor 85 having a large reverse breakdown voltage between the gate and the cathode was considered. In this static induction thyristor 85, a groove 81 is formed in advance in the gate region formation region of the semiconductor substrate 61, and impurities are diffused through a window 89 formed in the bottom of the groove 81 to deepen the semiconductor substrate 61. Only gate area 88
Is formed to increase the distance L3 between the gate region 88 and the cathode region 63.

The gate region 88 capable of improving the withstand voltage can be formed by the following method. First, as shown in FIG. 13, a resist mask 91 having a predetermined pattern is provided on the oxide film 90 covering the surface of the semiconductor substrate 61, and selective etching is performed to open a window 92 in the groove formation region.
Anisotropic etching is performed using the oxide film 90 with the window 92 opened as a mask to form a groove 81 as shown in FIG.
The side surface of the groove 81 should have good electrode coverage.
It is better to have a tapered taper.

After forming the trench 81, an oxidation treatment is performed to form an oxide film 93 covering the inner surface of the trench 81 so that the entire surface is covered with the oxide film. Then, as shown in FIG. Silicon nitride film (Si ₃ N ₄ film: poly-Si on top)
Film) 94 is deposited and anisotropically etched without a mask, and as shown in FIG. 16, a silicon nitride film 94 is formed.
Only the portion covering the side wall of the groove 81 is left, and the other portions are removed.

Then, using the silicon nitride film 94 left on the side surface of the groove 81 as a mask, as shown in FIG. 17, the oxide film 93 is covered with the silicon nitride film 94 at the bottom of the groove 81 by anisotropic etching. The non-existing portion is removed and the window 89 is opened. The oxide film 90 is also etched, but if the oxide film 90 is made thicker than the oxide film 93, the surface of the semiconductor substrate 61 is not exposed.

After forming the window 89, the silicon nitride film 94 is removed by etching as shown in FIG.
A p-type impurity is introduced through the window 89 to form the gate region 88.
^{A +} region (p-type impurity diffusion region) is formed.
Gate region 88 provided by the above-described impurity diffusion region forming method
The electrostatic induction thyristor 85 provided with is highly useful because it has a high withstand voltage, a small loss during conduction, a high reverse withstand voltage between the gate and the cathode, and a high-speed cutoff drive.

However, in the case of the above-mentioned impurity diffusion region forming method, it is not easy to actually form the gate region. This is because the process is quite complicated and it is difficult to selectively remove the silicon nitride film or oxide film at the bottom of the deep groove. In addition to this, there is a problem that defective coverage of the gate electrode formed in the groove 81 is likely to occur. This is because the shape of the groove 81 is apt to have a taper shape opposite to the taper shape as shown in FIG. 19 or a barrel shape as shown in FIG. 20, so that poor coverage of electrodes is apt to occur. Is.

[0012]

SUMMARY OF THE INVENTION In view of the above circumstances, the present invention is necessary to realize an electrostatic induction thyristor which has a high breakdown voltage, a small loss during conduction, and a high reverse breakdown voltage between the gate and the cathode. An object of the present invention is to provide a method capable of forming an impurity diffusion region for a gate region on a semiconductor substrate easily and without causing a coverage defect of an electrode.

[0013]

In order to solve the above problems, in the method for forming an impurity diffusion region in a semiconductor substrate according to the present invention, a groove is formed on the surface, and the surface on the groove forming side includes an oxide film including the inner surface of the groove. A new groove is formed on the bottom of the groove by opening a window in the oxide film on the bottom of the groove of the semiconductor substrate covered with and anisotropically etching the inner surface of the new groove. Impurities are introduced to form an impurity diffusion region.

In the case of the present invention, in addition, the size of the window is
It is preferably smaller than the size of the bottom surface of the groove. The impurity diffusion region to be formed according to the present invention includes the impurity diffusion region for the gate region of the static induction thyristor, but it goes without saying that it is not limited to this.

[0015]

In the method according to the present invention, the groove is formed twice in the depth direction. That is, the latter groove is formed on the bottom of the first groove, the side surface of the first groove is covered with an oxide film, and impurities are introduced only from the inner surface of the latter (new) groove to diffuse impurities. Forming a region.

The impurity diffusion time is shortened by the depth of the trench, and accordingly the lateral diffusion distance is shortened, so that the increase of the occupation ratio of the gate region is suppressed and the on-resistance of the main current path is increased. Withstand voltage can be improved without causing
In addition, the completed impurity diffusion region is formed in the vicinity of the rear trench located deeper, and is separated from the surface of the semiconductor substrate. As a result, when the impurity diffusion region is used as the gate region of the electrostatic induction thyristor, the distance between the impurity diffusion region and the cathode region formed on the surface of the semiconductor substrate becomes long, and the reverse breakdown voltage between the gate and the cathode becomes high. ..

In the case of the method of the present invention, it is not necessary to provide a window at the bottom of the subsequent groove, only the window for forming the subsequent groove is provided at the bottom of the first groove at the shallow position. When a window is opened at the bottom of the first groove at a shallow position, mask formation is easy, etching is easy, and there is no difficulty. When opening a window at the bottom of a groove at a deep position as in the conventional case, a complicated mask forming process using a silicon nitride film is required, and etching is not so easy.

In addition, when the groove is formed twice in the depth direction, since the depth of each groove is shallow, the anisotropic etching time for each time is short and the etching conditions are unstable.
Since the amount of variation that appears in the groove is small, the degree of the defective shape of the groove is much smaller than that in the case where the formation of the groove is performed once, and the coverage failure of the electrode formed later in the groove is less likely to occur.

In addition, if the size of the window formed in the oxide film on the bottom of the first groove is smaller than the size of the bottom surface of the groove, the subsequent groove will be narrower than the first groove, and the first groove and the latter groove. Since the shape of the entire groove including the grooves is tapered, defective coverage of the electrode is less likely to occur.

[0020]

Embodiments of the present invention will be described below. Needless to say, the present invention is not limited to the following embodiments. In this embodiment, an impurity diffusion region for the gate region of the static induction thyristor is formed. First, as shown in FIG. 2, a resist mask 3 having a predetermined pattern is provided on the oxide film 2 covering the surface of the semiconductor substrate 1, and anisotropic etching is performed as shown in FIG. After opening the window 4 in the above, the resist mask 3 is removed. Then, as shown in FIG.
Anisotropic etching is performed using the oxide film 2 having the window 4 opened as a mask to form a groove 5. The depth of the groove 5 may be about half the distance between the bottom and the surface of the groove later.

Subsequently, as shown in FIG. 5, oxidation treatment is performed to cover the inner surface of the groove 5 with the oxide film 6, and then a resist mask 7 is formed as shown in FIG. A resist agent is applied to the groove forming side of the semiconductor substrate 1 to form a pattern. Since the groove 5 is shallow, the resist mask 7 can be easily formed without any problem. In particular, the aspect ratio of the groove 5 (the depth L of the groove 5
If A / the width LB of the bottom of the groove 5 is 1 or less, the formation (patterning) of the resist mask 7 becomes easy.

In this way, the resist mask 7 is formed, and as shown in FIG. 7, etching is performed to open a window 8 in the oxide film 6 at the bottom of the groove 5. The window 8 is smaller than the size of the bottom surface of the groove 5, as shown in FIG. It is narrowed by the width of the resist mask 7. After forming the window 8,
Anisotropic etching is performed again to form a new groove 9 as shown in FIG. The aspect ratio of the groove 9 (depth LC of the groove 9 / width LD of the bottom of the groove 9) is, eg, about 1.3.

After forming the new trench 9, as shown in FIG. 9, p-type impurities are introduced from the inner surface of the trench 9 to form the gate region 12.
To complete the p ⁺ region (p-type impurity diffusion region). Figure 1
Represents an electrostatic induction thyristor having a gate region formed by the method for forming an impurity diffusion region in a semiconductor substrate described above. The portion other than the gate region is formed according to a usual method. About this static induction thyristor,
This will be described below.

The electrostatic induction thyristor 10 is a semiconductor substrate 1.
The gate region (p ⁺ region) 12 at a deep position of the cathode region and the cathode region (n ⁺ region) 13 at the surface portion,
An anode region (p ⁺ region) 14 is provided on the back surface side, and a high specific resistance region (n ⁻ region) 15 serving as a main current path is provided between the cathode region 13 and the anode region 14. And
A gate electrode 22 is provided in the gate region 12 and a cathode region 1 is provided.
3 is provided with a cathode electrode 23, and the anode region 14 is provided with an anode electrode 24.

The electrostatic induction thyristor 10 has a gate electrode 2
By controlling the voltage between the cathode 2 and the cathode electrode 23, the main current can be conducted or interrupted. Since the tip of the gate region 12 of the electrostatic induction thyristor 10 reaches deep in the substrate, the breakdown voltage between the cathode and the anode is high, and the grooves 5 and 9 are formed to introduce impurities. The diffusion distance in the direction is short, and the loss during conduction is small. In addition, since impurities are introduced only from the inner surface of the groove 9 at a deep position and the distance L3 between the cathode region 13 and the gate region 12 is long, the reverse breakdown voltage between the gate and the cathode is high and the high-speed cutoff drive is performed. Is possible. As described above, it is easy to form the gate region 12 that produces such an advantage, and the coverage of the gate electrode 22 formed in the trenches 5 and 9 is good.

[0026]

As described above, the impurity diffusion region forming method according to the present invention is a two-step method in which a second groove is formed at the bottom of the first groove, and the side surface of the first groove is an oxide film. Since the impurities are introduced only from the inner surface of the groove after being covered with, the lateral diffusion distance of the impurities is short, and the completed impurity diffusion region is separated from the surface of the semiconductor substrate.
Moreover, since there are no difficult steps to perform and the extent of groove shape defects is much smaller, a static induction thyristor with a high breakdown voltage, low loss during conduction, and high reverse breakdown voltage between the gate and cathode is realized. The impurity diffusion region for the gate region necessary for this can be easily formed in the semiconductor substrate without causing the occurrence of the coverage defect of the electrode.

In addition, if the size of the window formed in the oxide film at the bottom of the first groove is smaller than the size of the bottom surface of the groove, the entire shape of the groove becomes a tapered shape. There is an advantage that the coverage failure of the electrode formed later becomes less likely to occur.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a main part configuration of an electrostatic induction thyristor manufactured by using an example of the method of the present invention.

FIG. 2 is a sectional view showing a mask forming step on an oxide film in an example of the method of the present invention.

FIG. 3 is a cross-sectional view showing a step of opening an oxide film window in an example of the method of the present invention.

FIG. 4 is a sectional view showing a first groove forming step in an example of the method of the present invention.

FIG. 5 is a cross-sectional view showing the first step of oxidizing the inner surface of the groove in the example of the method of the present invention.

FIG. 6 is a cross-sectional view showing a mask forming step for the first groove in the example of the method of the present invention.

FIG. 7 is a cross-sectional view showing a window opening process for the bottom of the first groove in the example of the method of the present invention.

FIG. 8 is a sectional view showing a step of forming a new groove in an example of the method of the present invention.

FIG. 9 is a cross-sectional view showing a step of introducing impurities into a new groove in the example of the method of the present invention.

FIG. 10 is a cross-sectional view showing a conventional static induction thyristor.

FIG. 11 is a cross-sectional view showing an embedded gate type static induction thyristor.

FIG. 12 is a cross-sectional view showing another embedded gate type static induction thyristor.

FIG. 13 is a cross-sectional view showing a step of opening a window of an oxide film by a conventional method.

FIG. 14 is a cross-sectional view showing a groove forming step by a conventional method.

FIG. 15 is a cross-sectional view showing a silicon nitride film laminating step for a mask in a conventional method.

FIG. 16 is a cross-sectional view showing a silicon nitride film mask forming step by a conventional method.

FIG. 17 is a cross-sectional view showing a step of opening a window at the bottom of a groove by a conventional method.

FIG. 18 is a cross-sectional view showing a step of introducing impurities into the bottom of a groove by a conventional method.

FIG. 19 is a cross-sectional view showing a groove having a defective shape in a conventional method.

FIG. 20 is a cross-sectional view showing another groove having a defective shape in the conventional method.

[Explanation of symbols]

 1 semiconductor substrate 5 groove 9 new groove 12 impurity diffusion region (gate region)

Claims (2)

[Claims] 1. An anisotropic method in which a window is opened in the oxide film at the bottom of the groove of a semiconductor substrate in which a groove is formed on the surface and the surface on the groove formation side is covered with the oxide film including the inner surface of the groove A method for forming an impurity diffusion region in a semiconductor substrate, in which a new groove is formed at the bottom of the groove by performing a selective etching, and impurities are introduced from the inner surface of the new groove to form an impurity diffusion region. 2. The method for forming an impurity diffusion region in a semiconductor substrate according to claim 1, wherein the size of the window is smaller than the size of the bottom surface of the groove.