JPH052250U - Integrated circuit input device - Google Patents

Abstract

(57) [Abstract] [Purpose] The present invention is designed so that even if an integrated circuit malfunctions,
It is an object of the present invention to provide an input device for an integrated circuit that does not suddenly reset the integrated circuit. According to the present invention, a microcomputer (7)
If the erroneous operation occurs due to external noise, etc., first, the microcomputer (7) outputs the output of the first inverter (11).
If the microcomputer (7) does not return to the normal operation after performing a predetermined negotiated corrective action, the microcomputer (7) is reset by the output of the second inverter (12).

Description

[Detailed description of the device]

[0001]

[Industrial applications]

  The present invention is a collection for correcting abnormal operation of an integrated circuit such as a microcomputer. An input device of a product circuit.

[0002]

[Prior art]

  FIG. 2 is a diagram showing an input device of a conventional integrated circuit, in which a watchdog timer is constructed. Is made.

[0003]   In FIG. 2, (1) indicated by the one-dot chain line is an integrated circuit. (2) (3) are connected in series One end of the resistor (2) is connected to the power supply voltage V, and One end of the capacitor (3) is grounded to form a charging circuit having a predetermined time constant. This The charging circuit of is the one external to the integrated circuit (1), that is, the resistor (2) and the capacitor. The connection point of the sensor (3) (output of the charging circuit) is connected to the input port (4) of the integrated circuit (1). It

Inside the integrated circuit (1), (5) is an inverter having a threshold level TH1, the input of which is connected to the output of the charging circuit via the input port (4). Further, (6) is an NMOS transistor for discharging the charge stored in the capacitor (3), the drain is connected to the output of the charging circuit via the input port (4), and the source is grounded. Further, a clock CLK for turning on the transistor (6) is periodically and repeatedly applied to the gate of the NMOS transistor (6). In the normal operation of the integrated circuit (1), the cycle of the clock CLK is set to a period T ₀ during which the output of the charging circuit is discharged below the threshold level TH1 of the inverter (5). The period required for the output of the charging circuit to rise to the threshold level TH1 of the inverter (5) is T ₁ (> T ₀ ).

[0005]   The operation of FIG. 2 will be described below.

[0006]   During normal operation of the integrated circuit (1), the charge of the capacitor (3), that is, the charging circuit Of the output of the NMOS before it reaches the threshold level TH1 of the inverter (5). The output of the inverter (5) is discharged because it is discharged by turning on the transistor (6). It is always high level. However, the integrated circuit (1) is When malfunctioning, the clock CLK is not generated. Then NMOS Because the transistor (6) will not turn on, the output of the charging circuit will be the inverter The threshold level TH1 of (5) has been exceeded and the output of the inverter (5) has a high level. It will be inverted from a level to a low level. This low level output is an integrated circuit The integrated circuit (1) is based on this low level output. Will be reset and the abnormal condition will be avoided.

[0007]

[Problems to be solved by the device]

  For example, when the integrated circuit is a microcomputer, the microcomputer Various data processing is performed internally based on program instructions. The data is sequentially stored in the RAM. However, write the processed data to RAM It takes a lot of time to write, and it is just before the end of writing the processing data to RAM. And the microcomputer malfunctions due to external noise, etc. However, if all the contents written in the RAM are reset here, the processing data will be stored in the RAM. The time required to write the data and the normal contents of the RAM are all wasted. If possible, write to RAM before the microcomputer malfunctions. It is desirable to retain the embedded processing data without resetting it.

[0008]   However, the watchdog timer shown in FIG. Even if the unit malfunctions, you can only reset the circuits of each part, so Due to the malfunction of the computer, the normal write contents of the RAM will be reset suddenly. There was a problem that I would put it.

[0009]   Therefore, the present invention suddenly resets the integrated circuit even if the integrated circuit malfunctions. It is an object of the present invention to provide an input device of an integrated circuit which does not operate.

[0010]

[Means for Solving the Problems]

  The present invention has been made to solve the above problems, and its features are as follows. Has a first threshold level and has a first threshold level to which the output voltage of the charging circuit is applied. 1 inverter and a second threshold greater than the first threshold level And the output voltage of the charging circuit is printed together with the first inverter. A second inverter to be applied, and the output voltage of the charging circuit during normal operation of the integrated circuit A discharge circuit that discharges in a cycle before reaching the first threshold level, The integrated circuit is provided with the output of the first inverter when the integrated circuit operates abnormally. An operation for correcting the abnormal operation of the first inverter, and further, the output of the first inverter And when the integrated circuit does not return to normal operation, the output of the second inverter causes The point is to reset the integrated circuit.

[0011]

[Action]

  According to the present invention, when an integrated circuit malfunctions due to external noise or the like, First, the output of the first inverter is used to perform a predetermined negotiated corrective action on the integrated circuit. If the integrated circuit does not return to normal operation after that, the output of the second inverter Reset the integrated circuit.

[0012]

【Example】

  The details of the present invention will be specifically described with reference to the drawings.

[0013]   FIG. 1 is a diagram showing an input device of an integrated circuit of the present invention. In addition, in FIG. The path shall be a microcomputer.

[0014]   In FIG. 1, (7) is a microcomputer, which is read from a ROM (not shown). The ALU (not shown) is operated based on the program data that has been extracted, and a predetermined value is set. Calculations are performed and the processed data obtained as a result of this calculation is sequentially stored in a RAM (not shown). Write or take internal data to the outside to control, for example, a motor To do. (8) and (9) are resistors and capacitors connected in series. One end of 8) is connected to the power supply voltage V, and one end of the capacitor (9) is grounded and charged. Make up the circuit. Furthermore, the connection point of the resistor (8) and the capacitor (9), that is, the output of the charging circuit. The force is externally connected to the input port (10) of the microcomputer (7).

Inside the microcomputer (7), (11) is a first inverter having a first threshold level TH1, the input of which is connected to the output of the charging circuit via an input port (10). . Further, (12) is a second inverter having a second threshold level higher than the first threshold level TH1, the input of which is the input of the first inverter (11) and the input port (10). Via the output of the charging circuit. (13) is an NMOS transistor (discharging circuit) for discharging the charge stored in the capacitor (9), that is, discharging the voltage appearing at the output of the charging circuit, the drain of which is the input of the inverter (11) (12) It is connected to the output of the charging circuit via the input port (10) and its source is grounded. Further, the clock CLK for turning on the transistor (13) is periodically and repeatedly applied to the gate of the NMOS transistor (13). In the normal operation of the microcomputer (1), the cycle of the clock CLK is set to a period T ₀ during which the output of the charging circuit is discharged below the threshold level TH1 of the first inverter (11). And The period required for the output of the charging circuit to reach the threshold level TH1 of the first inverter (11) is T ₁ (> T ₀ ).

[0016]   The operation of FIG. 1 will be described below.

[0017]   First, during normal operation of the microcomputer (7), charging of the capacitor (9) The electric charge reaches the first threshold level TH1 of the first inverter (11). Before it is discharged, it will be discharged through the NMOS transistor (13). The outputs of the converter (11) and the second inverter (12) are both high level, The computer (7) is in a state where it is neither corrected nor reset.

By the way, when external noise arrives during normal operation of the microcomputer (7) and the microcomputer (7) malfunctions, the clock CLK for switching the NMOS transistor (13) does not occur. Will end up. Then, since the NMOS transistor (13) is always turned off, the capacitor (9) is continuously charged. Then, according to the time constant determined by the resistor (8) and the capacitor (9), when the period T ₁ elapses from the start of charging, the charge charged in the capacitor (9) exceeds the first threshold level TH1, and the first inverter The output of (11) is inverted from high level to low level. At this time, the output of the second inverter 12 is still at high level. The low level output PGM of the first inverter (11) indicates that the microcomputer (7) is malfunctioning. Based on this low level output PGM, the malfunction of the microcomputer (7) is corrected. The program will be started. It should be noted that this correction program is a program that is arranged on the assumption of a malfunction that may occur in the internal processing of the microcomputer (7), and can be said to be a program that can completely correct the malfunction. Absent. In other words, there are cases where the microcomputer (7) can be restored to normal operation and cases where it cannot be restored. When the microcomputer (7) is restored to normal operation by this correction program, the clock CLK is generated and the charge of the capacitor (7) is discharged without reaching the second threshold level TH2 of the second inverter (12). Then, the capacitor (7) starts charging from zero again. On the contrary, if the microcomputer (7) cannot return to the normal operation even after the correction program is executed due to an unexpected malfunction, the generation of the clock CLK having the normal cycle T ₀ is stopped. The capacitor (9) is further charged, and the output of the charging circuit reaches the second threshold level TH2 of the second inverter (12). Then, the output of the second inverter 12 is inverted from the high level to the low level. The low level output RST of the second inverter (12) indicates that the malfunction of the microcomputer (7) has not been corrected yet. The low level output RST resets the entire configuration of the microcomputer (7). Will be done.

[0019]   Therefore, even if it takes a lot of time to write the processing data to the RAM, Instead, the external noise is generated just before the processing data is written to the RAM. Therefore, if the microcomputer (7) malfunctions, the first The correction operation is executed by the low level output PGM of the inverter (11). Write to RAM if microcomputer (7) returns to normal operation by normal operation However, it is possible to retain normal processing contents without resetting. To reset RAM suddenly due to malfunction of microcomputer As a result, it is not necessary to rewrite the normal processed data to the RAM, The wasteful processing time of the black computer can be saved.

[0020]

[Effect of device]

  According to the present invention, when the integrated circuit malfunctions, the correction operation of the integrated circuit is first performed. And then reset the integrated circuit only if the integrated circuit does not return to normal operation Therefore, if the integrated circuit returns to the normal state by the above correction operation, Therefore, it is not necessary to reset the integrated circuit. The advantage of being able to protect the operation inside the integrated circuit which is troublesome if it is reset is obtained.

[Brief description of drawings]

FIG. 1 is a view showing a device of the present invention.

FIG. 2 is a diagram showing a conventional device.

[Explanation of symbols]

(7) Microcomputer (8) Resistance (9) Capacitor (11) (12) Inverter (13) NMOS transistor

Claims (3)

[Scope of utility model registration request] 1. A first inverter having a first threshold level, to which an output voltage of a charging circuit is applied, and a second threshold level higher than the first threshold level, the charging circuit. A second inverter to which the output voltage of 1 is applied together with the first inverter, and a discharge circuit that discharges the output voltage of the charging circuit in a cycle before reaching the first threshold level during normal operation of the integrated circuit. When an abnormal operation of the integrated circuit is performed, an operation for correcting an abnormal operation of the integrated circuit is executed by the output of the first inverter, and the integrated circuit is output by the output of the first inverter. An input device for an integrated circuit, wherein the integrated circuit is reset by the output of the second inverter when the normal operation is not restored. 2. The input device for an integrated circuit according to claim 1, wherein the integrated circuit is a microcomputer. 3. The integrated circuit according to claim 2, wherein a program for correcting the abnormal operation of the microcomputer is executed based on the output of the first inverter when the microcomputer abnormally operates. Circuit input device.