JPH0522135A - D/a conversion circuit - Google Patents

Abstract

PURPOSE:To obtain the high-accuracy and high-resolution digital/analog (D/A) conversion circuit by adding the analog outputs of high-order and low-order D/A converted vertically bisected for digital signals and the error compensating analog output of the high-order D/A converter. CONSTITUTION:High-order digital data are inputted to a high-order D/A converter 1, high-order analog signals are outputted, the data are inputted to an error table 2 as well, and error compensating data are taken out. These compensation data are added to low-order digital data by an adder 3, inputted to a low-order D/A converter 4 and converted to low-order analog signals. Since the converter 4 outputs the sum of the low-order analog signals and the error compensating signal, a signal turning a reference voltage from an IC 5 to the double size of a minimum output from the converter 1 can be outputted. The error compensating data and the low-order digital data added by the adder 3 are converted to low-order analog data by the converter 4, synthesized with high-order analog signals by an analog adder 7 and outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a D / A conversion circuit for converting a digital signal into an analog signal, and more particularly to a circuit used in a highly accurate inspection device.

[0002]

2. Description of the Related Art A demand for improvement in measurement accuracy of an inspection apparatus requires improvement in accuracy of a conversion circuit for converting digital data into analog data. A conventional high resolution / high accuracy D / A conversion circuit has been obtained by highly accurately trimming a resistor ladder circuit which is a basic component of the circuit using a laser.

[0003]

However, laser trimming requires an extremely expensive apparatus and requires a long time for manufacturing, which makes it extremely expensive. Further, since there is a physical limit to the laser trimming method, there is a disadvantage that it cannot be dealt with when higher precision is required. In view of these drawbacks, it is an object of the present invention to provide a D / A conversion circuit with high precision and high resolution that overcomes the resolution and accuracy peculiar to a D / A converter.

[0004]

The present invention is characterized by having the following constitution in order to achieve the above object. (1) Separation means for dividing a digital signal into an upper digital signal and a lower digital signal, an upper digital / analog converter that outputs an upper analog signal when the upper digital signal is input, and a parallel connection with the upper digital / analog converter. A lower digital-analog converter that outputs a lower analog signal when a lower digital signal is input, a compensation circuit that compensates for an error in the upper digital analog converter, and an upper and lower analog signal and an error-compensated analog signal are added. The feature is that an adder is provided.

(2) The compensating circuit of (1) provides an error table for compensating the error of the upper digital-analog converter, an error compensating data obtained from the error table and a lower digital signal. And an adder for adding.

(3) The error table of (2) is characterized in that it is a writable ROM.

(4) The maximum output signal of the lower digital-analog converter of (1) is twice the minimum output signal of the upper digital-analog converter.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of a D / A conversion circuit according to one embodiment of the present invention, which uses an IC of 8 bt and a D of 15 bt.
This is an example of the case where the / a conversion circuit is configured. Digital data
The data is divided into upper and lower parts, and the analog conversion resolution is increased by analog conversion.
The upper digital data is input to the upper D / A converter 1 and an upper analog signal is output, and the error table 2
Error compensation data is taken out. The error table 2 is a memory element in which data for compensating the error of the higher-order D / A converter 1 is written, and is composed of a rewritable ROM. In the error table 2, the error compensation data and the low-order digital data are set to 0, and the high-order digital data is set.
The analog output is measured when the data is changed from 0 to 255 (maximum value), and the data for compensating the error of each measured output is written. Writing of such data is performed by various known methods, but a detector (not shown) for detecting the output of the upper D / A converter 1 is provided, and a self-calibration mechanism of the device under the control of a microcomputer. Alternatively, the data may be written in the ROM by using a write-only machine and then incorporated in the D / A conversion circuit.

Error compensation data obtained from the error table 2.
After the data is added to the lower digital data by the adder 3,
It is input to the lower D / A converter 4 and converted into a lower analog signal. Since the lower D / A converter 4 outputs the sum of the lower analog signal and the error compensation signal, the lower D / A converter 4 can output a signal having a size twice the minimum output of the upper D / A converter 1. Therefore, the reference voltage output from the reference voltage IC5 is lowered by the resistor 6 and the voltage input to the reference voltage input terminal (VREF) of the lower D / A converter 4 is changed to VREF of the upper D / A converter 1. 1/2 ⁸ times the reference voltage of, that is, 1
/ 128. The error compensation data and the lower digital data added by the adder 3 are the lower D / A converter 4
Is converted into lower analog data by the analog signal adder 7 and then combined with the upper analog signal by the analog signal adder 7 and output.

In the above embodiment, the digital data is divided into upper and lower parts, but it can be subdivided if necessary, and the upper and lower D / A converters and the lower D / A converters can be divided. The ratio of the reference voltage signal to be added can be changed in consideration of the guaranteed accuracy of the upper D / A converter. As described above, the present embodiment can be variously modified, and these modifications are also included in the present invention as long as the technical idea is the same.

[0011]

According to the present invention, it is possible to provide a digital-analog conversion circuit having a higher resolution and accuracy than the resolution and accuracy inherent to the D / A converter itself with an extremely simple structure. it can.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a D / A conversion circuit that is an embodiment of the present invention.

[Explanation of symbols]

1 Upper D / A converter 2 error table 3 adder 4 Lower D / A converter 5 Reference voltage IC 6 resistance 7 Analog signal adder

Claims (4)

[Claims] 1. A sorting means for classifying a digital signal into a higher-order digital signal and a lower-order digital signal, a higher-order digital-analog converter that outputs a higher-order analog signal when the higher-order digital signal is input, and the higher-order digital-analog converter. A lower-order digital-analog converter that is connected in parallel and outputs a lower-order analog signal when the lower-order digital signal is input,
A digital-analog conversion circuit comprising: a compensation circuit for compensating for an error of the higher-order digital-analog converter, and an adder for adding upper and lower analog signals and an error-compensating analog signal. 2. The compensating circuit according to claim 1, further comprising an error table for compensating for an error of the higher-order digital-analog converter.
A digital-analog conversion circuit having error compensation data obtained from the error table and an adder for adding a lower digital signal. 3. The digital-analog converter circuit according to claim 2, wherein the error table is a writable ROM. 4. The digital-analog converter circuit according to claim 1, wherein the maximum output signal of the lower digital-analog converter is twice the minimum output signal of the upper digital-analog converter.