JPH05217303A - Magnetic disk device - Google Patents

Abstract

PURPOSE:To execute normal write and read to a recording medium and to improve the reliability of data by generating the abnormal state of a hard disk controller(HDC) intentionally and self-diagnosing the each abnormal state. CONSTITUTION:This device is provided with the hard disk controller(HDC) 4 controlling write and read to the recording medium 1 and a reproduced signal control circuit 6 controlling a reproduced signal fetched by the hard disk controller. The reproduced signal control generates the abnormal state of the hard disk controller and the self-diagnosis of the abnormal state is executed by controlling the reproduced signal control circuit by a central processing unit(CPU).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic disk device for recording / reproducing data.

[0002]

2. Description of the Related Art At present, magnetic disk devices store 25
It is designed to read and write in fixed units of 6 bytes, 512 bytes, and 1024 bytes, and the unit is called a sector. A data format is used to assign the sector to the data surface of the recording medium.

FIG. 2 is an example of a conventional data format format, and this data format format will be described below.

The format of the data format is shown in FIG.
In, 14 PLO (Phase Locked Oscillator) (9 bytes), 15 SYNC (Synchronization Byte) (1 byte), 16 ID (Identiy Field) (6 bytes), 17 CRC
(Cyclic RedundancyChech) (2 bytes), 18 PAD (2
Byte), 19 SPLICE (2 bytes), 14 PLO (9
Byte), 15 SYNC (1 byte), 20 DATA (25
6,512,1024 bytes), 21 ECC (Error Coreection C)
ode) (6 bytes), 18 PADs (2 bytes), 19 SPLI
It consists of CE (10 bytes). The number of bytes and the order of formats described here can be arbitrarily changed.

Next, the purpose of each of the information 14 to 21 will be described. Normally, a data discrimination window having a predetermined width is provided for a bit string recorded on a recording medium at the time of reading data, and if there is a magnetization reversal in this discrimination window, it is determined that the information is 1 and 0 is not. ing. Therefore, in order to read information without error, the discrimination window must cause the voltage controlled oscillator VCO (Voltage Controlled Ocsilator) to follow the reproduction bit string including the rotation fluctuation of the spindle motor within a predetermined time.

For that purpose, the PLO 14 is provided.
It is arranged at the head of the ID information 16 and the DATA information 20 during the formatting so that the reproduced bit string of the discrimination window is followed within the time of this PLO 14. SYNC15 is PLO14
This is for distinguishing the ID information 16 and the DATA information 20 that follow. The ID information 16 indicates where on the recording medium the sector to be recorded and reproduced is allocated. Information for indicating the attribute of the sector may be recorded in this portion during recording and reproduction.

The CRC 17 is added with read error detection information generated from the SYNC 15 and the ID information 16 and is used by the hard disk controller circuit to detect a read error during reading. When the (2,7) modulation method is used as the data recording method, the PAD 18 cannot convert up to the last bit of the data depending on the data pattern, so one byte is added for conversion. ..

If it takes a longer time than usual due to fluctuations in the rotation of the motor while the ID information and the previous sector are being written, if there is no SPLICE19,
I recorded up to the part of PLO14 that was placed next, and P
It becomes impossible for the VCO to sufficiently follow the reproduction bit string of the discrimination window, which is the role of LO14, and the data cannot be reproduced correctly. Therefore, the SPLICE 19 is arranged to absorb the time variation.

The ECC 21 adds read error detection / correction information as redundant bits, and compares the error correction code data in the error correction code circuit of the hard disk controller at the time of reading to detect / correct the read error. Is. There is a hard disk controller (hereinafter referred to as HDC) for controlling recording and reproduction on a recording medium according to the above format.

FIG. 3 is a block circuit diagram showing the configuration of a signal processing system called a conventional magnetic disk device. In FIG. 3, 1 is a disk-shaped recording medium on which data is recorded, 2
Is a data head for writing and reading data to and from the recording medium 1, and 3 is an amplifier (hereinafter referred to as AMP) for amplifying the signal of the data head 2. Reference numeral 4 denotes a signal for the data head 2, which is an HDC (hard disk controller) for capturing the signal at the time of reading and controlling the output of the write signal at the time of writing, and 5 is a central processing circuit (hereinafter referred to as CPU) for controlling the HDC 4.

The operation will be described below. When reading the data of one sector, the CPU 5 sets the area to be read in the HDC 4 and starts the reading sequence. First, the HDC 4 executes the read mode, and the signal recorded on the recording medium 1 is sent from the data head 2 to the AMP.
Take in through 3. If the fetched signal is the portion of ID16, it is judged whether the information is for the set area, and if it is the set area, the signal of DATA20 following it is fetched as data and the reading sequence is ended. If it is not the set area, the read mode is continued until the ID 16 of the set area is fetched.

Next, the time of writing data will be described. C
The PU 5 sets the area to be written in the HDC 4 and starts the writing sequence. First, the HDC 4 executes the read mode to take in the signal recorded on the recording medium 1 from the data head 2 through the AMP 3. If the captured signal is the ID16 portion, it is determined whether it is for the set area.
The ATA 20, ECC 21, and PAD 18 portions are set to the write mode to record data on the recording medium 1, and then the write sequence is ended. If it is not the set area, the read mode is continued as it is until the ID 16 of the set area is taken in as in the case of reading the data.

Next, the self-diagnosis of HDC in the conventional example will be described. As the first step, the connection status of the wiring to the HDC is confirmed. At this time, several kinds of arbitrary values are written to a read / write register (not shown) of the HDC and it is confirmed whether the expected data is read. As the second stage, normal operation is confirmed. Here, arbitrary data is written in a certain area on the recording medium 1 which is not permitted to be used by the host device. After that, the data in the area is read and it is confirmed that the data is equal to the written data. The operation is executed multiple times while changing the data. Further, as another example, there is a case where a formatting operation is also performed to confirm writing / reading in the area.

[0014]

However, in the above-mentioned conventional example, only the normal state of the HDC is confirmed and the abnormal state detection is not confirmed. Therefore, in the conventional self-diagnosis, the reliability can be ensured when normally writing and reading to the recording medium, but when an abnormal state occurs, it is detected as an actual abnormal state and each abnormal state is detected. There is a problem that it is not possible to guarantee whether the HDC will perform the processing corresponding to the state.

The present invention solves such a problem and provides HDC
The purpose of the present invention is to improve the reliability of the data by intentionally causing the abnormal states described above, self-diagnosing each abnormal state, and performing normal writing and reading on the recording medium.

[0016]

According to the present invention, in a magnetic disk device for recording / reproducing data, a hard disk controller for controlling recording / reproducing with respect to a recording medium, and a reproduction signal for controlling a reproduction signal taken into the hard disk controller. A control circuit, wherein the reproduction signal control circuit causes an abnormal state of the hard disk controller, and the self-diagnosis of the abnormal state is performed by controlling the reproduction signal control circuit by a central processing circuit. ..

[0017]

According to the present invention, by confirming the normal state at the time of self-diagnosis and also confirming the abnormal state, it is judged to be normal because of the abnormality of HDC although it is actually the abnormal state. It is possible to prevent the situation where the data that the device is trying to read is different from the original data, or the data is recorded in a different area from the area that is being recorded and destroys valid data. , Data reliability can be improved.

[0018]

1 is a block circuit diagram showing the configuration of a signal processing system of a magnetic disk device according to an embodiment of the present invention.
The same numbers as in FIG. 3 are the same. A reproduction signal control circuit 6 controls the signal read from the APM 3. 7 and 8 are input / output ports of the reproduction signal control circuit 6,
I / O port 7 is AMP3 and I / O port 8 is HDC
It is connected with 4. Reference numerals 9, 10, 11, 12, and 13 are input ports of the reproduction signal control circuit 6. Also, 9 ', 1
0 ', 11', 12 'and 13' are output ports of the CPU 5,
The input ports 9 and 10 of the reproduction signal control circuit 6, respectively
It is connected to 11, 12, and 13.

In the reproduction signal control circuit 6, the AMP3
The circuit includes a circuit capable of recognizing and detecting that the signal taken in from the input / output port 7 is the information of SYNC15, ID16, CRC17 and ECC21 when the signal is read from. In the reproduction signal control circuit 6, when recording a signal, the HDC 4
The signal from is directly transmitted to AMP3. Further, at the time of reading the signal, the signal from the AMP 3 is transmitted to the HDC 4 according to the input of the input ports 9, 10, 11, 12, and 13.

The output state of the input / output port 8 with respect to the input of each port during signal reading will be described below. As for the format, there is no difference from the conventional one.
The explanation will be made by diverting the one.

The state of the input port 9 of the reproduction signal control circuit 6 controls the output state of the input / output port 8 for the SYNC 15 portion of the ID section. When the input port 9 is 1 (that is, HIGH level), the SYNC of the ID section
In the 15th part, 0 (that is, LOW level) is always output from the input / output port 8. ID when input port 9 is 0
In the SYNC 15 portion of the section, the signal taken in from the input / output port 7 is output as it is from the input / output port 8.

Depending on the state of the input port 10, CRC1
The output state of the input / output port 8 for the part 7 is controlled. When the input port 10 is 1, 0 is always output from the input / output port 8 in the CRC 17 portion. When the input port 10 is 0, the CRC 17 portion outputs the signal received from the input / output port 7 as it is from the input / output port 8.

Depending on the state of the input port 11, ID16
The output state of the input / output port 8 with respect to the above portion is controlled. When the input port 10 is 1, the ID16 part is always 0
Is output from the input / output port 8. When the input port 11 is 0, the signal input from the input / output port 7 is directly output from the input / output port 8 in the ID 16 portion.

Depending on the state of the input port 12, DAT
The output state of the input / output port 8 for the SYNC15 portion of the A section is controlled. When the input port 12 is 1, DAT
In the SYNC15 portion of the A section, 0 is always output from the input / output port 8. When the input port 9 is 0, the signal input from the input / output port 7 is directly output from the input / output port 8 in the SYNC 15 portion of the DATA section.

Depending on the state of the input port 13, the ECC2
The output state of the input / output port 8 for the part 1 is controlled. When the input port 13 is 1, 0 is always output from the input / output port 8 in the ECC 21 portion. When the input port 13 is 0, the ECC 21 portion outputs the signal received from the input / output port 7 as it is from the input / output port 8.

Next, an abnormal state occurrence pattern will be shown as an embodiment of the present invention.

A. SYNC15 of ID part cannot be detected.

B. The read detection error information generated from SYNC15 and ID16 and CRC17 are not equal.

C. The set ID 16 does not exist in the track positioned by the data head 2.

D. SYNC15 of DATA part cannot be detected.

E. Read DATA20 and ECC21
A read error occurred for. Abnormalities a to e occur when reading data, and abnormalities a to d occur when writing data.

Next, the method of generating an abnormal state according to this embodiment will be described.

In the state of a, it can occur when the input / output port 9 is 1 and the input / output ports 10, 11, 12, 13 are 0. Since all bits of SYNC15 of the ID part in this embodiment are not all 0, SYNC15 cannot be detected and a detection error state of SYNC15 of the ID part can occur.

In the state of b, it can occur when the input / output port 10 is 1 and the input / output ports 9, 11, 12, 13 are 0. CRC generated and recorded by ID part SYNC15 and ID16
Go to the area where the value of 17 is not all 0, C
Raise an RC error condition.

The state c can be generated when the input / output port 11 is 1 and the input / output ports 9, 10, 12, 13 are 0. ID16
Go to the area where the value of is not all 0, ID
Generates a compare error condition.

The state of d can be generated when the input / output port 12 is 1 and the input / output ports 9, 10, 11, 13 are 0. Since SYNC15 of the DATA section in this embodiment is not all 0 bits, SYNC15 cannot be detected and a SYNC15 detection miss state of the DATA section can occur.

In the state of e, it can occur when the input / output port 13 is 1 and the input / output ports 9, 10, 11, 12 are 0. DA
An ECC error state is generated by going to access an area where the ECC 21 values generated and recorded by TA 20 are not all zero.

As described above, in this embodiment, the abnormal state can be intentionally generated, and the HDC in the abnormal state can be generated.
The reaction of can be confirmed.

As described above, according to the present invention, it is possible to ensure the reliability in the case where data can be normally written in and read from the recording medium, and also the reliability of the abnormal state detection in the abnormal state can be guaranteed. Here, some abnormal states have been described as an example, but the type and method of abnormal state detection differ depending on the HDC and format. However, it goes without saying that it is possible to confirm whether or not the abnormal state can be detected by generating the abnormal state by the same method as in this embodiment.

[0040]

As described above, in the magnetic disk apparatus of the present invention, the reproduction signal control circuit intentionally causes the abnormal state of the hard disk controller to be determined, the abnormal state corresponding to each is determined, and the abnormal state is responded to. Confirmation as to whether processing is being performed is made as a self-diagnosis. As a result, it is judged that the hard disk controller is normal even though it is actually in an abnormal state, and the data that the host device is trying to read is different from the original data, or the area that is trying to record is a different area. It is possible to record data on the disk and prevent the occurrence of a situation in which useful data is destroyed, thereby improving the reliability of the data.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing a configuration of a signal processing system of a magnetic disk device according to an embodiment of the present invention.

FIG. 2 is an example diagram showing a conventional data format format.

FIG. 3 is a block circuit diagram showing a configuration of a signal processing system of a conventional magnetic disk device.

[Explanation of symbols]

1 ... Recording medium, 2 ... Data head, 3 ... Amplifier (A
MP), 4 ... Hard disk controller (HDC),
5 ... Central processing circuit (CPU), 6 ... Reproduction signal control circuit.

Claims (1)

[Claims] 1. A magnetic disk device for recording / reproducing data, comprising: a hard disk controller for controlling recording and reproduction on a recording medium; and a reproduction signal control circuit for controlling a reproduction signal taken into the hard disk controller. A magnetic disk device characterized in that an abnormal state of the hard disk controller is generated by a signal control circuit, and the self-diagnosis of the abnormal state is performed by controlling the reproduction signal control circuit by a central processing circuit.