JPH0521712A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To provide large capacitance even with a small device end also improve flatness by making a conductive layer on an inner side and a bottom of a trench and an Al layer extending upward from the trench bottom toward a trench upper part into a storage electrode and providing a capacitor having an electrode formed closely to the storage electrode as a counter electrode. CONSTITUTION:A poly Si layer 5 on the bottom of a trench and an Al2O3 film 4a on a wafer surface are etched to have a surface of an n<+> layer 3 exposed. Then after Al crystals are deposited on a side and the bottom of the trench successively from the Al2O3 film 4a, new Al crystals are oxidized to make the entire Al2O3 film into an Al2O3 film 4b. Then the Al2O3 film 4b is etched to have an Sin<+> layer 3 exposed. Then CVD method is employed to selectively deposit Al crystals only on Si of the n<+> layer 3 to form an Al layer 6 as a second storage electrode. Then anode oxidation is performed to change an upper part of the Al layer into Al2O3 integrated with the Al2O3 film 4b. Then an Al layer 7 as an counter electrode is deposited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device incorporating a capacitance element and a manufacturing method.

[0002]

2. Description of the Related Art With the increase in density and speed of integrated circuits,
There is a demand for miniaturization and large capacity of capacitive elements. As a method of increasing the area of the capacitive element in a limited substrate surface area, a trench method of digging a groove in silicon (for example, H. Suna
mi et al: IEEE Electron Device Lett.EDL-4 (1983) P90-
91), stacked method of stacking capacitive elements on top of transistors (eg Y. Takemane et al: ISSCC Dig. Tech.
Papers (1985) PP250-251), and a fin structure method in which the electrodes of the capacitive element are stacked in multiple layers (for example, T.Ema et a
l.IEDM Tech Dig. (1988) PP592-595) etc. have been proposed.

FIG. 11 is a schematic sectional view of a conventional trench capacitor used in a D-RAM. In this capacitor, an n ⁺ layer 22 formed on the inner wall surface of a trench formed on a P-type substrate 21 is used as a storage electrode, and a poly-Si 24 is embedded in the trench with an insulating film 23 interposed therebetween.
Is the counter electrode. In the trench capacitor having such a structure, since the capacitor is formed inside the substrate, the capacitor area can be increased. Further, since the step on the surface of the element is small, it is possible to easily form the wiring pattern and etch the contact hole.

However, it is difficult to control the shape of trench etching because it is necessary to form a deeper trench in order to increase the capacitor area and electrostatic capacity.

FIG. 12 is a schematic sectional view of a capacitor having a fin structure used in a D-RAM. This capacitor is formed of a poly-Si storage electrode 32 stacked in a fin shape and a counter electrode 34 surrounding the electrode 32 with an insulating film 33 interposed therebetween. Such a fin structure capacitor does not need to introduce a new technology such as forming a trench in the substrate, the process is relatively simple, and it has a characteristic that it is more resistant to α-ray soft error than a trench capacitor.

However, in order to increase the capacitance of the capacitor, it is necessary to stack the fins in multiple layers, and as a result,
The surface step on the element surface becomes large. This step becomes a heavy burden on the depth of focus and etching at the time of exposure, and the contact having a high aspect ratio caused by the step causes serious problems in lowering the resistance and increasing the reliability of the wiring.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned technical problems, and an object of the present invention is to have a large capacitance even in a small size and to have excellent flatness. It is an object of the present invention to provide a semiconductor device having a highly integrated capacitive element and a manufacturing method.

[0008]

In order to achieve the above object, the semiconductor device of the present invention is provided with a conductive layer on the inner side surface and the bottom surface of a trench formed in a semiconductor substrate and Al extending from the bottom of the trench toward the upper portion of the trench. Each layer includes a storage electrode, and a capacitor having an electrode formed adjacent to the storage electrode as a counter electrode is included. Here, Al ₂ O ₃ may be provided between the storage electrode and the counter electrode. The Al layer as the storage electrode is selectively formed on the semiconductor substrate by a CVD method using alkyl aluminum hydride and hydrogen.
1 may be grown.

The semiconductor device manufacturing method of the present invention is
A step of forming a trench in the semiconductor substrate; a step of forming a first storage electrode on an inner side surface and a bottom surface of the trench; and a step from a part of the first storage electrode formed on the bottom surface of the trench toward the upper part of the trench. The method is characterized by including a step of forming two storage electrodes and a step of forming a counter electrode on the first and second storage electrodes with an insulating layer interposed therebetween. Here, in the step of forming both storage electrodes, at least the step of forming the second storage electrode is performed by CVD of Al or a metal containing Al.
You may make it grow by the method. Further, the insulator layer may be an aluminum oxide film formed by oxidizing the surface of the second storage electrode. Further, the step of forming the second storage electrode may be performed by a CVD method using an alkylaluminum hydride gas and a hydrogen gas. Here, the alkyl aluminum hydride may be dimethyl aluminum hydride.

[0010]

Embodiments of the present invention will now be described in detail with reference to the drawings.

(Embodiment 1) FIGS. 1, 2 and 3 show a process flow as an embodiment of a method for manufacturing a semiconductor device of the present invention.

The exposed P-type Si single crystal substrate 1 (10
A SiO ₂ film 2 having a thickness of 5000 Å was formed on the (0) surface, and using this as a mask, a trench having a diameter of about 1.5 μm and a depth of about 2.0 μm was formed by reactive ion etching (RIE). CF ₂ Cl ₂ was used as an etching gas. Next, the inner wall surface and bottom surface of the trench, and further SiO
₂ As 2 ⁺ was ion-implanted into the film 2 and heat treatment was performed at 1000 ° C. for 15 minutes to form the n ⁺ layer 3 as the first storage electrode (see (A) in FIG. 1).

Further, an Al crystal having a thickness of about 250 Å was deposited on the surface of the substrate 1 by LPCVD. LPCVD
260 using triisobutylaluminum as a source gas
Thermal decomposition was performed at 0.5 ° C. and 0.5 Torr. Then, the entire wafer was anodized using 3% chromic acid to oxidize all the Al crystals to form an Al ₂ O ₃ film 4a as an insulator layer (see (B) in FIG. 1). The conditions for the anodic oxidation here are as follows: temperature 40 ° C., voltage 30 V, current density 0.4.
A / dm ² .

Next, a poly-Si layer 5 having a thickness of 0.2 μm was formed on the entire surface of the Al ₂ O ₃ film 4a by the LPCVD method (see (C) in FIG. 1).

Next, the poly Si layer 5 at the bottom of the trench and the Al ₂ O ₃ film 4a on the wafer surface were etched by RIE to expose the surface of the n ⁺ layer 3 (see (A) in FIG. 2).

Next, again by LPCVD, Al crystals are continuously deposited on the Al ₂ O ₃ film 4a on the side surface and the bottom surface of the trench, and then new Al crystals are oxidized in the same manner as described above, and the entire Al ₂ O ₃ film is oxidized. Was used as the Al ₂ O ₃ film 4b (see FIG. 2B).

Next, by RIE, Al at the bottom of the trench is
_{The 2} O ₃ film 4b was etched to expose the Sin ⁺ layer 3 (see (C) in FIG. 2).

After that, n ^{+ is formed} by the CVD method described later using the gas of alkyl aluminum hydride and hydrogen.
Secondly, by selectively depositing Al crystal only on Si of layer 3,
An Al layer 6 was formed as a storage electrode (see (A) in FIG. 3). Dimethyl aluminum hydride (hereinafter abbreviated as DMAH) is used as a source gas, hydrogen gas is a reaction gas, the total pressure is 1.5 Torr, and the DMAH partial pressure is 5.0 × 10 ⁻³ Torr. It was carried out by heating to ℃.

Next, the integral top of the Al layer performs anodizing using 3% chromic acid in the Al ₂ O ₃ film 4b Al ₂ O ₃
Changed to. Then, an Al layer 7 as a counter electrode was deposited on the wafer surface by a CVD method to obtain a semiconductor device having a capacitor according to the present invention (see (B) in FIG. 3).

That is, Si on the side and bottom surfaces of the trench
The n ⁺ layer 3 and the selectively grown Al layer 6 are used as storage electrodes,
A capacitor having the poly-Si5 and Al layer 7 located between them as the counter electrode was obtained.

In the above-mentioned embodiment, Al is used as the insulating film.
Although the Al ₂ O ₃ film 4b formed by oxidizing is used, a SiO ₂ film, a Si ₃ N ₄ film or a composite film thereof may be used instead of the Al ₂ O ₃ film 4b. In this case, instead of the step of forming the Al ₂ O ₃ layer 4 by the Al deposition and oxidation, the films of SiO ₂ , Si ₃ N _{4 and the} like are replaced with C
A step of forming by VD, thermal oxidation, thermal nitriding or the like may be performed.

Here, selective deposition of Al using alkyl aluminum hydride and hydrogen (hereinafter referred to as selective Al
-Abbreviated as CVD) will be described.

First, as the metal used for the Al layers 6 and 7, in addition to Al, Al-Si, Al-Cu, A
An alloy containing Al as a main component such as l-Si-Ti, Al, Al-Si, and Cu, Cu, Mo, W, or an alloy thereof can be used. In particular, when filling the inside of the contact hole to take out the electrode, Al-C described later is used.
It is preferable to use the VD method. As the insulating film, CV
Silicon oxide film, silicon nitride film, PSG (phosphosilicate glass) film, BPS by D method or sputtering method
An inorganic material such as a G (boron phosphosilicate glass) film or an organic material such as a polyimide film is preferably used. In order to form a wiring layer on the insulating film, a metal layer may be formed on the entire surface of the insulating film by a CVD method, a sputtering method, or the like, and then patterned into a predetermined wiring shape by photolithography. A predetermined part of the film surface may be exposed to plasma for modification, and the metal may be selectively deposited only on the modified surface part.

(Film Forming Method) A film forming method suitable for forming the electrode according to the present invention will be described below.

This method is a film forming method suitable for embedding a conductive material in the opening to form the electrode having the above-mentioned structure. The film forming method suitable for the present invention is to form a deposited film by a surface reaction on an electron donating substrate using a gas of alkylaluminum hydride and hydrogen gas (hereinafter referred to as Al-CVD method). ).

In particular, a high-quality Al film can be obtained by using monomethylaluminum hydride (MMAH) or dimethylaluminum hydride (DMAH) as a source gas, H ₂ gas as a reaction gas, and heating the substrate surface under a mixed gas of these. Can be deposited. Here, at the time of selective Al deposition, it is preferable to maintain the surface temperature of the substrate at a decomposition temperature of alkylaluminum hydride or higher and lower than 450 ° C. by direct heating or indirect heating, and more preferably 260 ° C. or higher and 440 ° C. or lower.

Direct heating and indirect heating are available as methods for heating the substrate within the above temperature range. Particularly, if the substrate is maintained at the above temperature by direct heating, a high-quality Al film can be formed at a high deposition rate. it can. For example, the substrate surface temperature at the time of forming the Al film is 260 which is a more preferable temperature range.
When the temperature is set at ℃ to 440 ℃, a good quality film can be obtained at a higher deposition rate than the case of indirect heating of 300 Å to 5000 Å / min. Such direct heating (energy from the heating means is directly transferred to the substrate to heat the substrate itself)
Examples of the method include lamp heating with a halogen lamp, a xenon lamp, or the like. In addition, there is resistance heating as a method of indirect heating, which is performed by using a heating element or the like provided on a substrate supporting member arranged in a space for forming a deposited film for supporting a substrate on which a deposited film is to be formed. You can

When the CVD method is applied to a substrate in which an electron-donating surface portion and a non-electron-donating surface portion coexist by this method, Al is formed only on the electron-donating substrate surface portion with good selectivity. A single crystal is formed. This Al is an electrode /
It is excellent in all the characteristics desired as a wiring material. That is, the reduction of the hilllock occurrence probability and the alloy spike occurrence probability are achieved.

This is because it is possible to selectively form high-quality Al on the surface made of a semiconductor or a conductor as an electron-donating surface, and because the Al has excellent crystallinity, it is possible to form an underlying silicon or the like. It is considered that the formation of alloy spikes due to the eutectic reaction is hardly observed or is extremely small. When it is adopted as an electrode of a semiconductor device, an effect which has not been expected in the conventional technology beyond the concept of the Al electrode which has been considered in the past can be obtained.

As described above, Al deposited in the opening formed on the electron donating surface, for example, the insulating film and exposing the surface of the semiconductor substrate has a single crystal structure.
According to the l-CVD method, the following metal film containing Al as a main component can be selectively deposited, and the film quality also exhibits excellent characteristics.

For example, in addition to the alkylaluminum hydride gas and hydrogen, SiH ₄ , Si ₂ H ₆ , and S are added.
i ₃ H ₈ , Si (CH ₃ ) ₄ , SiCl ₄ , SiH ₂ C
gas containing Si atoms such as l ₂ and SiHCl ₃ , or TiC
Gases containing Ti atoms such as l ₄ , TiBr ₄ , Ti (CH ₃ ) ₄ and bisacetylacetonato copper Cu (C ₅ H ₇ O
₂ ), bisdipivaloylmethanite copper Cu (C ₁₁ H ₁₉ O
₂ ) ₂ , bishexafluoroacetylacetonato copper Cu
A gas containing Cu atoms such as (C ₅ HF ₆ O ₂ ) ₂ is appropriately combined and introduced to form a mixed gas atmosphere such as Al.
-Si, Al-Ti, Al-Cu, Al-Si-Ti,
The electrodes may be formed by selectively depositing a conductive material such as Al-Si-Cu.

Since the Al-CVD method is a film forming method having excellent selectivity and the surface properties of the deposited film are good, a non-selective film forming method is applied to the next deposition step. Then, the above-mentioned selectively deposited Al film and S as an insulating film are formed.
By forming Al or a metal film containing Al as a main component also on iO ₂ or the like, a suitable metal film having high versatility as a wiring of a semiconductor device can be obtained.

The metal film as described above is specifically as follows. Selectively deposited Al, Al-Si, Al-
Ti, Al-Cu, Al-Si-Ti, Al-Si-C
u, non-selectively deposited Al, Al-Si, Al-T
i, Al-Cu, Al-Si-Ti, Al-Si-Cu
And the combination.

As a film forming method for non-selective deposition, there are a CVD method other than the Al-CVD method, a sputtering method and the like.

(Film Forming Apparatus) Next, a film forming apparatus suitable for forming the electrode according to the present invention will be described.

4 to 6 schematically show a metal film continuous forming apparatus suitable for applying the above-described film forming method.

As shown in FIG. 4, this continuous metal film forming apparatus has a load lock chamber 311, which is connected by gate valves 310a to 310f so that they can communicate with each other while shutting off the outside air, and CVD as a first film forming chamber. Reaction chamber 312, R
An F etching chamber 313, a sputtering chamber 314 as a second film forming chamber, and a load lock chamber 315 are provided, and each chamber is exhausted by exhaust systems 316a to 316e so that the pressure can be reduced. Here, the load lock chamber 311 is a chamber for replacing the substrate atmosphere before deposition processing with an H ₂ atmosphere after evacuation in order to improve throughput. The next CVD reaction chamber 312 is a chamber for performing selective deposition on the substrate by the above-mentioned Al-CVD method under normal pressure or reduced pressure, and the surface of the substrate to be film-formed can be heated at least in the range of 200 ° C to 450 ° C. Heating resistor 31
7 is provided inside, and a source gas such as an alkylaluminum hydride vaporized by bubbling hydrogen with a bubbler 319-1 is introduced into the chamber by a CVD source gas introduction line 319, and a gas line 319. It is configured such that hydrogen gas as a reaction gas is introduced from ′. Next R
The F etching chamber 313 is a chamber for cleaning (etching) the surface of the substrate after the selective deposition in an Ar atmosphere, and inside thereof is a substrate holder 320 capable of heating the substrate at least in the range of 100 to 250 ° C. and an RF. An etching electrode line 321 is provided, and an Ar gas supply line 322 is connected. Next sputter chamber 314
Is a chamber for non-selectively depositing a metal film on the surface of the substrate by sputtering in an Ar atmosphere.
Substrate holder 323 heated in the range of 00 ° C to 250 ° C
And a target electrode 324 to which the sputter target material 324a is attached, and an Ar gas supply line 325 is connected. Last load lock room 3
Reference numeral 15 denotes an adjustment chamber before the substrate after the deposition of the metal film is exposed to the outside air, and is configured to replace the atmosphere with N ₂ .

FIG. 5 shows another structural example of a continuous metal film forming apparatus suitable for applying the above-described film forming method, and the same parts as those in FIG. The apparatus of FIG. 5 is different from the apparatus of FIG. 4 in that a halogen lamp 330 is provided as a direct heating means and the surface of the substrate can be directly heated. Therefore, the substrate holder 312 does not support the substrate in a floating state. That is, the holding claw 331 is provided.

By directly heating the surface of the substrate with such a structure, the deposition rate can be further improved as described above.

In practice, the apparatus for continuously forming a metal film having the above-described structure, as shown in FIG. 6, uses the transfer chamber 326 as a relay chamber, the load lock chamber 311, the CVD reaction chamber 312, and the RF.
The etching chamber 313, the sputtering chamber 314, and the load lock chamber 315 are substantially equivalent to each other. In this configuration, the load lock chamber 311 also serves as the load lock chamber 315. As shown in the figure, the transfer chamber 326 is provided with an arm 327 as a transfer means capable of rotating in the normal and reverse directions in the AA direction and expanding and contracting in the BB direction. By this arm 327, an arrow in FIG. As shown, the substrate is sequentially loaded into the load lock chamber 311 according to the process.
From the CVD chamber 312, the RF etching chamber 313, the sputtering chamber 314, and the load lock chamber 315 can be continuously moved without being exposed to the outside air.

(Film Forming Procedure) A film forming procedure for forming electrodes and wirings according to the present invention will be described.

FIG. 8 is a schematic perspective view for explaining a film forming procedure for forming electrodes and wirings according to the present invention.

First, the outline will be described. A semiconductor substrate having holes formed in an insulating film is prepared, the substrate is placed in a film forming chamber, and the surface thereof is kept at, for example, 260 ° C. to 450 ° C., and a DMAH gas and a hydrogen gas as alkyl aluminum hydride are prepared. By a thermal CVD method in a mixed atmosphere, Al is selectively deposited on the exposed portions of the semiconductor in the openings. Of course, as described above, a gas containing Si atoms or the like may be introduced to selectively deposit a metal film containing Al as a main component such as Al—Si. Next, Al or a metal film containing Al as a main component is non-selectively formed on the Al and the insulating film selectively deposited by the sputtering method. After that, electrodes and wirings can be formed by patterning the metal film non-selectively deposited in a desired wiring shape.

Next, a specific description will be given with reference to FIGS. First, the base is prepared. As the substrate, for example, a single crystal Si wafer on which an insulating film having apertures of various diameters is formed is prepared.

FIG. 8A is a schematic view showing a part of this substrate. Here, 401 is a single crystal silicon substrate as a conductive substrate, and 402 is a thermal silicon oxide film as an insulating film (layer). Reference numerals 403 and 404 denote openings (exposed portions) having different diameters.

The procedure for forming an Al film, which will serve as an electrode as the first wiring layer on the substrate, is as follows with reference to FIG.

First, the above-mentioned substrate is placed in the load lock chamber 31.
Place it in 1. As described above, hydrogen is introduced into the load lock chamber 311 to create a hydrogen atmosphere. Then, the inside of the reaction chamber 312 is almost 1 × 10 ⁻⁸ T by the exhaust system 316b.
Exhaust to orr. However, the degree of vacuum in the reaction chamber 312 is 1
Al can be deposited even if it is worse than × 10 ^-8 Torr.

Then, the bubbled DMAH gas is supplied from the gas line 319. H ₂ is used as the carrier gas for the DMAH line.

The second gas line 319 'is for H ₂ as a reaction gas, and H ₂ is flown from this second gas line 319' to adjust the opening degree of a slow leak valve (not shown) to thereby form a reaction chamber. The pressure in 312 is set to a predetermined value. A typical pressure in this case is approximately 1.5 Torr. DMAH is introduced into the reaction tube through the DMAH line. Total pressure is about 1.5 Torr, DMAH partial pressure is about 5.0 × 10 ^-3 T
orr. After that, the halogen lamp 330 is energized to directly heat the wafer. In this way, Al is selectively deposited.

After the predetermined deposition time has elapsed, the supply of DMAH is once stopped. The predetermined deposition time of the Al film deposited in this process is A on Si (single crystal silicon substrate).
It is the time until the thickness of the 1 film becomes equal to the film thickness of SiO ₂ (thermal oxide film), and can be obtained in advance by experiments.

At this time, the temperature of the substrate surface by direct heating is set to about 270 ° C. According to the steps so far, as shown in FIG. 8B, the Al film 40 is selectively formed in the opening.
5 is deposited.

The above is referred to as the first film forming step for forming the electrode in the contact hole.

After the first film forming step, the CVD reaction chamber 312
Is evacuated by the exhaust system 316b until a vacuum degree of 5 × 10 ⁻³ Torr or less is reached. At the same time, the RF etching chamber 313 is evacuated to 5 × 10 ⁻⁶ Torr or less. After confirming that both chambers have reached the above vacuum level, the gate valve 3
10c is opened, and the substrate is transferred to the CVD reaction chamber 31.
2 to the RF etching chamber 313, and the gate valve 310c is closed. The substrate is transported to the RF etching chamber 313, and the RF etching chamber 313 is evacuated by the exhaust system 316c until the degree of vacuum reaches 10 ⁻⁶ Torr or less. After that, argon is supplied from the RF etching argon supply line 322 to supply the RF etching chamber 313 with 10 ⁻¹ to 10 −.
Maintain an argon atmosphere of 10 ⁻³ Torr. The RF etching substrate holder 320 is maintained at about 200 ° C., and the RF etching electrode 321 is supplied with Rf power of 100 W for about 60 seconds to cause the discharge of argon in the RF etching chamber 313. By doing so, the surface of the substrate can be etched with argon ions to remove the unnecessary surface layer of the CVD deposited film. In this case, the etching depth is about 100Å, which is equivalent to oxide. Here, although the surface of the CVD deposited film was etched in the RF etching chamber, the surface layer of the CVD film of the substrate transported in a vacuum does not contain oxygen and the like in the atmosphere. I can't do it. In that case, the RF etching chamber 313 includes a CVD reaction chamber 312 and a sputtering chamber 314.
When the difference in temperature is significantly different, it functions as a temperature changing chamber for changing the temperature in a short time.

After the RF etching is completed in the RF etching chamber 313, the inflow of argon is stopped and the RF is removed.
Argon in the etching chamber 313 is exhausted. After exhausting the RF etching chamber 313 to 5 × 10 ⁻⁶ Torr and exhausting the sputtering chamber 314 to 5 × 10 ⁻⁶ Torr or less, the gate valve 310 d is opened. After that, the substrate is transferred from the RF etching chamber 313 to the sputtering chamber 3 by using a carrier.
14, and the gate valve 310d is closed.

After the substrate is transferred to the sputtering chamber 314,
The sputtering chamber 314 and the RF etching chamber 313 are set to 1
Argon atmosphere of 0 ^-1 to 10 ^-3 Torr is used, and the temperature of the substrate holder 323 on which the substrate is mounted is set to 200 to 250 ° C.
Set as appropriate. Then, discharge of argon is performed with a DC power of 5 to 10 kw, and Al or Al-Si (Si: 0.5
%) Etc. with a target material such as Al or A
A metal such as l-Si is formed on a substrate at a deposition rate of about 10000Å / min. This process is a non-selective deposition process. This is referred to as a second film forming step for forming a wiring connecting to the electrode.

After forming a metal film of about 5000 Å on the substrate, the inflow of argon and the application of DC power are stopped. After exhausting the load lock chamber 311 to 5 × 10 ⁻³ Torr or less, the gate valve 310 e is opened and the substrate is moved. After closing the gate valve 310e, N ₂ gas is allowed to flow into the load lock chamber 311 until the atmospheric pressure is reached, the gate valve 310f is opened, and the substrate is taken out of the apparatus.

According to the above second Al film deposition process, the Al film 40 is formed on the SiO ₂ film 402 as shown in FIG.
6 can be formed.

Then, by patterning the Al film 406 as shown in FIG. 8D, a wiring having a desired shape can be obtained.

(Experimental Example) Below, the above-mentioned Al-CVD method is excellent, and how the Al deposited in the openings is a good quality film will be explained based on the experimental results.

First, the surface of an N-type single crystal silicon wafer was thermally oxidized as a substrate to form 8000 Å SiO ₂ and 0.25 μm × 0.25 μm square to 100 μm × 100.
The underlying Si layer is formed by patterning openings with various diameters of μm square.
We prepared multiple exposed single crystals (Sample 1
-1).

An Al film was formed from these by an Al-CVD method under the following conditions. DMAH as source gas, hydrogen as reaction gas, total pressure 1.5 Torr, DMAH
Under the common condition that the partial pressure is 5.0 × 10 ⁻³ Torr, the amount of electric power supplied to the halogen lamp is adjusted and the substrate surface temperature is set in the range of 200 ° C. to 490 ° C. by direct heating to form a film. It was

The results are shown in Table 1.

[0063]

[Table 1]

As can be seen from Table 1, when the surface temperature of the substrate by direct heating is 260 ° C. or higher, Al is 3,000 in the open hole.
It was selectively deposited at a high deposition rate of ~ 5000Å / min.

Examining the characteristics of the Al film in the aperture when the substrate surface temperature is in the range of 260 ° C. to 440 ° C., there is no carbon content, the resistivity is 2.8 to 3.4 μΩcm, and the reflectance is 90 to
95%, hillock density of 1 μm or more is 0 to 10,
It was found that the characteristics were good with almost no occurrence of spikes (breaking probability of 0.15 μm junction).

On the other hand, the substrate surface temperature is 200 ° C.-2.
At 50 ° C., although the film quality is slightly worse than that at 260 ° C. to 440 ° C., it is a considerably good film from the viewpoint of the prior art, but the deposition rate is 1000 to 1500 Å / min, which is by no means sufficiently high. The throughput was also relatively low at 7 to 10 sheets / H.

When the substrate surface temperature is 450 ° C. or higher, the reflectance is 60% or less, the hillock density of 1 μm or more is 10 to 10 ⁴ cm ^-2 , and the alloy spike generation is 0 to 30%.
Therefore, the characteristics of the Al film in the opening deteriorated.

Next, it will be described how the above method can be suitably used for the opening such as the contact hole and the through hole.

That is, it is preferably applied to the contact hole / through hole structure made of the materials described below.

An Al film was formed on a substrate (sample) having the following structure under the same conditions as when forming an Al film on Sample 1-1 described above.

A silicon oxide film is formed as a second substrate surface material by a CVD method on single crystal silicon as a first substrate surface material, and patterning is performed by a photolithography process to partially expose the single crystal silicon surface. Was ejected.

The thickness of the thermally oxidized SiO ₂ film at this time is 80
00Å, the exposed portion of the single crystal silicon, that is, the size of the opening is 0.25 μm × 0.25 μm to 100 μm × 100 μm
Met. Thus, Sample 1-2 was prepared (hereinafter, such a sample is referred to as "CVDSiO ₂ (hereinafter S
(abbreviated as iO ₂ ) / single crystal silicon ”).

Sample 1-3 is a boron-doped oxide film (hereinafter abbreviated as BSG) / single-crystal silicon formed by atmospheric pressure CVD, and Sample 1-4 is a phosphorus-doped oxide film (hereinafter referred to as PSG) formed by atmospheric pressure CVD. (Abbreviated) / single crystal silicon, Sample 1-5 is a phosphorus- and boron-doped oxide film (hereinafter abbreviated as BSPG) formed by atmospheric pressure CVD / single crystal silicon, Sample 1-6 is plasma CV
Nitride film formed by D (hereinafter abbreviated as P-SiN) /
Single crystal silicon, Sample 1-7 is a thermal nitride film (hereinafter T-
SiN) / single crystal silicon, sample 1-8 is a nitride film formed by low pressure CVD (hereinafter abbreviated as LP-SiN) / single crystal silicon, sample 1-9 is a nitride film formed by an ECR apparatus (hereinafter (Abbreviated as ECR-SiN)
/ It is single crystal silicon.

Further, the following first substrate surface material (1
Samples 1-11 to 1-179 (Caution: Sample Nos. 1-10, 20, 30, 40, 50, 60, 7) by all combinations of 8 types) and the second substrate surface material (9 types)
0,80,90,100,110,120,130,1
40, 150, 160, 170 are missing numbers). Single crystal silicon (single crystal Si) as the first substrate surface material,
Polycrystalline silicon (polycrystalline Si), amorphous silicon (amorphous Si), tungsten (W), molybdenum (Mo),
Tantalum (Ta), Tungsten silicide (WS)
i), titanium silicide (TiSi), aluminum (Al), aluminum silicon (Al-Si), titanium aluminum (Al-Ti), titanium nitride (Ti-N), copper (Cu), aluminum silicon copper (Al-). Si-Cu), aluminum palladium (Al
-Pd), titanium (Ti), molybdenum silicide (M
o-Si) and tantalum silicide (Ta-Si) were used. The second substrate surface material is T-SiO ₂ , Si
_{O 2, BSG, PSG, BPSG} , P-SiN, T-S
iN, LP-SiN, ECR-SiN. It was possible to form a good Al film comparable to the sample 1-1 described above in all the samples described above.

Next, Al is non-selectively applied to the substrate on which Al is selectively deposited as described above by the above-described sputtering method.
Was deposited and patterned.

As a result, the Al film formed by the sputtering method and the Al film selectively deposited in the opening have good electrical and mechanical durability because the surface property of the Al film in the opening is good. The contact state was high.

(Embodiment 2) FIGS. 9 and 10 show a process flow as another embodiment of the method for manufacturing a semiconductor device of the present invention.

An SiO ₂ film 12 having a thickness of 5000 Å is formed on the (100) plane of the exposed single crystal substrate 11 and the diameter is about 1.0 μm and the depth is about 10 μm by RIE using CF ₂ Cl ₂ as a mask. A trench 13 of 2.0 μm was formed (see (A) in FIG. 9). Next, an oxide film 14 made of SiO ₂ and having a thickness of about 5000 Å was formed inside the trench by thermal oxidation (see (B) in FIG. 9). At this time, the oxide film 14 may be formed by the CVD method.

Next, the oxide film on the bottom of the trench was etched and removed by RIE to expose the Si substrate 11 (see FIG. 9C).

Next, the above-mentioned CVD using DMAH and hydrogen
Al was selectively deposited by a method to form an inner columnar Al layer 15 as a first storage electrode in the trench (FIG. 10).
(A) in).

Next, the oxide film 14 is entirely removed by hydrofluoric acid, and then a second film is formed on the entire surface of the wafer by the CVD method.
An Al layer 16 as a storage electrode was deposited (see (B) in FIG. 10). At this time, a second layer is also formed on the surface of the first storage electrode.
The Al layer of the storage electrode is deposited.

Next, the entire wafer is treated with hydrogen peroxide solution (H ₂ O
₂ : H ₂ O = 1: 1) to form an Al ₂ O ₃ film 17 as an insulator layer having a thickness of about 30 Å on the surface of the Al layer 16 (see (C) in FIG. 10). At this time, the Al ₂ O ₃ film 1 is formed by another method such as treating Al with oxygen plasma.
7 may be formed.

Next, Al was deposited on the Al ₂ O ₃ film 17 by the CVD method to form the upper electrode 18 to obtain a semiconductor device having a capacitor according to the present invention (see (C) in FIG. 10). ). That is, the Al layers 15 and 16 grown from the side surface and the bottom surface of the trench are formed into the first
A capacitor having the Al upper electrode 18 positioned between the two storage electrodes and the second storage electrode as the counter electrode was obtained.

In the above embodiment, the Al ₂ O ₃ film 17 is used.
Was formed to have a desired thickness, and the upper electrode 18 was directly formed on this. The substrate was heated to about 350 ° C. and Al ₂ was formed by a CVD method using NH ₃ gas and SiH ₄ gas. A silicon nitride film as a second insulator layer is deposited on the O ₃ film 17 to a thickness of, for example, about 100 Å, and CV is further added.
The upper electrode 18 may be formed by depositing an upper layer of Al on the silicon nitride film by the D method.

In the above two embodiments, the Al region grown from the bottom of the trench can be used as the storage electrode, so that when compared with the conventional trench capacitor, about twice the capacitor area is realized in the trench of the same size. be able to.

Further, in the conventional trench capacitor,
Although SiO ₂ having a relative dielectric constant of 3.9 was used as the insulating material between the electrodes, according to the capacitor of the above-described embodiment, Al ₂ O ₃ having a relative dielectric constant of 10.0 was used as the insulating material between the electrodes. Therefore, if the insulating material has the same film thickness, the area required for the storage capacitor can be reduced to about 40% of the conventional one.

[0087]

As described above, according to the present invention,
It is possible to obtain a semiconductor device which has a small capacitance, a large capacitance, and a highly integrated capacitance element having excellent planarity.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a part of a manufacturing process flow as one embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a schematic cross-sectional view showing a part of a flow subsequent to the flow shown in FIG.

FIG. 3 is a schematic cross-sectional view showing a flow that follows the flows shown in FIGS. 1 and 2.

FIG. 4 is a diagram showing an example of a desirable manufacturing apparatus to which the method for manufacturing a semiconductor device according to the present invention is applied.

FIG. 5 is a diagram showing an example of a desirable manufacturing apparatus to which the method for manufacturing a semiconductor device according to the present invention is applied.

FIG. 6 is a diagram showing an example of a desirable manufacturing apparatus to which the method for manufacturing a semiconductor device according to the present invention is applied.

FIG. 7 is a diagram showing an example of a desirable manufacturing apparatus to which the method for manufacturing a semiconductor device according to the present invention is applied.

FIG. 8 is a schematic perspective view for explaining how a wiring layer is formed by the method for manufacturing a semiconductor device according to the present invention.

FIG. 9 is a schematic cross-sectional view showing a part of a manufacturing process flow as another embodiment of the method for manufacturing a semiconductor device of the present invention.

10 is a schematic cross-sectional view showing a flow that follows the flow shown in FIG.

FIG. 11 is a schematic sectional view showing a conventional trench cell.

FIG. 12 is a schematic cross-sectional view showing a conventional fin structure cell.

[Explanation of symbols]

1 semiconductor substrate 2 SiO ₂ film 3 n ⁺ layer (conductive layer: first storage electrode) 4a, 4b Al ₂ O ₃ film (insulator layer) 5 poly-Si layer (counter electrode) 6 Al layer (second storage electrode) 7 Al layer (counter electrode) 11 Semiconductor substrate 12 SiO ₂ film 13 Trench 14 SiO ₂ film 15 Al layer (first storage electrode) 16 Al layer (second storage electrode) 17 Al ₂ O ₃ film (insulator layer) 18 Al layer (counter electrode) 21 P-type Si substrate 22 n ⁺ layer (storage electrode) 23 Insulating film 24 Poly-Si layer (counter electrode) 31 P-type Si substrate 32 Poly-Si layer (storage electrode) 33 Insulating film 34 Poly-Si layer (Counter electrodes) 310a to 310f Gate valves 311 and 315 Load lock chamber 312 CVD reaction chamber 313 RF etching chamber 314 Sputtering chambers 316a to 316e Exhaust system 317 Heating resistor 318 Base holder 319 Source gas introduction line 319-1 Bubbler 320,323 Base holder 321 RF etching electrode line 322,325 Ar gas supply line 324a Sputter target material 324 Target electrode 326 Transfer chamber 327 Arm 330 Halogen lamp 331 Holding claw 406 Al film 410 Single crystal Silicon substrate 402 Insulating films 403, 404 Opening (exposed part) 405 Al film

Claims (12)

[Claims] 1. A conductive layer on an inner side surface and a bottom surface of a trench formed in a semiconductor substrate and an Al layer extending from a trench bottom portion to an upper portion of the trench are used as storage electrodes, and electrodes formed in the vicinity of the storage electrode are defined as storage electrodes. A semiconductor device comprising a capacitor serving as a counter electrode. 2. A device between the storage electrode and the counter electrode
The semiconductor device according to claim 1, comprising l ₂ O ₃ . 3. The Al layer as the storage electrode is formed by selectively growing Al on the semiconductor substrate by a CVD method using alkylaluminum hydride and hydrogen. Semiconductor device. 4. A step of forming a trench in a semiconductor substrate, a step of forming a first storage electrode on an inner side surface and a bottom surface of the trench, and a trench from a part of the first storage electrode formed on the bottom surface of the trench. A method of manufacturing a semiconductor device, comprising: a step of forming a second storage electrode toward an upper portion; and a step of forming a counter electrode on the first and second storage electrodes via an insulating layer. 5. The semiconductor according to claim 4, wherein at least the step of forming the second storage electrode among the steps of forming both storage electrodes is performed by growing Al or a metal containing Al by a CVD method. Device manufacturing method. 6. The method for manufacturing a semiconductor device according to claim 4, wherein the insulator layer is an aluminum oxide film formed by oxidizing the surface of the deposited Al layer. 7. The method of manufacturing a semiconductor device according to claim 5, wherein the step of forming the second storage electrode is performed by a CVD method using an alkylaluminum hydride gas and a hydrogen gas. 8. A step of forming a trench in a semiconductor substrate, a step of forming a first storage electrode from a part of a bottom surface of the trench toward an upper portion of the trench, and a side surface of the trench, a bottom surface and a surface of the first storage electrode. A method of manufacturing a semiconductor device, comprising: a step of forming a second storage electrode; and a step of forming a counter electrode on the second storage electrode via an insulating layer. 9. Of the steps of forming both storage electrodes, at least the step of forming the first storage electrode is Al or Al.
9. The method for manufacturing a semiconductor device according to claim 8, wherein the metal containing is grown by a CVD method. 10. The method of manufacturing a semiconductor device according to claim 8, wherein the insulator layer is an aluminum oxide film formed by oxidizing the surface of the second storage electrode. 11. The method of manufacturing a semiconductor device according to claim 8, wherein the step of forming the first storage electrode is performed by a CVD method using an alkylaluminum hydride gas and a hydrogen gas. 12. The method of manufacturing a semiconductor device according to claim 7, wherein the alkyl aluminum hydride is dimethyl aluminum hydride.