JP2000058650A - Semiconductor device, and method and device for manufacturing the device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid operation failures or degraded yield, even if a wiring layer is formed using Cu. SOLUTION: A lower part wiring layer 102 is formed at the surface of a semiconductor substrate 101. Then, a SiO film 103, an Si3N4 film 104, and an SiO2 film 105 are sequentially deposited to form a through-hole 106 and a wiring groove 107. Then, a Ti film 108 is deposited by a physical vapor-phase growth method and then a TiN film 109 by a chemical vapor-phase growth method, and the surface of TiN film 109 is exposed to N2 plasma. Then the surface of the TiN film 109 is exposed to SiH4, to form a TiSiN film 110. After a Cu film 111 is deposited on the surface of a TiSiN film 110 by a physical vapor-phase growth method, a Cu film 112 is deposited on the surface of the Cu film 111 by an electrolytic plating method. Lastly, the metal film on the SiO2 film 195 is removed by a chemical-mechanical polishing method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, a method for manufacturing a semiconductor device, and a device for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art With the increase in the degree of integration of semiconductor devices, the distance between adjacent wiring layers has been reduced, and the increase in capacitance between wiring layers cannot be ignored. When the capacitance between wiring layers increases, the operation speed of the semiconductor device decreases due to wiring delay. In order to prevent this, a technique of forming a low-resistance wiring layer using copper (Cu) has been actively studied in recent years. 25 to 30
A conventional technique of a semiconductor device in which a wiring layer is formed using Cu will be described with reference to FIG.

As shown in FIG. 30, this semiconductor device comprises:
The semiconductor device includes a semiconductor substrate 1, a lower wiring layer 2 formed on the surface of the semiconductor substrate 1, and a silicon dioxide (SiO ₂ ) film 3 deposited on the semiconductor substrate 1 so as to cover the lower wiring layer 2. Tri-silicon tetranitride (Si ₃ N ₄ ) on the SiO ₂ film 3
A film 4 is deposited, and an SiO ₂ film 5 is deposited on the Si ₃ N ₄ film 4. An interlayer insulating film is formed by the SiO ₂ film 3, the Si ₃ N ₄ film 4, and the SiO ₂ film 5.
In this interlayer insulating film, a through hole 6 reaching the lower wiring layer 2 and a groove-shaped concave portion (wiring groove) connected to the through hole 6 are formed.
7 are formed, and a through hole 6 is formed in the wiring groove 7.
Upper wiring layer 13 electrically contacting the lower wiring layer through
Is provided.

The upper wiring layer 13 is made of titanium (Ti) so as to cover the inner side surface and the bottom surface of the through hole 6 and the wiring groove 7.
Film 8 and titanium nitride (TiN) deposited on Ti film 8
A film 9; a Cu film 10 deposited on the TiN film 9;
And a Cu film 11 deposited on the film 10.

A method for manufacturing such a semiconductor device is as follows.

[0006] First, as shown in FIG.
The lower wiring layer 2 is formed thereon. Next, as shown in FIG. 26, after sequentially depositing the SiO ₂ film 3, the Si ₃ N ₄ film 4, and the SiO ₂ film 5, the lithography method and the dry etching method are alternately applied twice, so that the SiO ₂ film 3 is alternately applied. _A through hole 6 is formed inside the _second film 3 and the Si ₃ N ₄ film 4.
A wiring groove 7 is formed inside the O ₂ film 5. Next, as shown in FIG. 27, through holes 6 are formed by dry etching.
Is performed, a Ti film 8 is deposited by a physical vapor deposition method, and a TiN film 9 is subsequently deposited by a chemical vapor deposition method.

Next, as shown in FIG. 28, the surface of the TiN film 9 is exposed to N ₂ plasma to increase the density of the TiN film 9. Thereafter, as shown in FIG. 26, a Cu film 10 is deposited on the surface of the TiN film 9 by a physical vapor deposition method. However, the Cu film 10 is deposited only at the center of the semiconductor substrate 1. The reason will be described later.

After the surfaces of the TiN film 9 and the Cu film 10 are washed with sulfuric acid (H ₂ SO ₄ ), Cu is removed by electrolytic plating.
A Cu film 11 is deposited on the surface of the film 10. Finally, the SiO
By removing the Ti film 8, TiN film 9, Cu film 10, and Cu film 11 on the _two films 5 by a chemical mechanical polishing (CMP) method, a semiconductor device as shown in FIG. 30 is manufactured.

The reason why the deposition of the Cu film 10 is limited to only the central portion of the semiconductor substrate 1 will be described. Generally, the metal layer can be removed only at the center of the semiconductor substrate 1 by chemical mechanical polishing, and the metal layer remains at the peripheral portion of the semiconductor substrate 1 even after polishing. When the Cu film remains in the peripheral portion of the semiconductor substrate 1,
The Cu film peels in subsequent steps, and contaminates the semiconductor device manufacturing apparatus. Therefore, the Cu film is deposited on the semiconductor substrate 1.
A method is widely used in which only the central portion of the semiconductor substrate 1 is restricted so that the Cu film does not remain at the peripheral portion of the semiconductor substrate 1.

[0010]

When a semiconductor device is manufactured by the above method, the following problems occur.

First, the TiN film 9 is formed of a Cu film 10 and a C film.
Since the ability to prevent diffusion of Cu atoms contained in the u film 11 is not sufficient, Cu atoms
There is a problem of reaching the _second film 3 and the SiO ₂ film 5.
Cu atoms reaching the SiO ₂ film 3 and the SiO ₂ film 5
Mobile ions are formed inside the SiO ₂ film 3 and the SiO ₂ film 5 to increase the leak current between the through holes 6 and between the upper wiring layers 13. This causes a malfunction of the semiconductor device.

Further, as shown in FIG. 29, when the Cu film 11 is deposited by the electrolytic plating method, there is a problem that the Cu film 12 is deposited also on the surface of the TiN film 9 adjacent to the Cu film 10. The Cu film 12 has poor adhesion to the underlying TiN film 9 and easily peels off during chemical mechanical polishing, thereby significantly reducing the yield of the semiconductor device.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to manufacture a semiconductor device and a semiconductor device which do not cause malfunction or decrease in yield even when a wiring layer is formed using Cu. It is an object of the present invention to provide a method and an apparatus for manufacturing a semiconductor device.

[0014]

A semiconductor device according to the present invention comprises a substrate, a first conductive film supported by the substrate, and an insulating film formed on the substrate so as to cover the first conductive film. A semiconductor device comprising: a film; a concave portion formed in the insulating film; and a second conductive film formed in the concave portion of the insulating film and in electrical contact with the first conductive film. The second conductor film includes a silicon-containing titanium nitride layer formed inside a concave portion of the insulating film, and a metal film formed on the silicon-containing titanium nitride layer.

Another semiconductor device according to the present invention comprises a substrate,
A first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film, a recess formed in the insulating film, and a recess formed in the insulating film. And a second conductor film electrically connected to the first conductor film, wherein the second conductor film is formed inside a concave portion of the insulating film. A titanium nitride layer, a silicon-containing titanium nitride layer formed on the titanium nitride layer, a silicon-containing metal layer formed on the silicon-containing titanium nitride layer, and a metal film formed on the silicon-containing metal layer And

Still another semiconductor device according to the present invention includes a substrate, a first conductive film supported on the substrate, an insulating film formed on the substrate so as to cover the first conductive film,
A semiconductor device comprising: a concave portion formed in the insulating film; and a second conductor film formed in the concave portion of the insulating film and electrically contacting the first conductor film. The conductor film includes a titanium nitride layer formed inside a recess of the insulating film, a silicon-containing titanium nitride layer formed on the titanium nitride layer, and a metal layer formed on the silicon-containing titanium nitride layer. And

Still another semiconductor device according to the present invention includes a substrate, a first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film,
A semiconductor device comprising: a concave portion formed in the insulating film; and a second conductor film formed in the concave portion of the insulating film and electrically contacting the first conductor film. The conductor film includes a titanium nitride layer formed inside the concave portion of the insulating film, a silicon-containing titanium nitride layer formed on the titanium nitride layer, and a silicon-containing titanium nitride layer formed on the silicon-containing titanium nitride layer. A metal layer, and a metal film formed on the silicon-containing metal layer.

Still another semiconductor device according to the present invention includes a substrate, a first conductive film supported on the substrate, an insulating film formed on the substrate to cover the first conductive film,
A semiconductor device comprising: a concave portion formed in the insulating film; and a second conductor film formed in the concave portion of the insulating film and electrically contacting the first conductor film. A conductor film, a titanium layer formed inside the concave portion of the insulating film, a titanium nitride layer formed on the titanium layer, a silicon-containing titanium nitride layer formed on the titanium nitride layer, A silicon-containing metal layer formed on the silicon-containing titanium nitride layer; and a metal film formed on the silicon-containing metal layer.

In a preferred embodiment, the thickness of a portion of the silicon-containing titanium nitride layer formed on the bottom surface of the concave portion of the insulating film is equal to the inner wall of the concave portion of the insulating film of the silicon-containing titanium nitride layer. It is smaller than the thickness of the portion formed thereon.

In a preferred embodiment, the resistance of a portion of the silicon-containing titanium nitride layer formed on the bottom surface of the concave portion of the insulating film is equal to the resistance of an inner wall of the concave portion of the insulating film of the silicon-containing titanium nitride layer. Is smaller than the resistance of the portion formed at the bottom.

[0021] In a preferred embodiment, the metal layer is formed of copper.

In a preferred embodiment, the concentration of silicon contained in the silicon-containing titanium nitride layer is 5 atomic% or more.

In a preferred embodiment, a thickness of a portion of the silicon-containing titanium nitride layer formed on the inner wall of the concave portion of the insulating film is 1 nm or more and 50 nm or less.

In a preferred embodiment, the concave portion of the insulating film includes a through hole reaching the first conductive film, and a wiring groove connected to the through hole.

According to the method for manufacturing a semiconductor device of the present invention, a step of forming a first conductor film on a substrate, a step of depositing an insulating film covering the first conductor film on the substrate, Forming a concave portion reaching the first conductive film in the insulating film, and forming a second conductive film inside the concave portion of the insulating film, The step of forming the second conductor film includes: depositing a silicon-containing titanium nitride layer covering an inner wall and a bottom surface of a concave portion of the insulating film by a chemical vapor deposition method;
A step of irradiating the surface of the silicon-containing titanium nitride layer with ions; and a step of depositing a metal layer on the surface of the silicon-containing titanium nitride layer.

Another method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming a first conductive film on a substrate;
Depositing an insulating film covering the conductor film on the substrate;
A method of manufacturing a semiconductor device, comprising: a step of forming a recess in the insulating film at least partially reaching the first conductor film; and a step of forming a second conductor film inside the recess of the insulating film. The step of forming the second conductor film includes:
Depositing a titanium layer covering the inner side wall and the bottom surface of the concave portion of the insulating film; depositing a silicon-containing titanium nitride layer on the surface of the titanium layer by a chemical vapor deposition method; Irradiating the surface with the ions, and depositing a metal layer on the surface of the silicon-containing titanium nitride layer.

[0027] In a preferred embodiment, the step of irradiating the ions includes a step of exposing the surface of the silicon-containing titanium nitride layer to plasma.

In the step of depositing the silicon-containing titanium nitride layer, any of tetrakisdimethyltitanium, tetrakisdiethyltitanium, and tetrakisethylmethyltitanium can be used as a material.

In the step of depositing the silicon-containing titanium nitride layer, any one of silane, disilane, and trisilane can be used as a material.

In the step of exposing the surface of the silicon titanium nitride layer to plasma, any one of nitrogen, ammonia, and hydrazine can be used.

In a preferred embodiment, the step of depositing the silicon-containing titanium nitride layer sets the thickness of the silicon-containing titanium nitride layer to 1 nm or more and 50 nm or less.

Another method of manufacturing a semiconductor device according to the present invention comprises a step of forming a first conductive film on a substrate,
Depositing an insulating film covering the conductor film on the substrate;
A method of manufacturing a semiconductor device, comprising: a step of forming a recess in the insulating film at least partially reaching the first conductor film; and a step of forming a second conductor film inside the recess of the insulating film. The step of forming the second conductor film includes:
Depositing a titanium nitride layer covering the inner side wall and bottom surface of the concave portion of the insulating film by a chemical vapor deposition method, irradiating ions to the surface of the titanium nitride layer, and removing the surface of the titanium nitride layer with silicon. Forming a silicon-containing titanium nitride layer by exposing to a compound; and depositing a metal layer on the silicon-containing titanium nitride layer.

According to still another method of manufacturing a semiconductor device according to the present invention, a step of forming a first conductive film on a substrate, a step of depositing an insulating film covering the first conductive film on the substrate, A method of manufacturing a semiconductor device, comprising: a step of forming a recess in the insulating film at least partially reaching the first conductor film; and a step of forming a second conductor film inside the recess of the insulating film. The step of forming the second conductor film includes the steps of: depositing a titanium nitride layer covering inner walls and a bottom surface of the concave portion of the insulating film by a chemical vapor deposition method; A step of irradiating ions, a step of forming a silicon-containing titanium nitride layer by exposing the surface of the titanium nitride layer to a silicon compound, and a step of exposing the surface of the silicon-containing titanium nitride layer to a silicon compound. And forming a silicon layer, and depositing a metal layer on the surface of the silicon layer.

According to still another method of manufacturing a semiconductor device according to the present invention, a step of forming a first conductive film on a substrate, a step of depositing an insulating film covering the first conductive film on the substrate, A method of manufacturing a semiconductor device, comprising: a step of forming a recess in the insulating film at least partially reaching the first conductor film; and a step of forming a second conductor film inside the recess of the insulating film. The step of forming the second conductor film includes the steps of: depositing a titanium layer covering an inner wall and a bottom surface of a concave portion of the insulating film; and forming a titanium nitride layer on the surface of the titanium layer by chemical vapor deposition. Depositing by a method, irradiating ions to the surface of the titanium nitride layer, forming a silicon-containing titanium nitride layer by exposing the surface of the titanium nitride layer to a silicon compound, Chita And forming a silicon layer by exposing the silicon compound on the surface of the layer, and depositing a metal layer on the surface of the silicon layer.

[0035] In a preferred embodiment, the step of irradiating the ions includes a step of exposing the surface of the titanium nitride layer to plasma.

In the step of depositing the titanium nitride layer, any of tetrakisdimethyltitanium, tetrakisdiethyltitanium, and tetrakisethylmethyltitanium can be used as a material.

In the step of forming the silicon-containing titanium nitride layer, silane, disilane,
And any of trisilane can be used as the material.

In the step of exposing the titanium nitride layer to plasma, any one of nitrogen, ammonia, and hydrazine can be used as a material.

In a preferred embodiment, in the step of forming a silicon layer by exposing the surface of the silicon-containing titanium nitride layer to a silicon compound, the surface of the silicon-containing titanium nitride layer is heated to 300 ° C. or more; The time for exposing the surface of the silicon-containing titanium nitride layer to the silicon compound is set to 15 seconds or more.

[0040] In a preferred embodiment, the step of depositing the titanium nitride includes the step of setting the thickness of the titanium nitride layer to 1 n.
m and 50 nm or less.

In a preferred embodiment, the step of depositing the metal layer includes the steps of: depositing a first metal layer on a predetermined region of the silicon-containing titanium nitride layer by a vapor deposition method; Depositing a second metal layer on the layer by plating.

[0042] In a preferred embodiment, the second metal layer is copper.

The apparatus for manufacturing a semiconductor device according to the present invention comprises a vacuum chamber, a susceptor installed inside the vacuum chamber, a heating mechanism installed inside the susceptor, and an interior installed inside the vacuum chamber. An exhaust port, an introduction port installed inside the vacuum chamber, a chemical vapor deposition chamber having an electrode installed inside the vacuum chamber, and a power supply connected to the susceptor and the electrode. Comprising, an organic compound containing titanium from the inlet,
This can be done by introducing nitrogen compounds, and silicon compounds.

In a preferred embodiment, the organic compound containing titanium and the silicon compound can be simultaneously introduced into the vacuum chamber.

In a preferred embodiment, any of tetrakisdimethyltitanium, tetrakisdiethyltitanium, and tetrakisethylmethyltitanium can be used as the organic compound containing titanium.

In a preferred embodiment, any one of nitrogen, ammonia, and hydrazine can be used as the nitrogen compound.

In a preferred embodiment, any of silane, disilane, and trisilane can be used as the silicon compound.

[0048] In a preferred embodiment, a titanium deposition chamber connected to the chemical vapor deposition chamber is provided, and the chemical vapor deposition chamber and the titanium deposition chamber are connected by a reduced-pressure transport chamber. I have.

In a preferred embodiment, there is provided a copper deposition chamber connected to the chemical vapor deposition chamber, and the chemical vapor deposition chamber and the copper deposition chamber are connected by a reduced pressure transport chamber. I have.

In a preferred embodiment, there is provided a titanium deposition chamber and a copper deposition chamber connected to the chemical vapor deposition chamber, wherein the chemical vapor deposition chamber, the titanium deposition chamber and the copper deposition chamber are provided. Are connected by a reduced-pressure transfer chamber.

[0051]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) Referring to FIGS.
A first embodiment of the present invention will be described.

As shown in FIG. 7, the semiconductor device according to the present embodiment is formed on a semiconductor substrate (single-crystal silicon substrate) 101 on which integrated circuit elements such as transistors (not shown) are formed, and on the surface of the semiconductor substrate 101. Lower wiring layer (first conductive film) 102 and silicon dioxide (SiO ₂ ) deposited on semiconductor substrate 101 so as to cover lower wiring layer 102.
And a film 103. In the present specification, the “semiconductor substrate 101” is a single crystal silicon substrate, an integrated circuit element such as a transistor formed on the surface thereof, and an insulating film formed on the surface of the single crystal silicon substrate so as to cover the integrated circuit element. It expresses the structure consisting of etc. collectively. The lower wiring layer 102 is formed using a conductive material such as tungsten (W), aluminum (Al), and copper (Cu).

[0054] A four nitriding three silicon on the SiO ₂ film 103 (Si ₃ N ₄₎ film 104 is deposited, Si ₃ N ₄ film 1
_{On the} substrate 04, an SiO ₂ film 5 is deposited. SiO ₂ film 1
03, an interlayer insulating film is formed by the Si ₃ N ₄ film 104 and the SiO ₂ film 105. In this interlayer insulating film,
A concave portion is formed on the surface. The recess is formed in the lower wiring layer 10.
2 and the through hole 106
And an upper wiring layer 113 electrically connected to the lower wiring layer 102 through the through hole 106 in the wiring groove 107.
Is provided. The width of the wiring groove 107 is, for example, about 1
100 to 2000 nm, and the depth is, for example, about 100 to 1
000 nm. In the present embodiment, the inner diameter of the through hole 106 is set equal to the groove width of the wiring groove 107. The plurality of through holes 106 are, for example, 0.1 to
It is formed in each wiring groove 107 at intervals of about 2 μm.

The upper wiring layer 113 is formed in the through hole 106.
And a titanium (Ti) film 108, a titanium nitride (TiN) film 109 deposited on the Ti film 108, and silicon (Si) formed on the TiN film 109 so as to cover the inner side surface and the bottom surface of the wiring groove 107. Containing TiN (TiSiN)
Film 110, Cu deposited on the surface of TiSiN film 110
And a Cu film 112 deposited on the Cu film 111.

The TiN film 109 includes a vertical portion (a portion formed on a surface substantially perpendicular to the semiconductor substrate 101) 109 a formed on the inner side wall of the through hole 106 and the wiring groove 107, Wiring groove 10
And a horizontal portion (portion formed on a plane substantially parallel to the semiconductor substrate 101) 109b formed on the bottom surface of the semiconductor device 101 as necessary. Similarly, the TiSiN film 110 is also
A vertical portion (a portion formed on a surface substantially perpendicular to the semiconductor substrate 101) 110a formed on the inner wall of the through hole 106 and the wiring groove 107;
6 and a horizontal portion (portion formed on a plane substantially parallel to the semiconductor substrate 101) 110b formed on the bottom surface of the wiring groove 107, if necessary.

Note that the lower wiring layer is not limited to the first-level wiring, but may be at the i-th level (i is an integer of 1 ≦ i <N) of the N-level wiring (N is an integer of 3 or more). I just want it. At this time, the upper wiring is at the j-th layer level (j is i <j ≦
(An integer of N).

With the above configuration, the leak current between the through holes 106 and between the upper wiring layers 113 can be reduced as compared with the prior art. The reason is as follows.

In this embodiment, the side of the wiring groove 107
The wall is covered with a TiSiN film 110. Ti
Si contained in the SiN film has a bonding form of Si-N.
I am taking. The reactivity between Si-N bond and Cu atom is extremely
Therefore, the TiSiN film containing the Si—N bond is made of TiN
The ability to prevent the diffusion of Cu atoms is higher than that of the film. So
For forming the Cu film 111 and the Cu film 112
u atom is SiO_TwoFilm 103 and SiO_TwoReach the membrane 105
It is difficult to_TwoFilm 103 and SiO _TwoMembrane 105
Does not increase the concentration of Cu atoms contained in
Leakage current between the wiring 106 and the upper wiring layer 113.
The flow can be reduced compared to the prior art.

Here, the concentration of Si contained in the TiSiN film 110a will be described. When the concentration of Si contained in the TiSiN film 110a becomes smaller than 5 atomic%, Cu
The performance of preventing diffusion of Cu atoms supplied from the film 111 is reduced, and the space between the through holes 106 and the upper wiring layer 1 is reduced.
13 increases. For the above reasons, T
The concentration of Si contained in the iSiN film 110a is 5 atomic%.
It is desirable to set above.

Next, the thickness of the TiSiN film 110a will be described. When the thickness of the TiSiN film 110a is smaller than 1 nm, the performance of preventing the diffusion of Cu atoms supplied from the Cu film 111 decreases, and the leakage current between the through holes 106 and between the upper wiring layers 113 increases.
On the other hand, when the thickness of the TiSiN film 110a is larger than 50 nm, the ratio of the cross-sectional area of the upper wiring layer 113 to the cross-sectional area of the Cu film 111 and the Cu film 112 decreases, so that the wiring resistance of the upper wiring layer 113 increases. Thus, the operation speed of the semiconductor device is reduced. For the above reasons, TiSiN
It is desirable that the thickness of the film 110a be set to 1 nm or more and 50 nm or less.

Next, the thickness of the TiSiN film 110b will be described. The resistivity of the TiSiN film (3000 μΩcm
Is higher than the resistivity (about 200 μΩcm) of the TiN film. Therefore, if the thickness of the TiSiN film 110b is too large, the lower wiring layer 102 and the upper wiring layer 113
, The connection resistance increases, and the operating speed of the semiconductor device decreases. For the above reasons, it is desirable that the thickness of the TiSiN film 110b be smaller than the thickness of the TiSiN film 110a.

The method of manufacturing the semiconductor device according to the present embodiment is as follows.

First, as shown in FIG. 1, a semiconductor substrate 10 on which integrated circuit elements such as transistors (not shown) are formed.
1 is prepared, and a lower wiring layer 102 is formed on a semiconductor substrate 101. The lower wiring layer 102 is formed, for example, by depositing an Al film on the surface of the semiconductor substrate 101 by a sputtering method, and then processing it into a predetermined shape by a lithography method and a dry etching method.

Next, as shown in FIG.
SiO 2 by the chemical vapor deposition method of the formula _TwoFilm (thickness: about 10
0 to 2000 nm) 103, Si_ThreeN_FourFilm (thickness: about 5
50 nm) 104, SiO_TwoFilm (thickness: about 100 to 10
Lithography after sequentially depositing
Method and dry etching method are alternately applied twice each
By using SiO_TwoFilm 103 and Si_ThreeN_FourMembrane 10
4 is formed with a through hole 106_TwoOf membrane 105
A wiring groove 107 is formed inside.

Next, as shown in FIG.
r) or a dry etching method using hydrogen (H ₂ ) or the like to clean the bottom surface of the through hole 106, and then a Ti film (thickness: about 0.
5 to 10 nm) 108, and then a 20 nm thick TiN film 109 is deposited by a chemical vapor deposition method. The deposition of the TiN film 109 by the chemical vapor deposition method is performed as follows. The semiconductor substrate 101 on which the Ti film 108 has been deposited is heated to 350 ° C. in a vacuum chamber. When the semiconductor substrate 101 reaches a steady temperature, tetrakisdimethyltitanium (TDMAT) diluted with helium (He) is introduced into the vacuum chamber. At this time, the introduction amount of TDMAT is adjusted so that the partial pressure of TDMAT inside the vacuum chamber becomes 3 Pa. TDM introduced
AT causes a thermal decomposition reaction on the surface of the Ti film 108,
An N film 109 is deposited.

Next, as shown in FIG.
Is exposed to a nitrogen (N ₂ ) plasma. The plasma contains cations such as N ₂ ions.
The plasma generation conditions are adjusted so that these cations are accelerated vertically toward the semiconductor substrate 101. Thus, the TiN film 109b deposited on the plane parallel to the semiconductor substrate 101 is densified because of the impact of cations, and its density is improved. On the other hand, a TiN film 109 deposited on a surface substantially perpendicular to the semiconductor substrate 101
Since a does not receive cation impact, its density does not improve. The plasma exposure is performed, for example, by using a parallel plate type plasma generator or the like, setting the pressure of N ₂ gas in the chamber at about 10 to 1000 Pa, and
Plasma generated by applying a power of 000 W can be used.

Next, as shown in FIG.
Is exposed to silane (SiH ₄ ). This processing is performed on the semiconductor substrate 101 that has been exposed to the N ₂ plasma.
Is heated in a vacuum chamber, and Si
This is done by introducing H ₄ . At this time, the introduction amount of SiH ₄ is adjusted so that the partial pressure of SiH ₄ in the vacuum chamber becomes 3 Pa. As a result, a TiSiN film 110a is formed on the surface of the TiN film 109a, and a TiSiN film 110b is formed on the surface of the TiN film 109b. As described later in detail, the thickness of the TiSiN film 110b is Ti
It becomes smaller than the thickness of the SiN film 110a.

Next, as shown in FIG.
A Cu film (thickness: about 5-200 nm) 111 is deposited on the surface of the substrate 10 by a physical vapor deposition method. However, Cu film 1
11 is deposited only at the center of the semiconductor substrate 101. C
After the u film 111 is deposited, the surfaces of the TiSiN film 110b and the Cu film 111 are washed with sulfuric acid (H ₂ SO ₄ ), and then the Cu film (film thickness: about 100 to (1000 nm) 112 is deposited.
At this time, the Cu film does not grow on the surface of the TiSiN film 110b. The reason will be described later in detail.

Finally, the Ti film 10 on the SiO ₂ film 105
8, TiN film 109, TiSiN film 110b, Cu film 1
By removing the Cu film 11 and the Cu film 112 by a chemical mechanical polishing method, the semiconductor device shown in FIG. 7 is manufactured.
Thereafter, a process for forming a further upper layer wiring is appropriately performed.

Next, the TiN film 109 is exposed by SiH ₄ exposure.
The reaction for forming the TiSiN film 110a on the surface of a will be described.

FIGS. 8, 9 (a) and 9 (b) and FIGS. 10 (a) and 10 (b) show the results of analysis of this reaction by X-ray photoelectron spectroscopy (XPS). FIG. 8 shows the concentration of Si atoms contained in the TiN film 109a as a function of the depth from the surface. As is clear from FIG. 8, when exposure to SiH ₄ is performed, the TiN film 109a contains a large amount of Si. It is difficult to define the thickness because the concentration of Si atoms continuously changes, but for convenience, the portion where the Si concentration is 5 atomic% or more is
If it is referred to as a SiN film, a 10 nm-thick TiSiN film 110a is formed by exposure to SiH4.

FIGS. 9 (a) and 9 (b) show Ti formed by exposure to SiH ₄ , respectively.
The spectrum (Ti2p) of the Ti atom XPS contained in the SiN film 110a and the TiN film 109a that has not been exposed to SiH ₄ is shown. FIG. 10 (a) and FIG.
0 (b), respectively, TiSiN film 110a is formed by receiving SiH ₄ exposure, and SiH ₄
The spectrum (Si2p) of the Si atom XPS contained in the unexposed TiN film 109a is shown.

As is apparent from FIG.
₄ The presence of Si-N bonds is recognized on the surface and inside of the TiSiN film 110a formed by the exposure. Si
In the case without H ₄ exposure, no Si—N bond was observed (FIG. 10B). Since the Si—N bond has lower reactivity to Cu than the Ti—N bond, the ability of the TiSiN film containing the Si—N bond to prevent the diffusion of Cu atoms is improved as compared to the TiN film. 10 (a) and 10 (b) that the Ti—O bond is reduced by exposure to SiH ₄ .

A similar reaction occurs on the surface of the TiN film 109b. FIGS. 11, 12 (a) and 12 (b) and FIG. 13 (a)
And (b). FIG. 11 shows T exposed to SiH ₄ .
The graph shows the concentration of Si atoms contained in the iN film 109b as a function of the depth from the surface. As is clear from FIG. 11, when the SiH ₄ exposure was performed, TiN
The film 109b contains a large amount of Si. However, the difference from the case of the TiN film 109a is that
The point is that the concentration of atoms drops sharply with depth from the surface. According to the definition already mentioned, Si
The thickness of the TiSiN film 110b formed by exposure to H ₄ is 4 nm, which is 4 nm larger than that of the TiN film 109a.
The value is 0%. This is because the density of the TiN film 109b has been increased by exposure to N ₂ plasma.

FIGS. 12 (a) and 12 (b) show the T formed by exposure to SiH ₄ , respectively.
The spectrum (Ti2p) of the Ti atom XPS contained in the iSiN film 110b and the TiN film 109b which has not been exposed to SiH ₄ is shown. FIGS. 13 (a) and 13 (b) show a TiSiN film 110b and a SiH 4 film formed by exposure to SiH ₄ , respectively.
₄ does not receive exposure Si contained in the TiN film 109b
3 shows an atomic XPS spectrum (Si2p).

As is clear from FIG. 12B, the SiH
_{4 On} the surface of the TiN film 109b not exposed,
The -O bond is the dominant bond. This is because titanium oxide (TiO ₂ ) is formed on the surface of the TiN film 109b by a reaction with oxygen in the atmosphere. On the other hand, Si
On the surface of the TiSiN film 110b formed by exposure to H ₄ , Si—N bonds are dominant bonds (FIG. 1).
3 (a)), the presence of a Ti-N bond is also observed.

Next, at the time of electrolytic plating, the TiSiN film 11
The reason why the Cu film does not grow on the surface of 0b will be described.

As shown in FIG. 12B, SiH_Fourexposure
The surface of the TiN film 109b that has not received_TwoBut
Is formed. However, this TiO_TwoIs an electrolytic
H to do in front of the jack_TwoSO_FourCompletely removed by washing
Therefore, during electrolytic plating, TiN and plating solution come into contact.
Will be. TiN is a good electronic conductor and
To easily donate electrons to Cu ions contained in liquid
As a result, on the surface of the TiN film 109b,
Abnormal growth of the Cu film occurs. On the other hand, SiH_FourBy exposure
On the surface of the formed TiSiN film 110b, Si-N
The bond is the dominant bond. Si_ThreeN_FourIs H_TwoSO_Four
As is clear from the fact that it is insoluble in_Two
SO_FourTiSiN film due to extremely low reactivity to
110b is H _TwoSO_FourIt is not removed by washing.
The Si—N bond is a so-called covalent bond,
The valence electrons that form are tightly bound by the inner core,
These valence electrons do not participate in the Cu ion reduction reaction.
No. That is, from the surface of the TiSiN film 110b,
Donating electrons to Cu ions contained in the plating solution
Since it cannot be performed, abnormal growth of the Cu film does not occur.

Here, when depositing the TiN film 109, the T
The thickness of the iN film 109 will be described. TiN film 109
Is less than 1 nm, the TiSiN film 110 having a sufficient thickness is not formed even when exposed to SiH ₄ , so that the performance of preventing the diffusion of Cu atoms is reduced. The leakage current between the layers 113 increases. On the other hand, the thickness of the TiN film 109 is 50 nm.
As described above, the sectional area of the upper wiring layer 113 is changed to the Cu film 11.
Since the ratio occupied by the cross-sectional areas of the first and Cu films 112 decreases, the wiring resistance of the upper wiring layer 113 increases, and the operating speed of the semiconductor device decreases. For the above reasons, TiN
The thickness of the TiN film 109 when depositing the film 109 is 1 n
It is desirable to set it to be at least m and at most 50 nm.

Next, a method of setting the temperature of the semiconductor substrate 101 when forming the TiSiN film 110 will be described. When the temperature of the semiconductor substrate 101 is lower than 300 ° C., the reaction speed for forming the TiSiN film 110 from the TiN film 109 and SiH ₄ is reduced, so that the time required for forming the TiSiN film 110 is significantly increased. On the other hand, the semiconductor substrate 1
01 is higher than 500 ° C., the lower wiring layer 1
02, the SiO ₂ film 103 and the SiO ₂ film 105 are deteriorated. For the above reasons, the TiSiN film 110
It is desirable to set the temperature of the semiconductor substrate 101 when forming the semiconductor substrate to 300 ° C. or more and 500 ° C. or less.

Next, a method of setting the partial pressure of SiH ₄ when forming the TiSiN film 110 will be described. When the partial pressure of SiH ₄ becomes lower than 1 Pa, the TiN film 109 and SiH
_Since the rate of the reaction for forming the TiSiN film 110 is reduced from _{4, the} time required for forming the TiSiN film 110 is significantly increased. For the above reasons, the TiSiN film 11
It is desirable that the partial pressure of SiH ₄ when forming 0 is set to 1 Pa or more.

Hereinafter, an apparatus used for manufacturing the semiconductor device will be described with reference to FIG. The apparatus includes a vacuum chamber 114, a susceptor 115 installed inside the vacuum chamber 114, a heating mechanism 116 installed inside the susceptor 115, an exhaust port 117 installed in the vacuum chamber 114, and a vacuum chamber 114. T installed
DMAT inlet 118, N ₂ inlet 119 installed in vacuum chamber 114, SiH ₄ inlet 120 installed in vacuum chamber 114, upper electrode installed inside vacuum chamber 114 to face susceptor 115 121 and a high-frequency power supply 122 connected to the septum 115 and the upper electrode 121.

The operation of the semiconductor device manufacturing apparatus is as follows.

First, the inside of the vacuum chamber 114 is opened to the atmosphere.
The semiconductor substrate 101 on which the Ti film 108 has been deposited is released.
After being placed on the susceptor 115, the exhaust
Then, the inside of the vacuum chamber 114 is evacuated. Exhaust is complete
Then, the heating mechanism 116 is operated, and the susceptor 115 is
Then, the semiconductor substrate 101 is heated. Semiconductor substrate 101
Heating mechanism 1 so that the steady temperature of
Adjust the 16 outputs. The temperature of the semiconductor substrate 101 is steady
When the temperature is reached, use He from the TDMAT inlet 118
Introduce the diluted TDMAT. Thereby, the Ti film 10
8 caused a thermal decomposition reaction on the surface of TiN film
109 is deposited. After a predetermined time, TDM
Stop introduction of TDMAT from AT inlet 118,
N _TwoN from inlet 119_TwoOf the vacuum chamber 114
Introduce inside. The amount of N2 inside the vacuum chamber 114
When the pressure is stabilized, the susceptor 115 is
And power to the upper electrode 121, and the vacuum chamber 1
N inside 14_TwoGenerates plasma. This allows
TiN film deposited on a plane parallel to semiconductor substrate 101
109a has a high density due to the impact of cations.
Is improved. After a predetermined time has elapsed, the high-frequency power supply 12
Stop 2 and N_TwoN from inlet 119_TwoStop introducing
I do. Next, SiH_FourSiH from inlet 120_FourIntroduce
You. Thereby, the TiSiN film 1 is formed on the surface of the TiN film 109.
10 are formed. Finally, the operation of the heating mechanism 116 is stopped.
And after opening the vacuum chamber 114 to the atmosphere,
The body substrate 101 is discharged.

(Second Embodiment) A second embodiment of the semiconductor device according to the present invention will be described with reference to FIGS. 15 to 20, the same components as those shown in FIGS. 1 to 7 are denoted by the same reference numerals, and detailed description of the components will be omitted.

As shown in FIG. 20, the present semiconductor device includes a semiconductor substrate 101 on which an integrated circuit element such as a transistor (not shown) is formed, a lower wiring layer 102 formed on the surface of the semiconductor substrate 101, SiO ₂ film 10 deposited on semiconductor substrate 101 so as to cover wiring layer 102
3 is provided.

The Si ₃ N ₄ film 104 is formed on the SiO ₂ film 103.
Is deposited, and a SiO ₂ film 5 is deposited on the Si ₃ N ₄ film 104. SiO ₂ film 103, Si ₃ N ₄ film 1
04 and the SiO ₂ film 105 form an interlayer insulating film. In this interlayer insulating film, a through hole 106 reaching the lower wiring layer 102 and a wiring groove 107 connected to the through hole 106 are formed.
Inside, an upper wiring layer 113 which is in electrical contact with the lower wiring layer 102 via the through hole 106 is provided.
The upper wiring layer 113 includes a titanium (Ti) film 108 covering the inner side surface and the bottom surface of the through hole 106 and the wiring groove 107, and the TiSiN film 1 deposited on the Ti film 108.
23 and the Cu film 1 deposited on the TiSiN film 123
11 and a Cu film 112 deposited on the Cu film 111.

The TiSiN film 123 is formed in the through hole 10
6 and a vertical portion (a portion formed on a surface substantially perpendicular to the semiconductor substrate 101) 123a formed on the inner wall of the wiring groove 107, a through hole 106 and a wiring groove 1
07 (the semiconductor substrate 101)
A portion 123b formed on a plane substantially parallel to
Distinguish as necessary.

The structure of this embodiment differs from the structure of the first embodiment in that no TiN film is interposed between the Ti film 108 and the TiSiN film 123, as shown in FIG. . As already mentioned, the TiSiN film is
Since the ability to prevent the diffusion of Cu atoms is higher than that of the iN film, the configuration according to the present embodiment reduces the leakage current between the through holes 106 and between the upper wiring layers 113 according to the first embodiment. It is possible to further reduce the case. Note that, as in the case of the present embodiment, Ti
Even when the TiN film is not interposed between the film 108 and the TiSiN film 123, as described in the first embodiment,
It is desirable that the concentration of Si contained in the TiSiN film 123a be set to 5 atomic% or more. Also, the TiSiN film 1
The thickness of 23a is desirably set to 1 nm or more and 50 nm or less. Further, it is desirable that the thickness of the TiSiN film 123b be set smaller than the thickness of the TiSiN film 123a.

Hereinafter, a method for manufacturing the semiconductor device will be described with reference to the drawings.

First, as shown in FIG.
The lower wiring layer 102 is formed on the surface of the substrate 01. Next, FIG.
As shown in FIG. 6, the SiO ₂ film (film thickness: about 100 to 200)
0 nm) 103, Si ₃ N ₄ film (film thickness: about 5 to 50 nm)
104, SiO ₂ film (thickness: about 100 to 1000 nm)
After sequentially depositing 105, a lithography method and a dry etching method are alternately applied twice each so that a through hole 106 is formed inside the SiO ₂ film 103 and the Si ₃ N ₄ film 104, and a through hole 106 is formed inside the SiO ₂ film 105. The wiring groove 107 is formed. Next, as shown in FIG. 17, after cleaning the bottom of the through hole 106 by dry etching, a Ti film (thickness: about 0.5 to 10 nm) 108 is formed by physical vapor deposition. Subsequently, a TiSiN film (thickness: about 1 to 50 nm) 1 is formed by a chemical vapor deposition method.
23 is deposited.

TiSiN film 12 by chemical vapor deposition
The deposition method 3 is performed as follows. Ti film 108
Is heated to 350 ° C. in a vacuum chamber. When the semiconductor substrate 101 reaches a steady temperature, TDM diluted with He is placed in the vacuum chamber.
AT and SiH ₄ are introduced simultaneously. At this time, TD
The introduction amounts of TDMAT and SiH ₄ are adjusted so that the partial pressure of MAT is 6 Pa and the partial pressure of SiH 4 is 1 Pa. The introduced TDMAT is Si on the surface of the Ti film 108.
Reacting with H ₄ , the TiSiN film 123 is deposited. In the present embodiment, the thickness of the TiSiN film 123 to be deposited is set to 20
nm.

Next, as shown in FIG. 18, the surface of the TiSiN film 123 is exposed to N ₂ plasma. At this time, TiSiN deposited on a plane parallel to the semiconductor substrate 101 is used.
The density of the film 123b is improved in order to effectively receive cation bombardment. On the other hand, the density of the TiSiN film 123a deposited on a plane perpendicular to the semiconductor substrate 101 does not change because it hardly receives the impact of cations. Exposure to N ₂ plasma is TiSiN film 123a
And the effect on the TiSiN film 123b,
This will be described later in detail.

Next, as shown in FIG. 19, a Cu film (film thickness:
(About 5 to 200 nm) 111 is deposited. However, the Cu film 111 is deposited only at the center of the semiconductor substrate 101.
After depositing the Cu film 111, the Cu film 111 and Ti
After cleaning the surface of the SiN film 123b with H ₂ SO ₄ , a Cu film (thickness: about 100 to 1000 n) is formed by electrolytic plating.
m) Deposit 112. At this time, the TiSiN film 123b
No Cu film grows on the surface. Finally, the SiO ₂ film 1
By removing the Ti film 108, the TiN film 109, the TiSiN film 123, the Cu film 111, and the Cu film 112 on the substrate 05 by a chemical mechanical polishing method, a semiconductor device as shown in FIG. 20 is realized.

Here, Ti after exposure to N ₂ plasma
FIG. 21 shows the results of measuring the thicknesses of the SiN film 123a and the TiSiN film 123b with a transmission electron microscope (TEM). As is clear from FIG. 21, the TiSiN film 123b
Is smaller than the thickness of the TiSiN film 123a. This is because bombarded cation TiSiN film 123b is by exposure to N ₂ plasma, because its density is improved.

Next, the TiSiN film 123a and the TiS
FIGS. 22 (a) and 23 (b) show the results of XPS analysis of the composition and chemical structure of the iN film 123b.
(A) and (b). FIG. 22 (a) and (b)
Are TiSiN film 123a and TiSiN, respectively.
XPS spectrum of Ti atoms contained in the film 123b (T
i2p) was measured. FIGS. 23A and 23B show the TiSiN film 123a and the TiSiN film 123a, respectively.
The XPS spectrum (Si2p) of Si atoms contained in the SiN film 123b was measured. As is clear from FIGS. 23A and 23B, the TiSiN film 123a
And Si contained in the TiSiN film 123b is Si-N
It is in the form of a bond. Therefore, the TiSiN film 123a can effectively prevent the diffusion of Cu atoms. Further, on the surface of the TiSiN film 123b, Si-N
Since the bonding is dominant, the TiSiN film 123b
No abnormal growth of the Cu film occurs on the surface.

FIG. 24 shows the TiSiN film 123a and the TiSiN film 123a.
This is a graph showing the concentration of Si atoms contained in the SiN film 123b as a function of the depth from the surface. As is clear from FIG. 24, the TiSiN film 123a, the TiSiN film 1
23b both contain a large amount of Si on the surface and inside. The concentration of Si contained in the TiSiN film 123a is higher than the concentration of Si contained in the TiSiN film 123a in the first embodiment. Therefore, when the semiconductor device is manufactured by the method as in the present embodiment, the through hole 1
06 and between the upper wiring layer 113
It is possible to further reduce than in the case of the first embodiment.

Here, a method of setting the temperature of the semiconductor substrate 101 when depositing the TiSiN film 123 will be described. When the temperature of the semiconductor substrate 101 is lower than 250 ° C., the reaction time between TDMAT and SiH ₄ is reduced, so that the time required for depositing the TiSiN film 123 is significantly increased. On the other hand, when the temperature of the semiconductor substrate 101 is higher than 450 ° C., the thermal decomposition reaction of TDMAT shifts to a so-called supply-controlled state, so that the step coverage of the TiN film 109 decreases. For the above reasons, the temperature of the semiconductor substrate 101 when depositing the TiSiN film 123 is desirably set to 250 ° C. or higher and 450 ° C. or lower.

Next, a method of setting the partial pressures of TDMAT and SiH ₄ when forming the TiSiN film 123 will be described. The partial pressure of TDMAT is higher than 3 Pa
If the partial pressure of No. 4 is lower than 0.5 Pa, the reaction speed for forming the TiSiN film 123 from TDMAT and SiH ₄ is reduced, so that the time required for forming the TiSiN film 123 is significantly increased. For the above reasons, TiSi
When forming the N film 123, the partial pressure of TDMAT is preferably set to 3 Pa or more, and the partial pressure of SiH ₄ is set to 0.5 Pa or more.

Next, a method of setting the thickness of the TiSiN film 123 when depositing the TiSiN film 123 will be described. When the thickness of the TiSiN film 123 becomes 1 nm or less,
The thickness of the TiSiN film 123a after being exposed to the N ₂ plasma becomes insufficient, and the performance of preventing the diffusion of Cu atoms decreases, so that the leakage current between the through holes 106 and between the upper wiring layers 113 increases. . On the other hand, TiSiN
When the thickness of the film 123 becomes 50 nm or more, the upper wiring layer 1
Since the ratio of the cross-sectional area of the cross-sectional area 13 to the cross-sectional area of the Cu film 111 and the Cu film 112 decreases, the wiring resistance of the upper wiring layer 113 increases, and the operating speed of the semiconductor device decreases. For the above reasons, the thickness of the TiSiN film 123 when depositing the TiSiN film 123 is 1 nm or more and 50 n
It is desirable to set it to m or less.

The manufacture of the semiconductor device in this embodiment is as follows.
The operation can be performed by operating the semiconductor device manufacturing apparatus shown in FIG. 14 as follows. First, the interior of the vacuum chamber 114 is opened to the atmosphere, the semiconductor substrate 101 on which the Ti film 108 has been deposited is set on the susceptor 115, and then the vacuum chamber 114 is exhausted through the exhaust port 117.
Exhaust the inside. When the evacuation is completed, the heating mechanism 116
To operate the semiconductor substrate 101 through the susceptor 115.
Heat. The steady temperature of the semiconductor substrate 101 is 35
The output of the heating mechanism 116 is adjusted so as to reach 0 ° C.
When the temperature of the semiconductor substrate 101 reaches the steady temperature, TD
TDMAT diluted with He from the MAT inlet 118 is
SiH ₄ is introduced from the SiH 4 introduction port 120. As a result, TDMAT reacts with SiH _{4 on} the surface of the Ti film 108, and a TiSiN film 123 is deposited. After a predetermined time has elapsed, the introduction of TDMAT and SiH ₄ is stopped,
Instead, N ₂ is supplied from the N ₂ inlet 119 to the vacuum chamber 11.
4 inside. N ₂ inside the vacuum chamber 114
Is stable, the susceptor 1 is
15 and the upper electrode 121 are supplied with electric power to generate N 2 plasma inside the vacuum chamber 114. Thereby, the Ti deposited on a plane parallel to the semiconductor substrate 101 is formed.
The SiN film 123a receives the bombardment of cations and its density is improved. After a predetermined time has elapsed, the high-frequency power supply 12
2 is stopped to stop the introduction of the N ₂ from the N ₂ inlet 119. Finally, after the operation of the heating mechanism 116 is stopped and the vacuum chamber 114 is opened to the atmosphere, the semiconductor substrate 101
Discharge.

Embodiment 3 A semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS. 31 to 37, the same components as those shown in FIGS. 1 to 7 are denoted by the same reference numerals, and detailed description of the components will be omitted.

As shown in FIG. 37, the present semiconductor device has a semiconductor substrate 101 on which an integrated circuit element such as a transistor (not shown) is formed, a lower wiring layer 102 formed on the surface of the semiconductor substrate 101, and a lower substrate. SiO ₂ film 10 deposited on semiconductor substrate 101 so as to cover wiring layer 102
3 is provided.

The Si ₃ N ₄ film 104 is formed on the SiO ₂ film 103.
Is deposited, and a SiO ₂ film 105 is deposited on the Si ₃ N ₄ film 104. SiO ₂ film 103, Si ₃ N ₄
An interlayer insulating film is formed by the film 104 and the SiO ₂ film 105. This interlayer insulating film includes a lower wiring layer 10
2 and the through hole 106
And a wiring groove 107 connected to the wiring groove 1 are formed.
07, through the through hole 106, the lower wiring layer 10
2 is provided with an upper wiring layer 113 which is in electrical contact with 2.

The upper wiring layer 113 is
And a titanium (Ti) film 108 covering the inner side surface and the bottom surface of the wiring groove 107, and T
iiN film 109 and Ti deposited on TiN film 109
A SiN film 110, a Cu film 111 deposited on the TiSiN film 110, and a Cu film 112 deposited on the Cu film 111;
At the interface with the u film 111, a copper silicide (Cu ₃ Si) film 1
25 are formed.

The TiSiN film 109 is formed in the through hole 10
6 and a vertical portion (a portion formed on a surface substantially perpendicular to the semiconductor substrate 101) 109a formed on the inner side wall of the wiring groove 107, a through hole 106 and the wiring groove 1
07 (the semiconductor substrate 101)
A portion formed on a plane substantially parallel to
Distinguish as necessary. Similarly, the TiSiN film 110
A vertical portion (a portion formed on a surface substantially perpendicular to the semiconductor substrate 101) 110a formed on the inner side wall of the through hole 106 and the wiring groove 107 and a bottom portion of the through hole 106 and the wiring groove 107 (A part formed on a plane substantially parallel to the semiconductor substrate 101) 110b.

By adopting the above configuration, it is possible to reduce the leak current between through holes 106 and between upper wiring layers 113 as compared with the prior art. 113 can be improved in electromigration resistance.
This is because the TiSiN film 11 is formed by the Cu ₃ Si film 125 provided at the interface between the TiSiN film 110 and the Cu film 111.
This is because the adhesion between 0 and the Cu film 111 is improved, and the migration of Cu atoms is less likely to occur.

Hereinafter, a method for manufacturing the semiconductor device will be described with reference to the drawings.

First, as shown in FIG.
The lower wiring layer 102 is formed on the surface of the substrate 01. Next, FIG.
As shown in FIG. 2, an SiO ₂ film (thickness: about 100 to 200
0 nm) 103, Si ₃ N ₄ film (film thickness: about 5 to 50 nm)
104, SiO ₂ film (thickness: about 100 to 1000 nm)
After sequentially depositing 105, a lithography method and a dry etching method are alternately applied twice each so that a through hole 106 is formed inside the SiO ₂ film 103 and the Si ₃ N ₄ film 104, and a through hole 106 is formed inside the SiO ₂ film 105. The wiring groove 107 is formed. Next, as shown in FIG. 33, after cleaning the bottom of the through hole 106 by dry etching, a Ti film (thickness: about 0.5 to 10 nm) 108 is formed by physical vapor deposition. Subsequently, a TiN film 109 is deposited by a chemical vapor deposition method. Then, Ti
The surface of the N film 109 is exposed to N ₂ plasma. At this time, Ti deposited on a plane parallel to the semiconductor substrate 101 is used.
The density of the N film 109b is improved in order to effectively receive cation bombardment. On the other hand, the density of the TiN film 109a deposited on a plane perpendicular to the semiconductor substrate 101 does not change because it is hardly affected by positive ions.

Next, as shown in FIG. 35, the TiN film 10
9 exposing the surface to SiH ₄ of. At this time, if the temperature of the semiconductor substrate is heated to 300 ° C. or more and the time for exposing the surface of the TiN film 109 to SiH ₄ is 15 seconds or more, TiN
A TiSiN film 110a is formed on the surface of the film 109a, and a TiSiN film 110b is formed on the surface of the TiN film 109b.
Is formed. At this time, a Si film (thickness: 1 to 10 nm) 124 grows on the surface of the TiSiN film 110.

Next, a Cu film (thickness: about 5-200 nm) 111 is formed on the surface of the Si film 124 by physical vapor deposition.
Is deposited. However, the Cu film 111 is deposited only at the center of the semiconductor substrate 101. Si film 124 and Cu film 11
1 and immediately react with Cu3Si as shown in FIG.
A film 125 is formed. Next, the Cu film 111 and Si
After the surface of the film 124 is washed with H ₂ SO ₄ , a Cu film (thickness: about 100 to 1000 nm) 11 is formed by electrolytic plating.
2 is deposited. At this time, the Cu film does not grow on the exposed region on the surface of the Si film 124. This is because the exposed surface of the Si film 124 is transferred to the exposed surface of the Si film 124 by transporting in the air, and thus the insulating film S
This is because an iO ₂ film is formed, and a reduction reaction of Cu ions does not occur in that portion.

Finally, the T on the SiO ₂ film 105
i film 108, TiN film 109, TiSiN film 110, C
The semiconductor device shown in FIG. 37 is manufactured by removing the u ₃ Si film 125, the Cu film 111, and the Cu film 112 by a chemical mechanical polishing method.

Here, the deposition of the Si film 124 and the Cu film 111 is preferably performed continuously in a vacuum. this is,
If the Si film 124 is exposed to the atmosphere before the Cu film 111 is deposited, a SiO ₂ film is formed on the surface of the Si film 124, so that the reaction between the Si film 124 and the Cu film 111 is hindered. Such continuous film deposition can be realized using the semiconductor device manufacturing apparatus shown in FIG. FIG.
The apparatus includes, for example, a chemical vapor deposition chamber 126 having a configuration as shown in FIG. 14 and a copper deposition chamber 127 connected to the deposition chamber 126. The spaces are connected by a reduced-pressure transfer chamber 128.

Although the present invention has been described with reference to the three embodiments, the present invention is not limited to these embodiments. For example, in the above-described embodiment, the “dual damascene method” in which the through hole 106 and the wiring groove 107 are continuously formed and then the inside thereof is filled with a metal material such as the Cu film 112 is applied. The “single damascene method” in which either the wiring 106 or the wiring groove 107 is formed and then the inside thereof is filled with a metal material such as the Cu film 112 can be applied instead. In the above-described embodiment, SiO ₂ and Si ₃ N ₄ are used as materials for insulating between wiring layers, but other materials can be used instead of these materials. An example of such a material is fluorine (F)
For example, SiO ₂ containing an impurity such as, or an organic compound having an insulating property may be used. Further, in the above embodiment, SiO ₂
Ti on the surface of the film 105 and inside the through hole 106
Although the film 108 is deposited, the deposition of the Ti film 108 becomes unnecessary depending on the type of the conductive material forming the lower wiring layer 102. However, through holes 106 and wiring grooves 107
When the metal material to be embedded in the substrate is copper, it is preferable to deposit the Ti film 108. This is because the crystal orientation of copper buried by the Ti film 108 is improved, and the electromigration resistance is improved. In this case, the deposition of the Ti film 108 and the deposition of the TiN film 109 or TiSi
The deposition of the N film 123 is preferably performed continuously in a vacuum. This can be realized, for example, by using the manufacturing apparatus shown in FIG. The apparatus shown in FIG. 39 includes a titanium deposition chamber 129 connected to the above-described film deposition chamber 126, and the film deposition chamber 126 and the titanium deposition chamber 129 are connected by a reduced-pressure transport chamber 128.
Although not shown, the film forming chamber 126 is connected to both the copper deposition chamber 127 and the titanium deposition chamber 129 and the reduced-pressure transport chamber 1.
28 may be employed.

In the above-described embodiment, the TiN film 10
9 and TDMAT as raw materials for TiSiN film 123
Is used, but any organic compound containing titanium can be used instead. Examples of such compounds include tetrakisdiethyltitanium (TDEAT) and tetrakisethylmethyltitanium (TEMAT). Further, in the above-described embodiment, the TiN film 109 and the TiSiN film 123 are exposed to the plasma generated in N ₂ , but a nitrogen compound can be used instead. Examples of such a gas include ammonia (NH ₃ ) and hydrazine (N ₂ H ₄ ).

In the above embodiment, the formation of the TiSiN film 110 and the deposition of the
_{Although 4} is used, a silicon compound can be used instead. Examples of such compounds include disilane (Si ₂ H ₆ ) and trisilane (Si ₃ H ₈ ). In the above embodiment, the Cu film 111
Although the physical vapor deposition method is used for the deposition of Cu, the Cu film 111 can be deposited by, for example, a chemical vapor deposition method. In the above-described embodiment, the electrolytic plating method is used for depositing the Cu film 112.
06 and the wiring trench 107 can be used instead. An example of such a deposition method is an electroless plating method.

Further, as a method of applying ion bombardment to the thin film, plasma irradiation is performed on the thin film in the above embodiment, but other methods such as an ion implantation method may be used.

[0119]

According to the present invention, the side wall of the through hole and the side wall of the wiring layer are covered with the silicon-containing titanium nitride layer. Since the silicon-containing titanium nitride layer has a higher ability to prevent diffusion of copper atoms than titanium nitride, the above structure can reduce the concentration of copper atoms contained in the insulating film. . Therefore, the leak current between the through holes and between the upper wiring layers can be reduced as compared with the conventional technique.

[Brief description of the drawings]

FIG. 1 is a process sectional view for describing a first embodiment of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a process cross-sectional view for explaining a first embodiment of a method for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a process sectional view for describing the first embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a process sectional view for describing the first embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a process sectional view for describing the first embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 6 is a process sectional view for describing the first embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 7 is a sectional view of a first embodiment of a semiconductor device according to the present invention.

FIG. 8 is a graph showing the concentration of silicon contained in a silicon-containing titanium nitride layer formed on a plane perpendicular to the semiconductor substrate according to the first embodiment of the present invention, as a function of the depth from the surface. .

FIGS. 9A and 9B show X-ray photoelectron spectroscopy of the surface and the inside of a silicon-containing titanium nitride layer formed on a plane perpendicular to a semiconductor substrate in the first embodiment of the present invention. 6 is a graph showing the results of analysis by the method shown in FIG.
(A) shows a Ti atom XPS included in a silicon-containing titanium nitride layer formed by exposure to SiH _4.
The spectrum (Ti2p) is shown, and (b) is a Ti atom XPS contained in a titanium nitride layer not subjected to SiH ₄ exposure.
The spectrum (Ti2p) is shown.

FIGS. 10A and 10B show X-ray photoelectron spectroscopy of the surface and inside of a silicon-containing titanium nitride layer formed on a plane perpendicular to a semiconductor substrate in the first embodiment of the present invention. 6 is a graph showing the results of analysis by the method shown in FIG.
(A) shows Si atom XPS contained in a silicon-containing titanium nitride layer formed by exposure to SiH _4.
The spectrum (Si2p) is shown, and (b) is the Si atom XPS contained in the titanium nitride layer not exposed to SiH _4.
The spectrum (Si2p) is shown.

FIG. 11 is a graph showing the concentration of silicon contained in the silicon-containing titanium nitride layer formed on a plane parallel to the semiconductor substrate as a function of the depth from the surface in the first embodiment of the present invention.

FIGS. 12A and 12B show X-ray photoelectron spectroscopy of the surface and inside of a silicon-containing titanium nitride layer formed on a plane parallel to a semiconductor substrate in the first embodiment of the present invention. 6 is a graph showing the results of analysis by the method shown in FIG.
(A) shows a Ti atom XPS included in a silicon-containing titanium nitride layer formed by exposure to SiH _4.
The spectrum (Ti2p) is shown, and (b) is a Ti atom XPS contained in a titanium nitride layer not exposed to SiH _4.
The spectrum (Ti2p) is shown.

FIGS. 13A and 13B show X-ray photoelectron spectroscopy of the surface and inside of a silicon-containing titanium nitride layer formed on a plane parallel to a semiconductor substrate in the first embodiment of the present invention. 6 is a graph showing the results of analysis by the method shown in FIG.
(A) shows Si atom XPS contained in a silicon-containing titanium nitride layer formed by exposure to SiH _4.
The spectrum (Si2p) is shown, and (b) is the Si atom XPS contained in the titanium nitride layer not exposed to SiH _4.
The spectrum (Si2p) is shown.

FIG. 14 is a cross-sectional view of an embodiment of a semiconductor device manufacturing apparatus according to the present invention.

FIG. 15 is a process sectional view for describing the second embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 16 is a process sectional view for describing the second embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 17 is a process sectional view for describing the second embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 18 is a process sectional view for describing the second embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 19 is a process sectional view for describing the second embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 20 is a sectional view illustrating a second embodiment of the semiconductor device according to the present invention;

FIG. 21 shows the thickness of the silicon-containing titanium nitride layer deposited on a plane perpendicular to the semiconductor substrate and the thickness of the silicon-containing titanium nitride layer deposited on a plane parallel to the semiconductor substrate in the second embodiment of the present invention. It is a graph which shows and compares this.

FIGS. 22 (a) and (b) show a surface and inside of a silicon-containing titanium nitride layer formed on a plane perpendicular to a semiconductor substrate and a plane parallel to the semiconductor substrate in a second embodiment of the present invention. It is a graph which shows the XPS spectrum (Ti2p) of the Ti atom which measured the surface and the inside of the silicon-containing titanium nitride layer formed on the plane by X-ray photoelectron spectroscopy.

FIGS. 23 (a) and (b) show the surface and inside of a silicon-containing titanium nitride layer formed on a plane perpendicular to the semiconductor substrate and the semiconductor substrate in the second embodiment of the present invention, respectively. The surface and the inside of the silicon-containing titanium nitride layer formed on the parallel plane were subjected to the XPS spectrum of Si atom (Si2) measured by X-ray photoelectron spectroscopy.
It is a graph which shows p).

FIG. 24 is a view showing the concentration of silicon contained in the silicon-containing titanium nitride layer formed on a plane parallel to the semiconductor substrate and the silicon formed on a plane perpendicular to the semiconductor substrate according to the second embodiment of the present invention; 5 is a graph showing the concentration of silicon contained in a titanium nitride layer as a function of depth from the surface.

FIG. 25 is a process cross-sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 26 is a process cross-sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 27 is a process cross-sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 28 is a process sectional view illustrating the method for manufacturing the conventional semiconductor device.

FIG. 29 is a process cross-sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 30 is a sectional view showing a conventional semiconductor device.

FIG. 31 is a process sectional view for describing the third embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 32 is a process sectional view for illustrating the third embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 33 is a process sectional view for illustrating the third embodiment of the method of manufacturing a semiconductor device according to the present invention.

FIG. 34 is a process cross-sectional view for explaining the third embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 35 is a process sectional view for describing the third embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 36 is a process cross-sectional view for explaining the third embodiment of the method for manufacturing a semiconductor device according to the present invention.

FIG. 37 is a sectional view illustrating a second embodiment of the semiconductor device according to the present invention;

FIG. 38 is a configuration diagram of an apparatus used for a method of manufacturing a semiconductor device according to the present invention.

FIG. 39 is a configuration diagram of an apparatus used for a method of manufacturing a semiconductor device according to the present invention.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 lower wiring layer 3 silicon dioxide film 4 silicon tetranitride film 5 silicon dioxide film 6 through hole 7 wiring groove 8 titanium layer 9 titanium nitride layer 10 copper film 11 copper film 12 copper film 13 upper wiring layer 101 semiconductor substrate Reference Signs List 102 lower wiring layer 103 silicon dioxide film 104 silicon trinitride film 105 silicon dioxide film 106 through hole 107 wiring groove 108 titanium layer 109 titanium nitride layer 109a titanium nitride layer 109b titanium nitride layer 110 silicon-containing titanium nitride layer 110a silicon-containing titanium nitride Layer 110b Silicon-containing titanium nitride layer 111 Copper film 112 Copper film 113 Upper wiring layer 114 Vacuum chamber 115 Susceptor 116 Heating mechanism 117 Exhaust port 118 Tetrakisdimethyltitanium inlet 119 Nitrogen inlet 120 Silane inlet 12 Upper electrode 122 high-frequency power source 123 silicon-containing titanium nitride layer 123a silicon-containing titanium nitride layer 123b silicon-containing titanium nitride layer 124 a silicon layer 125 silicide copper layer 126 a chemical vapor deposition chamber 127 copper deposition chamber 128 transfer chamber 129 titanium deposition chamber

Claims (28)

[Claims] A substrate, a first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film, and a recess formed in the insulating film. And a second conductor film formed in a concave portion of the insulating film and electrically contacting the first conductor film, wherein the second conductor film is A semiconductor device comprising: a silicon-containing titanium nitride layer formed inside a concave portion of a film; and a metal film formed on the silicon-containing titanium nitride layer. 2. A substrate, a first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film, and a concave portion formed in the insulating film And a second conductor film formed in a concave portion of the insulating film and electrically contacting the first conductor film, wherein the second conductor film is A titanium nitride layer formed inside the concave portion of the film, a silicon-containing titanium nitride layer formed on the titanium nitride layer, a silicon-containing metal layer formed on the silicon-containing titanium nitride layer, And a metal film formed on the metal layer. 3. A substrate, a first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film, and a recess formed in the insulating film. And a second conductor film formed in a recess of the insulating film and electrically contacting the first conductor film, wherein the second conductor film is A titanium nitride layer formed inside the concave portion of the film,
A semiconductor device comprising: a silicon-containing titanium nitride layer formed on the titanium nitride layer; and a metal layer formed on the silicon-containing titanium nitride layer. 4. A substrate, a first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film, and a concave portion formed in the insulating film And a second conductor film formed in a recess of the insulating film and electrically contacting the first conductor film, wherein the second conductor film is A titanium nitride layer formed inside the concave portion of the film,
A semiconductor device having a silicon-containing titanium nitride layer formed on the titanium nitride layer, a silicon-containing metal layer formed on the silicon-containing titanium nitride layer, and a metal film formed on the silicon-containing metal layer . 5. A substrate, a first conductive film supported by the substrate, an insulating film formed on the substrate so as to cover the first conductive film, and a concave portion formed in the insulating film And a second conductor film formed in a recess of the insulating film and electrically contacting the first conductor film, wherein the second conductor film is A titanium layer formed inside the concave portion of the film, a titanium nitride layer formed on the titanium layer, a silicon-containing titanium nitride layer formed on the titanium nitride layer, and a A semiconductor device comprising: a formed silicon-containing metal layer; and a metal film formed on the silicon-containing metal layer. 6. A thickness of a portion of the silicon-containing titanium nitride layer formed on the bottom surface of the concave portion of the insulating film is formed on an inner wall of the concave portion of the insulating film of the silicon-containing titanium nitride layer. 2. The thickness of a portion which is smaller than the thickness of the portion.
6. The semiconductor device according to any one of items 1 to 5, 7. The resistance of a portion of the silicon-containing titanium nitride layer formed on the bottom surface of the concave portion of the insulating film is formed on the inner wall of the concave portion of the insulating film of the silicon-containing titanium nitride layer. 2. The method according to claim 1, wherein the resistance is smaller than the resistance of the bent portion.
6. The semiconductor device according to any one of items 1 to 5, 8. The semiconductor device according to claim 1, wherein said metal layer is made of copper. 9. The method according to claim 1, wherein the concentration of silicon contained in the silicon-containing titanium nitride layer is 5 atomic% or more.
The semiconductor device according to any one of the above. 10. The thickness of a portion of the silicon-containing titanium nitride layer formed on an inner wall of a recess of the insulating film is 1 nm or more and 50 nm or less.
The semiconductor device according to any one of the above. 11. The method according to claim 1, wherein the concave portion of the insulating film includes a through hole reaching the first conductive film, and a wiring groove connected to the through hole. Semiconductor device. 12. A step of forming a first conductive film on a substrate; a step of depositing an insulating film covering the first conductive film on the substrate; at least a portion of the first conductive film is formed on the first conductive film. A method for manufacturing a semiconductor device, comprising: forming a concave portion reaching the insulating film; and forming a second conductive film inside the concave portion of the insulating film, wherein the second conductive film is Forming a silicon-containing titanium nitride layer covering the inner side wall and bottom surface of the concave portion of the insulating film by a chemical vapor deposition method; and irradiating ions to the surface of the silicon-containing titanium nitride layer. Depositing a metal layer on the surface of the silicon-containing titanium nitride layer. 13. A step of forming a first conductor film on a substrate; a step of depositing an insulating film covering the first conductor film on the substrate; at least a part of the first conductor film is formed on the first conductor film. A method for manufacturing a semiconductor device, comprising: forming a concave portion reaching the insulating film; and forming a second conductive film inside the concave portion of the insulating film, wherein the second conductive film is Forming a titanium layer covering an inner wall and a bottom surface of the concave portion of the insulating film; depositing a silicon-containing titanium nitride layer on a surface of the titanium layer by a chemical vapor deposition method; A method of manufacturing a semiconductor device, comprising: irradiating ions to the surface of a silicon-containing titanium nitride layer; and depositing a metal layer on the surface of the silicon-containing titanium nitride layer. 14. The method according to claim 12, wherein the step of irradiating the ions includes exposing a surface of the silicon-containing titanium nitride layer to plasma. 15. The step of depositing the silicon-containing titanium nitride layer includes the step of reducing the thickness of the silicon-containing titanium nitride layer by one.
The method for manufacturing a semiconductor device according to claim 12, wherein the thickness is not less than nm and not more than 50 nm. 16. A step of forming a first conductor film on a substrate, a step of depositing an insulating film covering the first conductor film on the substrate, at least a part of the first conductor film is formed on the first conductor film. A method for manufacturing a semiconductor device, comprising: forming a concave portion reaching the insulating film; and forming a second conductive film inside the concave portion of the insulating film, wherein the second conductive film is Forming a titanium nitride layer covering an inner wall and a bottom surface of the concave portion of the insulating film by a chemical vapor deposition method; irradiating ions to a surface of the titanium nitride layer; A method for manufacturing a semiconductor device, comprising: forming a silicon-containing titanium nitride layer by exposing a surface of a layer to a silicon compound; and depositing a metal layer on the silicon-containing titanium nitride layer. 17. A step of forming a first conductor film on a substrate, a step of depositing an insulating film covering the first conductor film on the substrate, at least a part of the first conductor film is formed on the first conductor film. A method for manufacturing a semiconductor device, comprising: forming a concave portion reaching the insulating film; and forming a second conductive film inside the concave portion of the insulating film, wherein the second conductive film is Forming a titanium nitride layer covering an inner wall and a bottom surface of the concave portion of the insulating film by a chemical vapor deposition method; irradiating ions to a surface of the titanium nitride layer; Forming a silicon-containing titanium nitride layer by exposing a surface of the layer to a silicon compound; forming a silicon layer by exposing the surface of the silicon-containing titanium nitride layer to a silicon compound; Depositing a metal layer on the surface of the silicon layer. 18. A step of forming a first conductor film on a substrate, a step of depositing an insulating film covering the first conductor film on the substrate, at least a part of the first conductor film is formed on the first conductor film. A method for manufacturing a semiconductor device, comprising: forming a concave portion reaching the insulating film; and forming a second conductive film inside the concave portion of the insulating film, wherein the second conductive film is Forming a titanium layer covering an inner wall and a bottom surface of a concave portion of the insulating film; depositing a titanium nitride layer on a surface of the titanium layer by a chemical vapor deposition method; Irradiating the surface of the layer with ions; forming a silicon-containing titanium nitride layer by exposing the surface of the titanium nitride layer to a silicon compound; exposing the surface of the silicon-containing titanium nitride layer to a silicon compound. A method of manufacturing a semiconductor device, comprising: forming a silicon layer by performing the method; and depositing a metal layer on a surface of the silicon layer. 19. The method according to claim 16, wherein the step of irradiating the ions includes exposing a surface of the titanium nitride layer to plasma. 20. A step of forming a silicon layer by exposing the surface of the silicon-containing titanium nitride layer to a silicon compound, wherein the surface of the silicon-containing titanium nitride layer is heated to 300 ° C. or higher, 2. The time for exposing the surface of the titanium nitride layer to the silicon compound is set to 15 seconds or more.
19. The method for manufacturing a semiconductor device according to 7 or 18. 21. The method according to claim 16, wherein the step of depositing the titanium nitride sets the thickness of the titanium nitride layer to 1 nm or more and 50 nm or less. 22. A step of depositing the metal layer, comprising: depositing a first metal layer on a predetermined region of the silicon-containing titanium nitride layer by vapor phase epitaxy; and plating on the first metal layer. 22. The method of manufacturing a semiconductor device according to claim 12, further comprising: depositing a second metal layer by a method. 23. The method according to claim 22, wherein the second metal layer is made of copper. 24. A vacuum chamber, a susceptor installed inside the vacuum chamber, a heating mechanism installed inside the susceptor, an exhaust port installed inside the vacuum chamber, An inlet installed inside, a chemical vapor deposition chamber having an electrode installed inside the vacuum chamber, and a power supply connected to the susceptor and the electrode; Organic compounds, including nitrogen compounds,
And a semiconductor device manufacturing apparatus capable of introducing a silicon compound. 25. The apparatus according to claim 24, wherein the organic compound containing titanium and the silicon compound can be simultaneously introduced into the vacuum chamber. 26. A method according to claim 26, further comprising a titanium film forming chamber connected to the chemical vapor film forming chamber, wherein the chemical vapor film forming chamber and the titanium deposition chamber are connected by a reduced-pressure transfer chamber. The apparatus for manufacturing a semiconductor device according to claim 24, wherein: 27. A method according to claim 27, further comprising a copper deposition chamber connected to the chemical vapor deposition chamber, wherein the chemical vapor deposition chamber and the copper deposition chamber are connected by a reduced-pressure transport chamber. The apparatus for manufacturing a semiconductor device according to claim 24, wherein: 28. A plasma processing apparatus comprising: a titanium deposition chamber and a copper deposition chamber connected to the chemical vapor deposition chamber; and a space between the chemical vapor deposition chamber, the titanium deposition chamber, and the copper deposition chamber. 25. The apparatus for manufacturing a semiconductor device according to claim 24, wherein the apparatus is connected by a reduced-pressure transfer chamber.