JPH0521693A - Electronic device member and manufacture thereof - Google Patents

Electronic device member and manufacture thereof

Info

Publication number
JPH0521693A
JPH0521693A JP3041258A JP4125891A JPH0521693A JP H0521693 A JPH0521693 A JP H0521693A JP 3041258 A JP3041258 A JP 3041258A JP 4125891 A JP4125891 A JP 4125891A JP H0521693 A JPH0521693 A JP H0521693A
Authority
JP
Japan
Prior art keywords
electronic device
lead frame
film
inorganic insulating
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3041258A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Yasuhiko Takemura
保彦 竹村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP3041258A priority Critical patent/JPH0521693A/en
Priority to US07/835,745 priority patent/US5276351A/en
Publication of JPH0521693A publication Critical patent/JPH0521693A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To provide a method of manufacturing an electronic device member required for manufacturing an electronic device which is high in reliability, easily handled, and high in yield and an electronic device provided with the member concerned. CONSTITUTION:An insulating inorganic material film of silicon nitride or the like is applied to coat the surfaces of the stem 201 of a lead frame and a die 202 excluding a part 213 where a wire is bonded or a part of the die 202 connected to an electronic part 200, the stem 201 is made to extend over an electronic device and electrically connected to it with a gold wire 211, and all the electronic device and a part of the lead frame are enveloped in a molding material 203.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置等の電子部
品を基板またはリ−ドフレ−ム等の部材上に固着する電
子装置の高信頼性化をはかるための部材および該部材を
有する電子装置、ならびに該部材や該電子装置の作成方
法に関する。このため本発明は、基板またはリ−ドフレ
−ム上を、電子部品をダイアタッチする部分や金のワイ
ヤボンドをする部分を除き、窒化珪素等の無機材料の保
護膜で覆ってしまうことを特徴とする。そして、このよ
うにして形成された部材を用いて電子装置を形成し、有
機樹脂モ−ルドを施した際、この部材と有機樹脂の密着
性を向上させんとするものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a member for improving reliability of an electronic device in which an electronic component such as a semiconductor device is fixed on a member such as a substrate or a lead frame, and an electronic device having the member. The present invention relates to a device, a method for manufacturing the member, and the electronic device. Therefore, the present invention is characterized in that the substrate or the lead frame is covered with a protective film made of an inorganic material such as silicon nitride, except for a portion where an electronic component is die-attached and a portion where a gold wire bond is formed. And Then, when an electronic device is formed by using the member thus formed and an organic resin mold is applied, the adhesion between the member and the organic resin is improved.

【0002】さらに、上記部材とそれに密着する保護膜
との密着性を向上させることにより、上記部材と有機樹
脂材との間に生じるクラック、ふくれ(ダイの裏面側の
モ−ルド材が半田づけ等によって加熱される際に、ダイ
近傍の水の気化によって膨れてしまうこと)の発生を防
がんとするものである。
Further, by improving the adhesion between the above-mentioned member and the protective film that adheres to the member, cracks and swelling (the mold material on the back side of the die are soldered to each other) generated between the member and the organic resin material. When heated by, for example, swelling due to vaporization of water in the vicinity of the die) to prevent cancer.

【0003】また、リ−ドフレ−ムと電子装置との電気
的接触等による欠陥を防止せんとするものである。
Another object of the present invention is to prevent defects caused by electrical contact between the lead frame and the electronic device.

【0004】[0004]

【従来の技術】従来の技術を用いて作製された集積回路
等のパッケージの様子を第1図に示す。リ−ドフレ−ム
101(105)、102、特にICチップ100がダ
イアタッチされるダイ102は銅や42アロイ等の金属
よりなり、この表面(裏面)には金等の良導電体が印刷
されている。そして、電子部品をダイアタッチさせる際
には、300〜400度Cで金−シリコン合金104を
作り、ICチップをダイ102上に固着させていた。
2. Description of the Related Art FIG. 1 shows a state of a package such as an integrated circuit manufactured by using a conventional technique. The lead frames 101 (105) and 102, particularly the die 102 to which the IC chip 100 is die-attached, is made of metal such as copper or 42 alloy, and a good conductor such as gold is printed on the front surface (back surface). ing. Then, when die-attaching the electronic component, the gold-silicon alloy 104 was formed at 300 to 400 ° C., and the IC chip was fixed on the die 102.

【0005】ICチップのダイ上への固着方法としては
以上の方法の他にも、100〜400度Cに加熱した有
機物またはガラス系の絶縁材または銀ペ−ストを用いる
方法も知られている。すなわち、有機物系の銀ペ−スト
を用いる場合では、ポリイミド系もしくはエポキシ系の
有機樹脂中に銀が混入した銀ペ−ストを固着材として用
い、基板または金属リ−ドフレ−ムのダイ102上にI
Cチップ等の電子部品を固定していた。この際には、液
体状態であった上記固着材104を化学反応や熱化学反
応を伴わせて固化し、よって上記電子部品を基板やリ−
ドフレ−ム上に固着させる。
In addition to the above method, a method of using an organic material or a glass-based insulating material or silver paste heated to 100 to 400 ° C. is also known as a method of fixing the IC chip on the die. . That is, in the case of using an organic silver paste, a silver paste in which silver is mixed in a polyimide or epoxy organic resin is used as a fixing material, and is placed on the die 102 of the substrate or the metal lead frame. To I
Electronic parts such as C-chip were fixed. At this time, the fixing material 104 in a liquid state is solidified by a chemical reaction or a thermochemical reaction, so that the electronic component is mounted on a substrate or a lead.
Fix it on the dframe.

【0006】しかし、いずれの方法においても、固着
後、有機樹脂よりなるモ−ルド103によって表面を覆
うモ−ルド処理をおこなうと、このモ−ルド材と銅また
は42アロイ等の材料の間に極めて剥がれやすい吸着物
106、および低級酸化物107が残存してしまう。
However, in any of the methods, when the surface treatment is performed by covering the surface with the mold 103 made of an organic resin after the fixing, the mold material and the material such as copper or 42 alloy are provided. The adsorbate 106 and the low-grade oxide 107, which are extremely easily peeled off, remain.

【0007】このため、第1図に示したごとく、プラス
チック・モ−ルド・パッケ−ジは、高湿度雰囲気の暴露
や水中での使用といった過酷な条件での保存・使用では
もちろん、通常の保存・使用においても、信頼性低下の
原因となる水等が上記吸着物や低級酸化物等を伝って、
モ−ルド材の内部に侵入し、リ−ドフレ−ムのダイの裏
面等に集まる。この状態で、半田づけ(一般に260度
Cで3〜10秒の溶融半田中への浸漬をおこなう)をお
こなうと、上記水が急激に気化し、クラック108、1
09やボイド110が発生する。
Therefore, as shown in FIG. 1, the plastic mold package is not only stored or used under severe conditions such as exposure to a high humidity atmosphere or use in water, but also normal storage.・ Even in use, water, which causes a decrease in reliability, travels through the adsorbate and lower oxides,
It penetrates into the inside of the mold material and gathers on the back surface of the die of the lead frame. When soldering (generally, dipping in molten solder at 260 ° C. for 3 to 10 seconds) is performed in this state, the water abruptly vaporizes and cracks 108, 1
09 and void 110 are generated.

【0008】また、従来の有機物やその銀ペ−ストを用
いて電子部品を固着する方法においては、この方法は安
価かつ大量生産するには極めて優れたものであるが、有
機物固着材104は大気中で室温の状態、ないし加熱
(100〜300度C)の状態で、残存していた有機材
中の気化成分が基板やダイ上に吸着され、この後に形成
される保護膜やモ−ルド樹脂との密着性を悪化させる。
Further, in the conventional method for fixing electronic parts by using an organic substance or its silver paste, this method is inexpensive and extremely excellent for mass production, but the organic substance fixing material 104 is used in the atmosphere. The vaporized components in the remaining organic material are adsorbed on the substrate or the die at room temperature or under heating (100 to 300 ° C.), and a protective film or mold resin formed after this is adsorbed. Deteriorates the adhesion with.

【0009】さらに、図1に示すような、いわゆるリ−
ド・オン・チップ(LOC)構造はパッケ−ジのチップ
の大型化と高集積化が可能な構造であるが、従来のチッ
プの側面にリ−ドが存在する構造と異なり、チップの上
面にリ−ドが存在するため、リ−ドがチップ表面に接触
し、短絡等が発生する危険がある。このためLOC構造
では通常、チップとリ−ドの間に絶縁テ−プを挿入し、
チップとリ−ドが接触することを防いでいる。しかし、
そのために製造工程が複雑になる上、絶縁テ−プとチッ
プとの接触によるチップの機械的な損傷も問題となる。
絶縁テ−プのない構造が望ましいことは言うまでもな
い。
Further, as shown in FIG.
The de-on-chip (LOC) structure is a structure that allows the package chip to be made larger and highly integrated, but unlike the conventional structure in which a lead is present on the side surface of the package, Since there is a lead, there is a risk that the lead comes into contact with the chip surface and a short circuit or the like occurs. Therefore, in the LOC structure, an insulating tape is usually inserted between the chip and the lead,
Prevents contact between the tip and the lead. But,
This complicates the manufacturing process and causes mechanical damage to the chip due to contact between the insulating tape and the chip.
It goes without saying that a structure without insulating tape is desirable.

【0010】[0010]

【発明が解決しようとする課題】本発明は、このような
従来のモ−ルド封止させた1つのまたは複数の半導体集
積回路等の電子部品が基板またはリ−ドフレ−ム上に、
金−シリコン合金法、ガラス系銀ペ−スト法、有機材料
系銀ペ−スト法等の方法によって固着され、高い信頼性
が要求される電子装置において、その信頼性の低下を防
ぐための方法が講じられた電子装置およびそのために必
要な電子装置用部材を提供することを目的とする。
SUMMARY OF THE INVENTION According to the present invention, such a conventional molded electronic component such as one or a plurality of semiconductor integrated circuits is provided on a substrate or a lead frame.
A method for preventing a decrease in reliability of an electronic device which is fixed by a method such as a gold-silicon alloy method, a glass-based silver paste method, or an organic material-based silver paste method and which requires high reliability. It is an object of the present invention to provide an electronic device provided with the above and an electronic device member necessary for the electronic device.

【0011】[0011]

【課題を解決しようとする手段】上記目的は、電子装置
内の基板や金属リ−ドフレ−ム等の部材の上に予め無機
物からなる保護膜を、電気的な連結を必要とする部分
(導体部)を除いて設けられた構成をとることによって
達成される。すなわち、上記部材の表面に保護膜を設け
ることによって、モ−ルド樹脂と金属との間の耐湿性を
向上させ、また、密着性を向上させることが可能とな
る。さらに、リ−ドフレ−ムのうちICチップと直接も
しくは金線等によって間接的に接触することが望まれる
部分を除き、絶縁性の皮膜で覆ってしまうと、絶縁性の
テ−プを間に挿入することなく、リ−ドフレ−ムとIC
チップとの接触による短絡等を防止できる。
SUMMARY OF THE INVENTION The above object is to provide a protective film made of an inorganic material on a member such as a substrate or a metal lead frame in an electronic device, which is required to be electrically connected (conductor). It is achieved by taking the configuration provided except the part. That is, by providing a protective film on the surface of the member, it is possible to improve the moisture resistance between the mold resin and the metal and also improve the adhesion. Furthermore, when the lead frame is covered with an insulating film except for a portion which is desired to be in direct contact with the IC chip or indirectly by a gold wire or the like, the insulating tape is interposed therebetween. Lead frame and IC without inserting
It is possible to prevent a short circuit or the like due to contact with the chip.

【0012】本発明は例えばリ−ドフレ−ムのごとき上
記部材それ自体およびそれを組み込んだ電子装置、なら
びに上記部材および上記電子装置の作成方法を提供す
る。
The present invention provides the above-mentioned member itself such as a lead frame and an electronic device incorporating the same, and a method for manufacturing the above-mentioned member and the electronic device.

【0013】本発明の提供するリ−ドフレ−ム等の部材
は、電気的連結をおこなう部分(導体部)を除いて、絶
縁性で、該部材と密着性の良い無機材料、例えば窒化珪
素、酸化珪素、炭化珪素、DLC(ダイヤモンド状炭素
等の単層または多層膜で覆われることを特徴とするが、
その製法としては以下の様な方法を用いることが可能で
ある。すなわち、部材中の導体部のみをカバ−膜で予め
覆う。そして、これら全体にプラズマCVD法またはス
パッタ法により無機材料皮膜を形成し、この後、リフト
オフ法でカバ−膜とその上の無機材料皮膜を同時に除去
する。この工程を経ることによって、導体部のみが露出
し、他の部分が無機材料絶縁性皮膜で覆われたリ−ドフ
レ−ム等の部材が形成される。このようにして形成され
た部材はこれまでと同じ量産工程で、まったく工程を変
更することなく電子装置の作製に供せられる。また、リ
−ドフレ−ムのダイを形成する場合には、ダイ上にIC
チップ等の電子部品を従来の方法で固着したのちに、電
子部品上にあってワイヤボンディング法等によって電気
的連結をおこなう部分(電子部品上の導体部)もしくは
電子部品の全面にカバ−膜を形成し、その後、全体にプ
ラズマCVD法またはスパッタ法により無機材料皮膜を
形成し、この後、リフトオフ法でカバ−膜とその上の無
機材料皮膜を同時に除去することによっても、同様な構
造を有する部材を作製することができる。特にこの方法
は、電子部品の固着に有機材料を使用した場合に有効
で、先に説明したような有機気化成分がダイ等のリ−ド
フレ−ム上に吸着されたまま、モ−ルドで覆われること
がないため、信頼性を低下を防ぐことができる。すなわ
ち、固着後に、仮に気化成分がリ−ドフレ−ム等に吸着
されたとしても、それに続く皮膜形成の工程で、真空中
に晒されるために、一度吸着された気化成分を除去し、
かつ、その上に絶縁性の無機材料皮膜を形成することが
できる。
A member such as a lead frame provided by the present invention is an inorganic material, such as silicon nitride, which is insulative and has good adhesion to the member except for a portion (conductor portion) where electrical connection is made. Silicon oxide, silicon carbide, DLC (characterized by being covered with a single layer or a multilayer film of diamond-like carbon,
As the manufacturing method, the following method can be used. That is, only the conductor portion in the member is previously covered with the cover film. Then, an inorganic material film is formed on the whole by plasma CVD method or sputtering method, and thereafter, the cover film and the inorganic material film thereon are simultaneously removed by lift-off method. Through this step, a member such as a lead frame is formed in which only the conductor portion is exposed and the other portion is covered with the inorganic material insulating film. The member thus formed can be used for manufacturing an electronic device in the same mass production process as before, without changing the process at all. When forming a lead frame die, the IC is placed on the die.
After fixing electronic parts such as chips by the conventional method, a cover film is placed on the electronic parts that are electrically connected by the wire bonding method (conductor parts on the electronic parts) or on the entire surface of the electronic parts. The same structure can be obtained by forming an inorganic material film on the entire surface by plasma CVD method or sputtering method and then removing the cover film and the inorganic material film on the inorganic material film by lift-off method at the same time. The member can be made. In particular, this method is effective when an organic material is used for fixing electronic parts, and the organic vaporized component as described above is covered with a mold while being adsorbed on the lead frame such as a die. Since it is not exposed, it is possible to prevent the reliability from decreasing. That is, even if the vaporized component is adsorbed to the lead frame or the like after fixing, it is exposed to vacuum in the subsequent film forming step, so that the vaporized component once adsorbed is removed,
Moreover, an insulating inorganic material film can be formed thereon.

【0014】図2は本発明構造の部材を用いたICパッ
ケ−ジの縦断面図を示す。また、図3において、本発明
構造の部材の作製工程の一例を示し、その完成した縦断
面に対応する図面を図3(E)に示す。
FIG. 2 is a vertical sectional view of an IC package using the member having the structure of the present invention. Further, FIG. 3 shows an example of a manufacturing process of a member of the structure of the present invention, and FIG. 3E shows a drawing corresponding to the completed vertical section.

【0015】図2において、リ−ドフレ−ムのダイ20
2に銀ペ−スト204等で密着させたチップ200が設
けられている。チップ200はICチップ以外にもキャ
パシター、インダクタ−等の電子部品であってもかまわ
ない。チップ200のアルミニウム・パッド212とリ
−ドフレ−ムのステム201の電気的連結をおこなう導
体部213(ここは金メッキがなされている)との間
に、金線211のワイヤボンドがなされている。
In FIG. 2, the lead frame die 20 is shown.
2 is provided with a chip 200 that is in close contact with a silver paste 204 or the like. The chip 200 may be an electronic component such as a capacitor or inductor other than the IC chip. The gold wire 211 is wire-bonded between the aluminum pad 212 of the chip 200 and the conductor portion 213 (here, gold-plated) that electrically connects the stem 201 of the lead frame.

【0016】本発明は、このリ−ドフレ−ムのダイ20
2とステム201の表面に予め無機材料220をコ−ト
し、ダイ表面、ステム表面には電子部品200を密着さ
せる際に出やすい有機物または金属のナチュラル・オキ
サイドが形成されないようにしたものである。そして、
金属とは密着性の悪い有機樹脂モ−ルド材が無機材料と
密着性がよいことを積極的に利用し、結果としてリ−ド
フレ−ムとモ−ルド材の密着性を向上せしめたものであ
る。また、上記無機材料皮膜(絶縁性)によってリ−ド
フレ−ムと電子部品、あるいはリ−ドフレ−ム間の電気
的接触を防ぐこともできる。
The present invention is based on this lead frame die 20.
2 and the surface of the stem 201 are coated with an inorganic material 220 in advance so as to prevent the formation of organic or metal natural oxides which are likely to be produced when the electronic component 200 is brought into close contact with the die surface and the stem surface. . And
With metal, the adhesiveness of the organic resin mold material, which has poor adhesion, is positively utilized, and as a result, the adhesion between the lead frame and the molding material is improved. is there. In addition, the inorganic material film (insulating property) can prevent electrical contact between the lead frame and the electronic component, or between the lead frame.

【0017】図2において42アロイまたは銅からなる
リ−ドフレ−ム201、202において電子部品200
をアタッチさせる部分およびワイヤボンドする部分の金
の印刷が施されている部分には、無機材料絶縁皮膜22
0は形成されていない。また、図2には示されていない
が、ダイ202には穴を開け、半田付けの際の熱衝撃に
よる応力集中を逃す構造とすることも可能である。最終
的にはダイ202上に電子部品200が固着され、ステ
ムと電子部品の間に金線によってワイヤボンドがなされ
たのちに電子部品もリ−ドフレ−ムもモ−ルド封入さ
れ、完成する。
In FIG. 2, the lead frame 201, 202 made of 42 alloy or copper is used as the electronic component 200.
The inorganic material insulating film 22 is attached to the portion to which the gold is printed on the portion to be attached and the portion to be wire-bonded.
0 is not formed. Further, although not shown in FIG. 2, it is possible to form a hole in the die 202 so that stress concentration due to thermal shock at the time of soldering is released. Finally, the electronic component 200 is fixed on the die 202, and after the wire bond is made between the stem and the electronic component by a gold wire, both the electronic component and the lead frame are encapsulated and completed.

【0018】図3にしたがって、本発明構造を作製する
方法の一例を説明する。最初に、図3(A)に示すよう
に有機樹脂もしくは機械的な方法によって、ステム30
1とダイ302を固定する。このとき、リ−ドフレ−ム
の足の部分305は図に示されるように有機樹脂等の中
に封入された状態となっていてもよい。その後、ステム
301の一部に印刷法もしくは他の方法によって選択的
に金の皮膜313を形成する。この順序は逆であっても
構わない。すなわち、先にステムに金の皮膜を形成し、
その後、リ−ドフレ−ムを固定してもよい。
An example of a method for producing the structure of the present invention will be described with reference to FIG. First, as shown in FIG. 3A, the stem 30 is formed by an organic resin or a mechanical method.
1 and the die 302 are fixed. At this time, the foot portion 305 of the lead frame may be in a state of being enclosed in an organic resin or the like as shown in the figure. Then, a gold coating 313 is selectively formed on a part of the stem 301 by a printing method or another method. This order may be reversed. That is, the gold film is first formed on the stem,
After that, the lead frame may be fixed.

【0019】さらに、図3(B)に示すように、ステム
およびダイのうち、無機材料絶縁皮膜を形成させたくな
い部分に、スクリ−ン印刷法等の方法によって有機樹脂
等の皮膜322を形成する。
Further, as shown in FIG. 3B, a film 322 of an organic resin or the like is formed by a screen printing method or the like on a portion of the stem and the die where the inorganic material insulating film is not desired to be formed. To do.

【0020】さらにこれら全体に図3(C)に示すが如
く、無機材料の保護膜320をプラズマCVD法や光C
VD法、スパッタ法等の方法によって形成する。このと
き、特に図3に示される方法でLOC構造を作製する場
合には重要なことは、この皮膜形成が、極めて回り込み
よく、どの部分にもほぼ均等に、すなわち、ステップカ
バレ−ジ良くおこなわれる必要があるということであ
る。例えば、ダイ302の裏側にもステムの表面にも同
じだけ皮膜が形成されなければならない。したがって、
例えば真空蒸着法のごとき方法は本工程には適さない。
当然のことながら、リ−ドフレ−ムの足の部分は有機樹
脂中にあるため、その部分には無機材料皮膜は形成され
ない。
Furthermore, as shown in FIG. 3C, a protective film 320 made of an inorganic material is formed on the whole of these by a plasma CVD method or light C.
It is formed by a method such as a VD method or a sputtering method. At this time, it is particularly important when the LOC structure is produced by the method shown in FIG. 3 that the film formation is extremely well wraparound, and is almost evenly performed in any part, that is, good in step coverage. It is necessary. For example, the back side of the die 302 and the surface of the stem must be equally coated. Therefore,
For example, a method such as a vacuum deposition method is not suitable for this step.
As a matter of course, since the foot portion of the lead frame is in the organic resin, the inorganic material film is not formed on that portion.

【0021】この無機材料皮膜としては500度Cで大
気中に1時間放置しても変質することがなく、耐熱性を
有し、耐酸化性を有することが必要である。このために
は酸化珪素、窒化珪素、炭化珪素等を主成分とする材料
が優れている。
This inorganic material film is required to have heat resistance and oxidation resistance so that it does not deteriorate even if left in the air at 500 ° C. for 1 hour. For this purpose, a material containing silicon oxide, silicon nitride, silicon carbide or the like as a main component is excellent.

【0022】次に、これら全体を有機溶剤中に浸し、超
音波を加えて、有機樹脂皮膜322を溶去し、同時にそ
の上に形成されている無機材料皮膜をも除去するとい
う、いわゆるリフトオフ法によって、後に電子部品をダ
イアタッチさせる部分とワイヤボンドする部分を露出さ
せる。さらに、ダイ302上に固着材304を塗布し、
さらに電子部品300を挿入し、その上に固着する。さ
らに、電子部品とステムとを金線311によってワイヤ
ボンドし、電子装置の内部結線が完了する。こうして、
図3(D)を得る。
Next, the so-called lift-off method of soaking the whole in an organic solvent and applying ultrasonic waves to dissolve away the organic resin film 322 and at the same time remove the inorganic material film formed thereon Thus, a portion to be die-attached with an electronic component later and a portion to be wire-bonded are exposed. Further, a fixing material 304 is applied on the die 302,
Further, the electronic component 300 is inserted and fixed onto it. Further, the electronic component and the stem are wire-bonded with the gold wire 311 to complete the internal wiring of the electronic device. Thus
FIG. 3D is obtained.

【0023】最後に、図3(E)に示されるように、電
子部品とリ−ドフレ−ムごとエポキシ系の有機樹脂等に
よってモ−ルド封入をおこない、パッケージ303を形
成し、電子装置が完成する。本工程によれば、リ−ドフ
レ−ムのうち、モ−ルド材の内部の部分はほぼ完全に無
機材料皮膜によって覆うことができるが、外部の部分
は、無機材料皮膜の無い部分があり、該電子装置を実装
する際に従来のものと同様に扱え、便利である。図3に
示した例では、ダイ302が存在したが、ダイの存在し
ない構造のものであっても、この例に示した方法を用い
ることが可能である。
Finally, as shown in FIG. 3 (E), a mold 303 is formed by encapsulating the electronic components and the lead frame with an epoxy-based organic resin or the like to form a package 303 to complete the electronic device. To do. According to this step, in the lead frame, the inner part of the mold material can be almost completely covered with the inorganic material film, but the outer part has a part without the inorganic material film, It is convenient because the electronic device can be mounted in the same manner as a conventional one when mounted. Although the die 302 is present in the example shown in FIG. 3, the method shown in this example can be used even for a structure having no die.

【0024】また、図3に示した方法ではリ−ドフレ−
ムに皮膜を形成する工程がリ−ドフレ−ムの組立後にな
されているが、各リ−ドフレ−ムに皮膜を形成したのち
に、それを組み立ててもよい。
In the method shown in FIG. 3, the lead frame is
Although the step of forming the film on the frame is performed after the assembly of the lead frame, it may be assembled after the film is formed on each of the lead frames.

【0025】また、無機材料皮膜としては、酸化珪素、
炭化珪素、窒化珪素、硬質炭素、あるいは組成比として
それらの混合物として記述されるもので、ストイキオメ
トリックなものやノンストイキオメトリックなものの単
層もしくは多層のものが適しているが、その厚さは30
〜500nmがのぞましい。
As the inorganic material film, silicon oxide,
It is described as silicon carbide, silicon nitride, hard carbon, or a mixture thereof as a composition ratio, and a stoichiometric or non-stoichiometric monolayer or multilayer is suitable, but the thickness is Thirty
~ 500nm is desirable.

【0026】以下に実施例を示し、本発明を説明する。The present invention will be described below with reference to examples.

【0027】[0027]

【実施例】〔実施例1〕図4に本発明の実施例を示す。
加熱し液状にしたポリエチレン中にリ−ドフレ−ム43
0を配置し、ポリエチレンを冷却して固化させ、台42
1とした。このとき、リ−ドフレ−ムは図4(G)に示
されるように、1つの平面に多数形成すると大量生産す
ることができる。さらに、リ−ドフレ−ムの導体部に金
の皮膜413および有機樹脂の皮膜422を形成した。
このようにして、図4(A)を得た。
[Embodiment 1] FIG. 4 shows an embodiment of the present invention.
Lead frame 43 in polyethylene liquefied by heating
0, the polyethylene is cooled and solidified, and the table 42
It was set to 1. At this time, a large number of lead frames can be mass-produced by forming a large number on one plane as shown in FIG. Further, a gold film 413 and an organic resin film 422 were formed on the conductor portion of the lead frame.
Thus, FIG. 4A was obtained.

【0028】さらに、プラズマCVD法によって、リ−
ドフレ−ムの表面に窒化珪素の皮膜を形成した。皮膜の
形成には通常の平行平板型RFプラズマCVD装置を用
い、反応ガスとして、ジシラン(Si2H6)およびアンモニ
ア(NH3)を用いた。反応ガスの純度はいずれも99.9
9%以上とした。また、プラズマを発生させるためのガ
スとしてはアルゴン(99.9%以上)を用いた。図4
(G)に示される円盤状の基体をCVD装置の一方の電
極上に配置し、CVD装置の反応室内をタ−ボ分子ポン
プによって10の−4〜10の−8torrまで真空排
気し、この状態を5〜30分保持し、有機樹脂等から排
出される不要な、あるいは成膜反応に有害な気化成分を
充分排気した。
Further, by the plasma CVD method,
A film of silicon nitride was formed on the surface of the dframe. A normal parallel plate type RF plasma CVD apparatus was used for forming the film, and disilane (Si2H6) and ammonia (NH3) were used as reaction gases. The reaction gases have a purity of 99.9 in all cases.
9% or more. In addition, argon (99.9% or more) was used as a gas for generating plasma. Figure 4
The disk-shaped substrate shown in (G) is placed on one electrode of the CVD apparatus, and the reaction chamber of the CVD apparatus is evacuated to -4 to -10 to -8 torr by a turbo molecular pump. Was held for 5 to 30 minutes to sufficiently exhaust unnecessary or harmful vaporizing components discharged from the organic resin or the like to the film formation reaction.

【0029】その後、反応室内にアルゴンガスのみを導
入し、13.56MHzの高周波電力を電極間に加える
ことによってプラズマを生じさせた。高周波電力の電力
としては0.1〜1KWが適切であった。プラズマが安
定したことを確認してから、ジシランとアンモニアを少
量づつ反応室内に導入し、皮膜を形成した。反応ガスの
比率は、例えば、ジシラン1に対し、アンモニア5とい
うような比率にした。
Thereafter, only argon gas was introduced into the reaction chamber, and high frequency power of 13.56 MHz was applied between the electrodes to generate plasma. As the high frequency power, 0.1 to 1 kW was suitable. After confirming that the plasma was stable, disilane and ammonia were introduced little by little into the reaction chamber to form a film. The ratio of the reaction gas was set to, for example, 1 part disilane and 5 parts ammonia.

【0030】成膜は室温でおこなった。このようにし
て、リ−ドフレ−ムを図4(B)で示すように、厚さ1
00〜300nmの窒化珪素皮膜420によってコ−テ
ィングした。このとき得られた窒化珪素の皮膜の物性は
別の基板上に形成したものより絶縁耐圧が8MV/cm
以上であり、赤外吸収スペクトルでは864cm−1の
Si−N結合の吸収ピ−クが明確に確認され、屈折率は
2.0で充分高抵抗であることが確認されている。
The film formation was performed at room temperature. In this way, the lead frame has a thickness of 1 mm as shown in FIG.
It was coated with a silicon nitride film 420 having a thickness of 00 to 300 nm. The physical properties of the silicon nitride film obtained at this time have a withstand voltage of 8 MV / cm as compared with those formed on another substrate.
As described above, in the infrared absorption spectrum, the absorption peak of Si-N bond at 864 cm -1 was clearly confirmed, and it was confirmed that the refractive index was 2.0 and the resistance was sufficiently high.

【0031】次にリ−ドフレ−ムごと超音波を加えつ
つ、トルエンを主成分とする有機溶媒中に浸し、有機樹
脂皮膜422とその上の窒化珪素皮膜420をリフトオ
フ法によって除去し、リ−ドフレ−ムの導体部413を
露出させた。このようにして、図4(C)を得た。
Next, the whole lead frame was immersed in an organic solvent containing toluene as the main component while applying ultrasonic waves, and the organic resin film 422 and the silicon nitride film 420 thereon were removed by a lift-off method. The conductor portion 413 of the dframe is exposed. In this way, FIG. 4C was obtained.

【0032】さらに、図4(D)中の425で示される
レベルまで液状のポリエチレンをつぎたし、固化させ
た。そして、このリ−ドフレ−ムの下の部分にICチッ
プ400を置き、金線411によって、リ−ドフレ−ム
とICチップをワイヤボンドした。
Further, liquid polyethylene was poured to the level indicated by 425 in FIG. 4D and solidified. Then, the IC chip 400 was placed under the lead frame, and the lead frame and the IC chip were wire-bonded by the gold wire 411.

【0033】さらに、ポリエチレンの表面に出ているI
Cチップとリ−ドフレ−ムをエポキシ系の合成樹脂40
3によって固め、図4(E)を得た。
Furthermore, I on the surface of polyethylene
Epoxy synthetic resin 40 for C chip and lead frame
It was solidified by 3 to obtain FIG. 4 (E).

【0034】最後にポリエチレンを加熱して溶融させ、
除去し、ICチップの下面もエポキシ系の樹脂で固め、
完全にモ−ルド封入されたIC装置が作製できた。
Finally, polyethylene is heated to melt,
Remove and harden the bottom of the IC chip with epoxy resin,
An IC device completely encapsulated could be produced.

【0035】[0035]

【発明の効果】本発明によって、リ−ドフレ−ム等の金
属材料とモ−ルド材の密着性を向上させ、よって、長期
の保存や高温多湿下での保存、また半田付け等の高温処
理等に伴う欠陥を減らすことができた。また、特にLO
C構造を有する電子装置においては先に説明したよう
に、リ−ドとチップの接触による短絡等の欠陥の発生を
低く抑えることができた。以上のことは電子装置自体の
信頼性を高める。
According to the present invention, the adhesion between a metal material such as a lead frame and a mold material is improved, and therefore, long-term storage, storage under high temperature and high humidity, and high-temperature treatment such as soldering. It was possible to reduce the defects associated with the above. Also, especially LO
As described above, in the electronic device having the C structure, the occurrence of defects such as a short circuit due to contact between the lead and the chip could be suppressed to a low level. The above increases the reliability of the electronic device itself.

【0036】特に、半導体集積回路のチップ面積が大き
くなるとともに、半導体集積回路のパッケ−ジ技術はL
OCに代表されるように多層化する方向にある。しかし
ながら、従来技術の延長では、多層化は複雑な工程が必
要で、また、様々な問題によって集積回路の機能が傷つ
けられる危険性を有していた。
In particular, as the chip area of the semiconductor integrated circuit increases, the packaging technology of the semiconductor integrated circuit is L
There is a tendency toward multilayering as represented by OC. However, in the extension of the prior art, the multi-layering requires complicated steps, and various problems pose a risk of damaging the function of the integrated circuit.

【0037】例えば、従来のLOC技術ではICチップ
とリ−ドフレ−ムの間には絶縁シ−トを挿入するが、こ
れは先に述べたようにICチップを機械的に破壊する危
険を有している上、モ−ルド材と絶縁シ−トの密着性が
悪いと、従来のICパッケ−ジで問題となった、クラッ
クの発生等がより大きな確率で問題となる。
For example, in the conventional LOC technology, an insulating sheet is inserted between the IC chip and the lead frame, but this has a risk of mechanically destroying the IC chip as described above. In addition, if the adhesion between the mold material and the insulating sheet is poor, the occurrence of cracks, which has been a problem in conventional IC packages, becomes a problem with a higher probability.

【0038】これに対し、本発明に記述した例から明ら
かなように、LOC構造であっても、モ−ルド材の内部
にはリ−ドフレ−ムとICチップ以外にはない構造をと
れば、従来のLOC構造(絶縁シ−トを含んでいる)で
問題となることは全く解決されうる。
On the other hand, as is apparent from the examples described in the present invention, even if the LOC structure is used, a structure other than the lead frame and the IC chip is not provided inside the molding material. The problem with the conventional LOC structure (including the insulating sheet) can be completely solved.

【0039】のみならず、LOC構造であっても、ま
た、そうでなくても、リ−ドフレ−ムのモ−ルド材と外
部の境界の部分にのみ無機材料皮膜が形成されているだ
けで、電子装置の信頼性は大きく向上する。したがっ
て、LOC構造を有するもので絶縁シ−トを内部に含ん
でいても、リ−ドフレ−ムのモ−ルド材と外部との境界
部分に無機材料の皮膜が形成されて、リ−ドフレ−ムと
モ−ルド材の密着性が向上していれば、そこからクラッ
ク等が発生することも減り、したがって、欠陥品の発生
する確率は大きく減らすことが可能である。以上の議論
は、特に証明されずとも容易に理解できるであろう。
Not only the LOC structure, but also the LOC structure, only the inorganic material film is formed only on the boundary between the mold material of the lead frame and the outside. The reliability of electronic devices is greatly improved. Therefore, even if the LOC structure is included and the insulating sheet is contained inside, a film of an inorganic material is formed at the boundary between the mold material of the lead frame and the outside, and the lead frame is formed. If the adhesion between the rubber and the mold material is improved, the occurrence of cracks and the like is reduced, and thus the probability of defective products can be greatly reduced. The above discussion can be easily understood without any particular proof.

【0040】さらにまた、リ−ドフレ−ムが製造工程の
比較的早い段階で、無機材料皮膜によってコ−ティング
されるため、その後の工程での取扱も微妙さを要求され
ず、したがって、高い歩留りを維持できる。皮膜の形成
自体は、実施例に示したように一度に大量におこなえる
ため大きなコスト増とはならず、逆に歩留りや信頼性を
考慮すれば割安となる。
Furthermore, since the lead frame is coated with the inorganic material film at a relatively early stage of the manufacturing process, the handling in the subsequent process is not required to be subtle, and therefore the yield is high. Can be maintained. The formation of the film itself does not cause a large increase in cost because it can be performed in a large amount at a time as shown in the examples, and conversely, it is cheaper in consideration of yield and reliability.

【0041】本発明はLOC構造を例にとって説明をし
たが、その他の構造、例えばチップ・オン・リ−ド(C
OL)構造、を有しているものにも適応することには何
ら問題がないことは明らかであろう。
Although the present invention has been described by taking the LOC structure as an example, other structures such as a chip-on-read (C
It will be clear that there is no problem adapting to those having the (OL) structure.

【0042】さらに本発明において、電子部品は半導体
素子が例として示されていたが、その他、絶縁基板上に
金属導体が設けられ、これらに抵抗、コンデンサを固着
させたハイブリッドICであってもよく、ボンディング
もワイヤボンディングのみならずフリップチップ・ボン
ディング、ハンダバンプ・ボンディングでもよい。
Further, in the present invention, a semiconductor element is shown as an example of the electronic component, but in addition, a hybrid IC in which a metal conductor is provided on an insulating substrate and a resistor and a capacitor are fixed to these may be used. The bonding may be not only wire bonding but also flip chip bonding or solder bump bonding.

【0043】以上の記述から明らかなように本発明は工
業上極めて有益であると信ずる。
As is clear from the above description, the present invention is believed to be extremely useful industrially.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来の半導体集積回路のパッケ−ジおよびその
欠陥の例を示したもので、パッケ−ジはLOC構造を有
している。
FIG. 1 shows an example of a package of a conventional semiconductor integrated circuit and its defects, and the package has a LOC structure.

【図2】本発明の半導体集積回路のパッケ−ジの例を示
したもので、パッケ−ジはLOC構造を有している
FIG. 2 shows an example of a package of a semiconductor integrated circuit according to the present invention, wherein the package has a LOC structure.

【図3】本発明のパッケ−ジを作製する方法例を示して
いる。
FIG. 3 shows an example of a method for producing the package of the present invention.

【図4】本発明のパッケ−ジを作製する方法例を示して
いる。
FIG. 4 shows an example of a method for producing the package of the present invention.

【符号の説明】[Explanation of symbols]

200・・・・電子部品 201、202、205・・・リードフレーム 203・・・モールド材 204・・・固着材 211・・・金線 212・・・アルミパッド 213・・・金接点 220・・・無機材料絶縁性被膜 200 ... Electronic parts 201, 202, 205 ... Lead frame 203 ... Mold material 204 ... Fixing material 211 ... Gold wire 212 ... Aluminum pad 213 ... Gold contact 220 ... Inorganic material insulating film

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成4年7月16日[Submission date] July 16, 1992

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】図面の簡単な説明[Name of item to be corrected] Brief description of the drawing

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【図面の簡単な説明】[Brief description of drawings]

【図1】 従来の半導体集積回路のパッケージおよびそ
の欠陥の例を示したもので、パッケージはLOC構造を
有している。
FIG. 1 shows an example of a conventional semiconductor integrated circuit package and its defects, and the package has a LOC structure.

【図2】 本発明の半導体集積回路のパッケージの例を
示したもので、パッケージはLOC構造を有している
FIG. 2 shows an example of a package of a semiconductor integrated circuit of the present invention, which has a LOC structure.

【図3】 本発明のパッケージを作製する方法例を示し
ている。
FIG. 3 illustrates an example method of making the package of the present invention.

【図4】 本発明のパッケージを作製する方法例を示し
ている。
FIG. 4 illustrates an example method of making the package of the present invention.

【図5】 本発明のパッケージを作製する方法例を示し
ている。
FIG. 5 illustrates an example method of making the package of the present invention.

【図6】 本発明のパッケージを作製する方法例を示し
ている。
FIG. 6 illustrates an example method of making the package of the present invention.

【符号の説明】 200・・・・電子部品 201、202、205・・・リードフレーム 203・・・モールド材 204・・・固着材 211・・・金線 212・・・アルミパッド 213・・・金接点 220・・・無機材料絶縁性被膜[Explanation of symbols] 200 ... Electronic parts 201, 202, 205 ... Lead frame 203 ... Mold material 204 ... Fixing material 211 ... Gold wire 212 ... Aluminum pad 213 ... Gold contact 220 ... Inorganic material insulating film

【手続補正2】[Procedure Amendment 2]

【補正対象書類名】図面[Document name to be corrected] Drawing

【補正対象項目名】全図[Correction target item name] All drawings

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【図1】 [Figure 1]

【図2】 [Fig. 2]

【図3】 [Figure 3]

【図4】 [Figure 4]

【図5】 [Figure 5]

【図6】 [Figure 6]

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】電子装置において、リ−ドフレ−ムのステ
ムの部分、もしくはそれと同等な機能を有する電子装置
用部材が電子部品上に重なっていることを特徴とする電
子装置において、リ−ドフレ−ムもしくはそれと同等な
機能を有する電子装置用部材のうち、モ−ルド材によっ
て封入されている部分において、ワイヤボンドする部
分、電子部品を装着する部分以外が無機絶縁性の材料に
よって覆われたことを特徴とする電子装置。
1. An electronic device in which a stem portion of a lead frame or an electronic device member having a function equivalent to that of the stem overlaps an electronic component. -Among the members for electronic devices having the same function as or the same as those of the electronic device, the part which is wire-bonded and the part where electronic parts are mounted are covered with the inorganic insulating material in the part sealed by the molding material. An electronic device characterized by the above.
【請求項2】前記請求項1において、無機絶縁性の材料
は炭化珪素、酸化珪素、窒化珪素、炭素のうち、少なく
とも1つを主成分とする材料であることを特徴とする電
子装置もしくは電子装置用部材。
2. The electronic device or the electronic device according to claim 1, wherein the inorganic insulating material is a material containing at least one of silicon carbide, silicon oxide, silicon nitride and carbon as a main component. Equipment member.
【請求項3】電子装置中のリ−ドフレ−ムもしくはそれ
と同等な機能を有する電子装置用部材において、該リ−
ドフレ−ムもしくはそれと同等な機能を有する電子装置
用部材のモ−ルド材中に存在する部分において、ワイヤ
ボンドする部分、電子部品を装着する部分以外が無機絶
縁性の材料によって覆われ、かつ、該リ−ドフレ−ムの
ステムの部分もしくはそれと同等な機能を有する電子装
置用部材が、電子装置中の電子部品上に重なっているこ
とを特徴とする電子装置用部材。
3. A lead frame in an electronic device or an electronic device member having a function equivalent to the lead frame, comprising:
In the portion existing in the mold material of the electronic device member having the same function as the dframe, the portion to be wire-bonded, the portion other than the portion to which the electronic component is mounted is covered with the inorganic insulating material, and A member for an electronic device, wherein a stem portion of the lead frame or a member for an electronic device having a function equivalent to that of the stem is overlapped on an electronic component in the electronic device.
【請求項4】前記請求項2において、無機絶縁性の材料
は炭化珪素、酸化珪素、窒化珪素、炭素のうち、少なく
とも1つを主成分とする材料であることを特徴とする電
子装置もしくは電子装置用部材。
4. The electronic device or the electronic device according to claim 2, wherein the inorganic insulating material is a material containing at least one of silicon carbide, silicon oxide, silicon nitride and carbon as a main component. Equipment member.
【請求項5】電子装置中のリ−ドフレ−ムもしくはそれ
と同等な機能を有する電子装置用部材において、少なく
ともモ−ルドに覆われている部分と外部との境界部分が
無機絶縁性の材料によって覆われていることを特徴とす
る電子装置用部材。
5. A lead frame in an electronic device or a member for an electronic device having a function equivalent to that of the lead frame, wherein at least a boundary portion between the portion covered with the mold and the outside is made of an inorganic insulating material. A member for an electronic device, which is covered.
【請求項6】前記請求項3において、無機絶縁性の材料
は炭化珪素、酸化珪素、窒化珪素、炭素のうち、少なく
とも1つを主成分とする材料であることを特徴とする電
子装置もしくは電子装置用部材。
6. The electronic device or the electronic device according to claim 3, wherein the inorganic insulating material is a material containing at least one of silicon carbide, silicon oxide, silicon nitride and carbon as a main component. Equipment member.
【請求項7】リ−ドフレ−ムもしくはそれと同等な機能
を有する電子装置用部材のうち、少なくともワイヤボン
ドをする部分と電子部品と電気的な連結をおこなう部分
とに有機樹脂等の皮膜を形成する工程と、該電子装置用
部材全体を無機絶縁性の材料よりなる皮膜によって覆う
工程と、前記有機樹脂等の皮膜を除去するとともに、そ
の上に存在する前記無機絶縁性皮膜をも除去して、該電
子装置用部材の表面を露出させる工程と、該電子装置用
部材と電子部品とを電気的に連結する工程と、該電子装
置用部材の一部および前記電子部品の全部をモ−ルド材
中に封入する工程とを有することを特徴とする電子装置
の作製方法。
7. A coating of an organic resin or the like is formed on at least a portion to be wire-bonded and a portion electrically connected to an electronic component in a member for an electronic device having a lead frame or a function equivalent thereto. And a step of covering the entire electronic device member with a film made of an inorganic insulating material, and removing the film of the organic resin or the like and also removing the inorganic insulating film present thereon. A step of exposing the surface of the electronic device member, a step of electrically connecting the electronic device member and the electronic component, and a part of the electronic device member and the entire electronic component And a step of encapsulating the material in a material.
【請求項8】リ−ドフレ−ムのステムもしくはそれと同
等な機能を有する電子装置用部材のうち、少なくともワ
イヤボンドをする部分に有機樹脂等の皮膜を形成する工
程と、該電子装置用部材全体を無機絶縁性の材料よりな
る皮膜によって覆う工程と、前記有機樹脂等の皮膜を除
去するとともに、その上に存在する前記無機絶縁性皮膜
をも除去して、該電子装置用部材の表面を露出させる工
程と、該電子装置用部材の下部に電子装置を配置する工
程と、該電子装置用部材と電子部品とを電気的に連結す
る工程と、該電子装置用部材の一部および前記電子部品
の全部をモ−ルド材中に封入する工程とを有することを
特徴とする電子装置の作製方法。
8. A step of forming a film of an organic resin or the like on at least a wire-bonding portion of a lead frame stem or an electronic device member having a function equivalent thereto, and the entire electronic device member. A step of covering the surface of the electronic device member with a film made of an inorganic insulating material, and removing the film of the organic resin or the like and also removing the inorganic insulating film present thereon. The step of placing the electronic device under the electronic device member, the step of electrically connecting the electronic device member and the electronic component, and a part of the electronic device member and the electronic component. And a step of encapsulating all of them in a molding material.
【請求項9】リ−ドフレ−ムのステムもしくはそれと同
等な機能を有する電子装置用部材とリ−ドフレ−ムのダ
イもしくはそれと同等な機能を有する電子装置用部材と
をステムがダイ上に存在し、重なるように配置し、固定
する工程と、ステムのうちの少なくともワイヤボンドす
る部分とダイのうちの少なくとも電子部品と電気的な連
結をおこなうのに必要な部分とに有機樹脂等の皮膜を形
成する工程と、該ステムおよびダイ全体を無機絶縁性の
材料よりなる皮膜によって覆う工程と、前記有機樹脂等
の皮膜を除去するとともに、その上に存在する前記無機
絶縁性皮膜をも除去して、該ステムおよびダイの表面を
露出させる工程と、該ダイ上に電子部品を固着する工程
と、該ステムと電子部品とを電気的に連結する工程と、
該ステムの一部および該ダイと前記電子部品の全部をモ
−ルド材中に封入する工程とを有することを特徴とする
電子装置の作製方法。
9. A stem of a lead frame stem or an electronic device member having a function equivalent thereto and a lead frame die or an electronic device member having a function equivalent thereto is present on the die. Then, the steps of arranging and fixing so as to overlap with each other, and at least a portion of the stem where wire bonding is performed and at least a portion of the die necessary for electrical connection with electronic components are coated with a film such as an organic resin. The step of forming, the step of covering the entire stem and die with a film made of an inorganic insulating material, removing the film of the organic resin or the like, and also removing the inorganic insulating film present thereon. A step of exposing the surface of the stem and the die, a step of fixing an electronic component on the die, and a step of electrically connecting the stem and the electronic component
And a step of encapsulating a part of the stem, the die, and the entire electronic component in a molding material.
【請求項10】リ−ドフレ−ムもしくはそれと同等な機
能を有する電子装置用部材を配置し、固定する工程と、
リ−ドフレ−ムのうちの少なくともワイヤボンドする部
分に有機樹脂等の皮膜を形成する工程と、該リ−ドフレ
−ム全体を無機絶縁性の材料よりなる皮膜によって覆う
工程と、前記有機樹脂等の皮膜を除去するとともに、そ
の上に存在する前記無機絶縁性皮膜をも除去して、該リ
−ドフレ−ムの表面を露出させる工程と、該リ−ドフレ
−ムの下部に電子部品を配置する工程と、該リ−ドフレ
−ムと電子部品とを電気的に連結する工程と、該リ−ド
フレ−ムの一部と前記電子部品の全部をモ−ルド材中に
封入する工程とを有することを特徴とする電子装置の作
製方法。
10. A step of disposing and fixing an electronic device member having a lead frame or a function equivalent thereto,
A step of forming a film of an organic resin or the like on at least a wire-bonding portion of the lead frame; a step of covering the entire lead frame with a film made of an inorganic insulating material; And removing the inorganic insulating film present thereon to expose the surface of the lead frame, and arranging electronic parts under the lead frame. A step of electrically connecting the lead frame and the electronic component, and a step of enclosing a part of the lead frame and the entire electronic component in a molding material. A method for manufacturing an electronic device having:
【請求項11】リ−ドフレ−ムもしくはそれと同等な機
能を有する電子装置用部材の足の部分を液体の有機樹脂
等の中に浸し、液状の有機樹脂を固化することによっ
て、固定する工程と、リ−ドフレ−ムのうちの少なくと
もワイヤボンドする部分に有機樹脂等の皮膜を形成する
工程と、有機樹脂中にある足の部分を除いて該リ−ドフ
レ−ム全体を無機絶縁性の材料よりなる皮膜によって覆
う工程と、前記有機樹脂等の皮膜を除去するとともに、
その上に存在する前記無機絶縁性皮膜をも除去して、該
リ−ドフレ−ムの表面を露出させる工程と、該リ−ドフ
レ−ムの下部に電子部品を配置する工程と、該リ−ドフ
レ−ムと電子部品とを電気的に連結する工程と、該リ−
ドフレ−ムの一部と前記電子部品の全部をモ−ルド材中
に封入する工程とを有することを特徴とする電子装置の
作製方法。
11. A step of fixing a foot frame of an electronic device member having a function equivalent to that of a lead frame by immersing it in a liquid organic resin or the like and solidifying the liquid organic resin. , A step of forming a film of an organic resin or the like on at least the wire-bonded portion of the lead frame, and the entire lead frame except for the foot portion in the organic resin is made of an inorganic insulating material. A step of covering with a film made of, and removing the film of the organic resin or the like,
A step of removing the inorganic insulating film present thereon to expose the surface of the lead frame; a step of disposing an electronic component under the lead frame; A step of electrically connecting the dframe and the electronic component;
A method of manufacturing an electronic device, comprising the step of encapsulating a part of the dframe and the whole of the electronic component in a molding material.
JP3041258A 1988-10-17 1991-02-13 Electronic device member and manufacture thereof Pending JPH0521693A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP3041258A JPH0521693A (en) 1991-02-13 1991-02-13 Electronic device member and manufacture thereof
US07/835,745 US5276351A (en) 1988-10-17 1992-02-13 Electronic device and a manufacturing method for the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3041258A JPH0521693A (en) 1991-02-13 1991-02-13 Electronic device member and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0521693A true JPH0521693A (en) 1993-01-29

Family

ID=12603420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3041258A Pending JPH0521693A (en) 1988-10-17 1991-02-13 Electronic device member and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0521693A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008147589A (en) * 2006-12-13 2008-06-26 Toyota Motor Corp Electronic component
US9018559B2 (en) 2010-04-27 2015-04-28 Sodick Co., Ltd. Automatic wire threader for wire electric discharge machining apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008147589A (en) * 2006-12-13 2008-06-26 Toyota Motor Corp Electronic component
US9018559B2 (en) 2010-04-27 2015-04-28 Sodick Co., Ltd. Automatic wire threader for wire electric discharge machining apparatus

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