JPH05207499A - Digital acc circuit - Google Patents

Abstract

PURPOSE:To make the ACC stable by improving the detection accuracy of a burst amplitude of a digital UV signal with addition of a few circuits. CONSTITUTION:An output of a multiplier 11 receiving a digital UV signal (a) subjected to time division multiplex and a gain signal (d) and multiplying the digital UV signal (a) by a gain signal (d) is inputted to a delay device 12, an output (b) of the multiplier and an output (h) of the delay device 12 delaying the digital UV signal (a) are added by an adder 13, an output (i) of the adder is inputted to an ACC filter 14 to calculate an ACC gain (j) synchronously with a control signal (c) representing a burst period of the digital UV signal (a), the ACC gain (j) and the digital UV signal (a) are inputted to a switch 15, which is selected by a control signal (c) and an output of the switch 15 is used for a gain signal (d) of the multiplier 11. Thus, an accurate square of the burst amplitude is obtained from an output (i) of the adder and the accurate square of the burst amplitude is used to activate an ACC filter 14, then the safe ACC with the accurate amplitude is attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital ACC circuit in a digital color television receiver.

[0002]

2. Description of the Related Art In recent years, the trend toward digitalization in signal processing of television has been increasing with the improvement in image quality and multifunctionality of television receivers. The ACC circuit is regarded as important.

A conventional digital ACC circuit will be described below with reference to FIGS. 2 and 3. FIG. 2 shows a conventional digital AC
It is a block diagram showing a configuration of a C circuit. In FIG.
Reference numeral 21 denotes a multiplier, which inputs the digital UV signal a and the gain signal d and outputs a multiplication output b. Reference numeral 22 denotes an ACC filter, which performs an ACC operation with a control signal c indicating the burst period of the digital UV signal a to calculate a gain signal d.

The operation of the digital ACC circuit thus constructed will be described below with reference to FIG. First,
The digital UV signal a is input to the multiplier 21, is multiplied by the gain signal d having a certain value, and the multiplication result obtained by multiplying the digital UV signal a by the gain signal is output as the multiplication output b. The multiplication output b is input to the ACC filter 22,
The gain signal d is controlled so as to keep the color saturation of the multiplied digital UV signal constant. Also, this A
The CC operation is performed in synchronization with the control signal c indicating the burst period of the digital UV signal a.

FIG. 3 is a block diagram showing the structure of a conventional ACC filter. In FIG. 3, a burst amplitude detector 31 detects the burst amplitude of the multiplication output b of the digital UV signal a by the control signal c. A subtracter 32 subtracts the output e of the burst amplitude detector 31 from the burst amplitude reference value f and outputs a subtraction output g. A low-pass filter 33 inputs the control signal c and the subtraction output g, operates by the control signal c, calculates the gain signal d from the subtraction output g, and outputs the gain signal d. A register 34 outputs a burst amplitude reference value g.

The operation of the digital ACC filter thus constructed will be described below with reference to FIG.
First, the multiplication output b is input to the burst amplitude detector 31. The burst amplitude detector 31 operates by the control signal c,
The amplitude maximum value of the multiplication output b or the amplitude average value of the U component is detected during the period when the control signal c is input, and the output e is output. Output e and burst amplitude reference value f of register 34
Is input to the subtracter 32, the output e is subtracted from the burst amplitude reference value f, and the subtraction output g is output. The subtraction output g is input to the low pass filter 33, and the gain signal d is calculated and output in synchronization with the control signal c.

[0007]

However, in the above configuration, in order to simplify the circuit, not the original amplitude of the burst signal but the maximum amplitude value of the burst portion of the digitized UV signal, or burst and U. Using the phase relationship with the signal, the burst amplitude is detected only from the U component, and several samples in the burst section are averaged to detect the burst amplitude. Therefore, the burst amplitude value thus obtained contains an error, which causes the ACC operation to become unstable.

The present invention has been made in consideration of the above problems, and an object of the present invention is to provide a digital ACC circuit which enables accurate burst amplitude detection and stable ACC by adding a few circuits. It is what

[0009]

In order to solve the above problems, a digital ACC circuit of the present invention inputs a time-division-multiplexed digital UV signal and a gain signal and multiplies the digital UV signal by the gain signal. , A delay device that inputs the output of the multiplier and delays the digital UV signal by half a sample, an adder that adds the output of the multiplier and the output of the delay device, and an input of the adder, and a burst of the digital UV signal An ACC filter that calculates an ACC gain in synchronization with a control signal indicating a period, and a switch that inputs the ACC filter output and a digital UV signal, switches the input according to the control signal, and outputs the gain signal of the multiplier Is.

[0010]

According to the present invention, when the switch input selects the digital UV signal by the control signal, the output of the multiplier outputs the squared value of the digital UV signal. For example, when the U signal is input to the multiplier, the output of the multiplier is the squared value of the U signal. The output of the delay device is the squared value of the V signal. Therefore, UV
The output of the adder for inputting and adding the square value of each of the signals is the square value of the burst amplitude value. The ACC filter inputs the squared value of the burst amplitude value, and if the target squared value of the burst amplitude value is stored in the register that stores the burst amplitude reference value, stable ACC with the accurate burst amplitude value can be obtained. It will be possible.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A digital ACC according to an embodiment of the present invention will be described below.
The circuit will be described with reference to the drawings. FIG. 1 is a block diagram showing a digital ACC circuit according to an embodiment of the present invention. In FIG. 1, reference numeral 11 denotes a multiplier, which inputs the time-division multiplexed digital UV signal a and the gain signal d and outputs a multiplication output b. A delay device 12 delays the multiplication output b by half a sample and outputs a delayed output h. An adder 13 inputs the multiplication output b and the delay output h, adds them, and outputs an addition output i. Reference numeral 14 denotes an ACC filter, which is the same as that shown in FIG. 3, and performs the ACC operation in synchronization with the control signal c indicating the burst period of the digital UV signal to calculate the ACC gain j. 15
Is a switch for digital UV signal a and ACC gain j
, The input is switched by the control signal c, and the gain signal d of the multiplier is output.

The operation of the thus configured digital ACC circuit will be described below with reference to FIGS. 1 and 3. First, the digital UV signal a is input to the multiplier 11, is multiplied by the ACC gain signal d having a certain value, and the multiplication result of the digital UV signal a is output as the multiplication output b. The multiplication output b is input to the delay unit 12 and the adder 13, and the delay unit 12 delays the multiplication output b by half a sample to output a delay output h, which is input to the adder 13. The adder 13 adds the delay output h and the multiplication output b and outputs an addition output i. The addition output i is input to the ACC filter 14, and the ACC filter 14 operates according to the control signal e indicating the burst period of the digital UV signal a, and outputs the ACC gain j. AC
The C gain j and the digital UV signal a are input to the switch 15, the inputs are switched by the control signal c, and the gain signal d of the multiplier is output. This switching is performed by the control signal c
Is on, that is, during the burst period, digital UV
The signal a is selected.

Therefore, the switch 15 is controlled by the control signal c.
When the digital UV signal a is selected, the output b of the multiplier is a value obtained by squaring the digital UV signal a. For example, when the U signal is input to the multiplier 11, the output of the multiplier 11 is the squared value of the U signal. At this time, the multiplication output b delayed by half the sample is output to the output of the delay device 12, so that the delay output h becomes the square value of the V signal. Therefore, the square value of each UV signal is input to the adder 13, and an accurate square value of the burst amplitude value is obtained at the output of the adder 13. Therefore, if the value of the register 34 in FIG. 3 is set to the square value of the target burst amplitude value and the ACC filter 14 is operated by inputting this square value of the accurate burst amplitude value, the accurate burst amplitude value will be obtained. Stable ACC is possible.

[0014]

As described above, according to the present invention, the digital UV signal and the gain signal obtained by demodulating the digital color subcarrier and time-division-multiplexing the U signal and the V signal are input, and the digital UV signal is multiplied by the gain signal. , A delay device for inputting the output of the multiplier to delay the digital UV signal by half a sample, an adder for adding the output of the multiplier and the output of the delay device, and an input of the adder output for inputting the digital UV signal ACC filter that calculates and outputs the ACC gain by the control signal indicating the burst period of
By inputting a signal, switching the input according to a control signal, and using a switch for outputting a gain signal, accurate burst amplitude detection can be performed and stable ACC can be performed by adding a few circuits.

[Brief description of drawings]

FIG. 1 is a block diagram showing a digital ACC circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional digital ACC circuit.

FIG. 3 is a block diagram showing a digital filter in a conventional digital ACC circuit.

[Explanation of symbols]

 11 Multiplier 12 Delay device 13 Adder 14 ACC filter 15 Switch

Claims (1)

[Claims] 1. A multiplier for demodulating a digital color sub-carrier and time-division-multiplexing a U signal and a V signal to input a digital UV signal and a gain signal and multiplying the digital UV signal by the gain signal, and A delay unit for inputting the output and delaying the digital UV signal by half a sample, an adder for adding the output of the multiplier and the output of the delay unit, and an input of the adder output for indicating the burst period of the digital UV signal AC for calculating and outputting ACC gain by control signal
A digital ACC circuit including a C filter, a switch for inputting the output of the ACC filter and the digital UV signal, switching the input by the control signal, and outputting the gain signal.