JPS60188A - Acc circuit - Google Patents

Acc circuit

Info

Publication number
JPS60188A
JPS60188A JP58108209A JP10820983A JPS60188A JP S60188 A JPS60188 A JP S60188A JP 58108209 A JP58108209 A JP 58108209A JP 10820983 A JP10820983 A JP 10820983A JP S60188 A JPS60188 A JP S60188A
Authority
JP
Japan
Prior art keywords
value
bits
circuit
input terminal
stable operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58108209A
Other languages
Japanese (ja)
Other versions
JPH0572798B2 (en
Inventor
Takahisa Tsuchiya
土屋 堯央
Hiroyuki Kita
喜多 宏之
Yutaka Sonoda
豊 園田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP58108209A priority Critical patent/JPS60188A/en
Publication of JPS60188A publication Critical patent/JPS60188A/en
Publication of JPH0572798B2 publication Critical patent/JPH0572798B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/64Circuits for processing colour signals
    • H04N9/68Circuits for processing colour signals for controlling the amplitude of colour signals, e.g. automatic chroma control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To attain stable operation even with less number of bits by detecting the maximum value and the minimum value of a burst part of a digitized chrominance signal and processing them. CONSTITUTION:The digitized chrominance signal from an input terminal 1 is applied to a detecting circuit 2 detecting the maximum and the minimum peak value of the burst period and the detected value is applied to an integration circuit 3. A reference value applied to an input terminal 5 is divided 4 by this integration value. The quotient is applied to a multiplication circuit 6 and multiplied with the chrominance signal from the input terminal 1 and the product is extracted at an output terminal 7. The ACC is conducted in terms of the feedforward system in this way, then the multiplier is decided definitely as an approximated value and stable operation is attained even with less number of bits. Thus, the stable operation is attained even with less number of bits.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、映像信号をデジタル化して処理を行うように
したテレビ受像機に使用されるACC回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an ACC circuit used in a television receiver that digitizes and processes video signals.

背景技術とその問題点 映像信号をデジタル化して処理を行うようにしたテレビ
受像機が提案されている。そのような場合にいわゆるA
CCを行おうとすると、クロマ信号のビット数が少ない
ために正確な制御を行うことができがい。
BACKGROUND ART AND PROBLEMS There have been proposed television receivers that digitize and process video signals. In such cases, the so-called A
When attempting to perform CC, it is difficult to perform accurate control because the number of bits in the chroma signal is small.

すなわち制御の誤差を少なくするためには多くのビット
数が必要となシ、それができない場合にはLSBが常に
変化することによって色飽和度が変化し、画面上でちら
つきとなって見えて【7まう。
In other words, a large number of bits is required to reduce control errors, and if this is not possible, the color saturation changes as the LSB changes constantly, causing flickering on the screen. 7 mau.

発明の目的 本発明はこのような点にかんがみ、ビット数が少なくて
も安定な動作が行われるようにするものである。
OBJECTS OF THE INVENTION In view of these points, the present invention provides stable operation even with a small number of bits.

発明の概要 本発明は、デジタル化されたクロマ信号のバースト部分
の最大値と最小値を検出し、この値を積分し、この積分
値で所定の参照値を除算【7.この商を上記クロマ信号
に乗算するようにしたACC回路であって、これによれ
ばビット数が少なくても安定な動作が行われる。
SUMMARY OF THE INVENTION The present invention detects the maximum and minimum values of a burst portion of a digitized chroma signal, integrates this value, and divides a predetermined reference value by this integral value [7. The ACC circuit multiplies the chroma signal by this quotient, and according to this, stable operation can be performed even if the number of bits is small.

実施例 図において、(1)は例えは8ビツトでデジタル化され
たクロマ信号の供給される入力端子であって、この入力
端子(1)からの信号がバースト期間の最大及び最小の
ピーク値を検出する検出回路(2)K供給され、この検
出された値が積分回路(3)に供給される。この積分値
が除算回路(4)に供給され、この値にて入力端子(5
)に供給される参照値が除算される。
In the embodiment diagram, (1) is an input terminal to which a chroma signal digitized with 8 bits is supplied, and the signal from this input terminal (1) has the maximum and minimum peak values of the burst period. The detected value is supplied to the detection circuit (2) K for detection, and the detected value is supplied to the integration circuit (3). This integral value is supplied to the division circuit (4), and this value is used at the input terminal (5).
) is divided by the reference value supplied.

この商が乗算回路(6)に供給されて入力端子(1)か
らのクロマ信号に乗算され、出力端子(力に取シ出され
る。
This quotient is supplied to a multiplier circuit (6), multiplied by the chroma signal from the input terminal (1), and taken out at the output terminal (power).

この回路において、検出回路(2)からのバースト期間
の最大値と最小値を積分することによシ、クロマ信号の
レベルが検出され、その値で参照値を除算し、この値を
乗算回路(6)の乗数とすることによシ、出力信号のレ
ベルが参照値に等しくされる。
In this circuit, the level of the chroma signal is detected by integrating the maximum and minimum values of the burst period from the detection circuit (2), the reference value is divided by that value, and this value is added to the multiplication circuit ( 6), the level of the output signal is made equal to the reference value.

こうしてACCが行われるわけであるが、この回路によ
ればフィードフォワード式にACCが行われるので、乗
数は近似値として一意的に決定され、ビット数がある程
度少なくても安定した動作となる。
This is how ACC is performed. Since this circuit performs ACC in a feedforward manner, the multiplier is uniquely determined as an approximate value, and stable operation is achieved even if the number of bits is small to some extent.

発明の効果 本発明によれば、ビット数が少なくても安定な動作を行
う仁とができるようになった。
Effects of the Invention According to the present invention, it has become possible to achieve stable operation even with a small number of bits.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一例の構成図でおる。 (1)は入力端子、(2)はバーストピーク値検出回路
、(3)は積分回路、(4)は除算回路、(5)は参照
値の入力端子、(6)は乗算回路、(力は出力端子であ
る。
The figure is a configuration diagram of an example of the present invention. (1) is an input terminal, (2) is a burst peak value detection circuit, (3) is an integration circuit, (4) is a division circuit, (5) is a reference value input terminal, (6) is a multiplication circuit, (power is the output terminal.

Claims (1)

【特許請求の範囲】[Claims] デジタル化されたクロマ信号のバースト部分の最大値と
最小値を検出し、この値を積分し、この積分値で所定の
参照値を除算し、この商を上記クロマ信号に乗算するよ
う圧したACC回路。
The ACC is pressed to detect the maximum and minimum values of the burst portion of the digitized chroma signal, integrate this value, divide a predetermined reference value by this integrated value, and multiply the chroma signal by this quotient. circuit.
JP58108209A 1983-06-16 1983-06-16 Acc circuit Granted JPS60188A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58108209A JPS60188A (en) 1983-06-16 1983-06-16 Acc circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58108209A JPS60188A (en) 1983-06-16 1983-06-16 Acc circuit

Publications (2)

Publication Number Publication Date
JPS60188A true JPS60188A (en) 1985-01-05
JPH0572798B2 JPH0572798B2 (en) 1993-10-13

Family

ID=14478780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58108209A Granted JPS60188A (en) 1983-06-16 1983-06-16 Acc circuit

Country Status (1)

Country Link
JP (1) JPS60188A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62156474U (en) * 1986-03-27 1987-10-05
JPH01277698A (en) * 1988-04-30 1989-11-08 Nippon Ferrofluidics Kk Compound vacuum pump
US5144420A (en) * 1989-08-15 1992-09-01 Sony Corporation Color image processing apparatus that multiplies color difference signals by generated coefficients to achieve saturation control without changing color phase
JPH04336979A (en) * 1991-05-15 1992-11-25 Matsushita Electric Works Ltd Power tool
JPH05104454A (en) * 1991-10-15 1993-04-27 Matsushita Electric Works Ltd Power tool

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62156474U (en) * 1986-03-27 1987-10-05
JPH01277698A (en) * 1988-04-30 1989-11-08 Nippon Ferrofluidics Kk Compound vacuum pump
US5144420A (en) * 1989-08-15 1992-09-01 Sony Corporation Color image processing apparatus that multiplies color difference signals by generated coefficients to achieve saturation control without changing color phase
JPH04336979A (en) * 1991-05-15 1992-11-25 Matsushita Electric Works Ltd Power tool
JPH05104454A (en) * 1991-10-15 1993-04-27 Matsushita Electric Works Ltd Power tool

Also Published As

Publication number Publication date
JPH0572798B2 (en) 1993-10-13

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