JPH05206819A - Semiconductor relay - Google Patents

Abstract

PURPOSE:To stably maintain a conductive state even if an input current becomes large in a semiconductor relay in which a leakage current is caused by light irradiation. CONSTITUTION:In the semiconductor relay which is turned into a low-impedance state when a charging current flows in the gate of an FET 4 for output, and in which a transistor 6 to form the charging path of inter-gate and source accumulated charge is connected between the drain and the gate of the FET 4 for output through a rectifier cell 7, a photovoltaic diode 8 is connected in parallel with a resistor 3 so as to generate photovoltaic, force in a direction to cancel voltage drop which is caused between both the terminals of the resistor 3 by the leakage current to the rectifier cell 7 due to the light irradiation of a light emitting diode 1. Accordingly, even if an input signal is increased, and an optical signal becomes strong, impressed voltage between the gate and the source of the FET 4 for output can be prevented from falling.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor relay using isolation by an optical coupling method.

[0002]

2. Description of the Related Art FIG. 3 is a circuit diagram of a conventional semiconductor relay. The circuit configuration will be described below. Relay input terminals I ₁ and I ₂ to which a series circuit of a signal source X and a resistor R is connected
The light emitting diode 1 is connected between them. This light emitting diode 1 is optically coupled to a photovoltaic diode array 2. The positive electrode of the photovoltaic diode array 2 is a power MOS type output FE via a resistor 3.
It is connected to the gate G of T4, and the negative electrode is the output MO.
It is connected to the source S of SFET4. FET for output
The sort S and the drain D of the depletion type control FET 5 are connected between the gate G and the source S of FIG. The gate G and the source S of the control FET 5 are connected to both ends of the resistor 3. FET for output
A series circuit of the rectifying element 7 and the transistor 6 is connected between the drain D and the gate G of the transistor 4. The base and emitter of the transistor 6 are connected to both ends of the resistor 3. The drain D and the source S of the output FET 4 are connected to the relay output terminals O ₁ and O ₂ , respectively, and the series circuit of the load Z and the DC power source E is connected between the relay output terminals O ₁ and O _2. ing.

The operation of the above circuit will be described below.
First, when there is no input signal from the signal source X, the light emitting diode 1 does not generate an optical signal, so that no photovoltaic power is generated in the photovoltaic diode array 2 and the gate-source of the depletion type control FET 5 is not generated. A bias voltage is not applied to the control FET 5, the control FET 5 is in a conductive state, and the speed-up transistor 6 is in a non-conductive state. Therefore, no bias is applied between the gate and the source of the output FET 4, and the output FET 4 is in a non-conducting state. Next, when an input signal is applied and the optical signal from the light emitting diode 1 is applied to the photovoltaic diode array 2, the photoelectric current from the photovoltaic diode array 2 passes through the resistor 3 and the control FET 5. Flows. Therefore, a voltage is generated across the resistor 3 and the control FET 5
To a high impedance state, and control FET5
The current flowing between the collector and the emitter of the transistor 6 is restricted, and the current flows between the base and the emitter of the transistor 6 to make the collector and the emitter of the transistor 6 conductive. Therefore, the photocurrent from the photovoltaic diode array 2 flows between the gate and the source of the output FET 4, and the current also flows from the DC power source E through the rectifying element 7 and the transistor 6, so that the gate potential of the output FET 4 rises. , The output FET 4 becomes conductive. After that, when the input signal disappears, the photocurrent from the photovoltaic diode array 2 stops flowing and the voltage across the resistor 3 disappears.
The ET5 is turned on, the transistor 6 is returned to the non-conductive state, the accumulated charge between the gate and the source of the output FET4 is discharged through the control FET5, and the drain and the source of the output FET4 are turned off. ..

[0004]

In the above-mentioned conventional example, each element except the light emitting diode 1 and the power MOSFET 4 for output is usually formed on a one-chip semiconductor substrate. Therefore, the incident light from the light emitting diode 1 is applied not only to the photovoltaic diode array 2 but also to other control elements. Therefore, the transistor 6 and the rectifying element 7
When the output FET 4 is turned on because a leakage current due to light irradiation is generated in the high-speed circuit, the leakage current due to light irradiation flows in the direction opposite to the rectifying element 7. Therefore, when the input current becomes large and the incident light becomes strong, the leakage current due to the light irradiation also becomes large and the voltage drop at the resistor 3 also becomes large. Therefore, the voltage applied between the gate and the source of the output FET 4 becomes the voltage obtained by subtracting the voltage drop at the resistor 3 from the photovoltaic power of the photovoltaic diode array 2, and when the incident light is strong, Since the voltage drop is larger than the increase in the photovoltaic voltage of the electromotive force diode array 2, the gate-source voltage of the output FET 4 decreases, and there is a problem that the conduction state cannot be maintained in due course. It was

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an optical coupling type semiconductor relay capable of stably maintaining a conductive state even when an input current increases. To do.

[0006]

In the semiconductor relay according to the present invention, in order to solve the above problems, as shown in FIG. 1, a light emitting diode 1 for generating an optical signal in response to an input signal is provided. A photovoltaic diode array 2 arranged to receive the optical signal of the light emitting diode 1, a resistor 3 connected in series with the photovoltaic diode array 2, and a photovoltaic power of the photovoltaic diode array 2. Is applied between the gate and the source through the resistor 3 to switch between the conducting state and the non-conducting state between the drain and the source.
And a control circuit that forms a discharge path for accumulated charge between the gate and source of the output FET 4, and when a charging current flows to the gate of the output FET 4 separately from the control circuit, a low impedance state is set. , The output FET
In a semiconductor relay to which a speed-up circuit is added, in which a transistor 6 forming a charge path for accumulated charge between the gate and source of 4 is connected between the drain and gate of the output FET 4 via a rectifying element 7 for preventing backflow, When the light from the light emitting diode 1 is incident, the photovoltaic diode 8 for generating a photovoltaic voltage in the direction of canceling the voltage drop generated at both ends of the resistor 3 by the leakage current due to the light irradiation in the speed-up circuit is added to the resistor. It is characterized in that it is connected in parallel with 3.

[0007]

In the present invention, with the above configuration, even if the optical signal from the light emitting diode 1 increases and the leakage current flowing through the transistor 6 and the rectifying element 7 increases,
Since the voltage drop across the resistor 3 due to the leakage current is canceled by the photovoltaic diode 8, it is possible to prevent the applied voltage between the gate and source of the output FET 4 from decreasing.

[0008]

FIG. 1 is a circuit diagram of an embodiment of the present invention. The circuit configuration will be described below. Signal source X and resistance R
The light emitting diode 1 is connected between the relay input terminals I ₁ and I ₂ to which the series circuit of is connected. This light emitting diode 1 is optically coupled to a photovoltaic diode array 2. The positive electrode of the photovoltaic diode array 2 is
It is connected to the gate G of the power MOS type output FET 4 through the resistor 3, and the negative electrode is the output MOSFE.
It is connected to the source S of T4. In this embodiment, the case where the output FET 4 is in the N channel enhancement mode will be described. Gate G of output FET4
Between the source and the source S, a depletion type control FE
The sort S and the drain D of T5 are connected to each other. The gate G and the source S of the control FET 5 are connected to both ends of the resistor 3. At both ends of the resistor 3, a photovoltaic diode 8 is connected with the polarity shown.
A series circuit of a rectifying element 7 and a transistor 6 is connected between the drain D and the gate G of the output FET 4.
The base and emitter of the transistor 6 are connected to both ends of the resistor 3. The drain D and the source S of the output FET 4 are connected to the relay output terminals O ₁ and O ₂ , respectively, and the series circuit of the load Z and the DC power source E is connected between the relay output terminals O ₁ and O _2. ing.

The operation of this embodiment will be described below.
First, when there is no input signal from the signal source X, the light emitting diode 1 does not generate an optical signal, so that no photovoltaic power is generated in the photovoltaic diode array 2 and the gate-source of the depletion type control FET 5 is not generated. A bias voltage is not applied to the control FET 5, the control FET 5 is in a conductive state, and the speed-up transistor 6 is in a non-conductive state. Therefore, no bias is applied between the gate and the source of the output FET 4, and the output FET 4 is in a non-conducting state. Next, when an input signal is applied and the optical signal from the light emitting diode 1 is applied to the photovoltaic diode array 2, the photoelectric current from the photovoltaic diode array 2 passes through the resistor 3 and the control FET 5. Flows. Therefore, a voltage is generated across the resistor 3 and the control FET 5
To a high impedance state, and control FET5
The current flowing between the collector and the emitter of the transistor 6 is restricted, and the current flows between the base and the emitter of the transistor 6 to make the collector and the emitter of the transistor 6 conductive. Therefore, the photocurrent from the photovoltaic diode array 2 flows between the gate and the source of the output FET 4, and the current also flows from the DC power source E through the rectifying element 7 and the transistor 6, so that the gate potential of the output FET 4 rises. , The output FET 4 becomes conductive. After that, when the input signal disappears, the photocurrent from the photovoltaic diode array 2 stops flowing and the voltage across the resistor 3 disappears.
The ET5 is turned on, the transistor 6 is returned to the non-conductive state, the accumulated charge between the gate and the source of the output FET4 is discharged through the control FET5, and the drain and the source of the output FET4 are turned off. ..

In this embodiment, when the input current becomes large and the incident light becomes strong, the light signal from the light emitting diode 1 increases, and this light irradiation increases the leak current flowing through the transistor 6 and the rectifying element 7. However, the voltage drop across the resistor 3 due to the leakage current is canceled by the photovoltaic diode 8. Therefore, even if the input signal increases, it is possible to prevent the applied voltage between the gate and the source of the control FET 4 from decreasing.

FIG. 2 shows the construction of the resistor 3 and the photovoltaic diode 8 used in this embodiment. N-type semiconductor substrate 9
A diffusion resistance 3 made of a P-type impurity diffusion layer is formed on the surface of, and a photovoltaic diode 8 is parasitic between the P-type impurity diffusion layer and the N-type semiconductor substrate 9. .. According to this structure, the photovoltaic diode 8 is arranged in parallel with the resistor 3 without increasing the area of the semiconductor chip.
Can be formed.

[0012]

As described above, in the semiconductor relay circuit using the optical coupling method, as described above, a circuit for accelerating the charging of the gate-source capacitance of the output FET is provided. In order to cancel the voltage drop caused by the leakage current due to the radiated light, which is caused by flowing in the bias resistance of the control FET for accelerating the discharge of the gate-source capacitance of the output FET, it is arranged in parallel with the resistance. Since the photovoltaic diode is connected, there is an effect that the gate-source voltage of the output FET can be prevented from lowering even if the input signal increases and the optical signal becomes stronger.

According to the second aspect of the invention, since the diode formed parasitically when the resistance is formed as a diffusion resistance on the semiconductor substrate is the photovoltaic diode, the area of the semiconductor chip is reduced. There is an effect that a decrease in the gate-source voltage of the output FET can be prevented without increasing the voltage.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a perspective view in which a part of a resistor used in an embodiment of the present invention is cut away.

FIG. 3 is a circuit diagram of a conventional example.

[Explanation of symbols]

 1 Light Emitting Diode 2 Photovoltaic Diode Array 3 Resistor 4 Output FET 5 Control FET 6 Transistor 7 Rectifier 8 Photovoltaic Diode

Front page continuation (72) Inventor Yoshiyuki Sugiura 1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works, Ltd.

Claims (2)

[Claims] 1. A light emitting diode that generates an optical signal in response to an input signal, a photovoltaic diode array arranged to receive the optical signal of the light emitting diode, and a series connection to the photovoltaic diode array. A resistor, an output FET in which the photovoltaic power of the photovoltaic diode array is applied between the gate and the source via the resistor to switch between a conductive state and a non-conductive state between the drain and the source, and the output FET And a control circuit for forming a discharge path of accumulated charge between the gate and the source of the output FET, and when a charging current flows through the gate of the output FET, the impedance of the output FET becomes low, A semiconductor element forming a charge path for the accumulated charge between the gate and the source is connected between the drain and gate of the output FET through a rectifying element for preventing backflow. In a semiconductor relay to which a speed-up circuit is added, when light is incident from a light-emitting diode, a photovoltaic current is generated in a direction in which a leakage current caused by light irradiation in the speed-up circuit cancels a voltage drop generated across the resistor. A semiconductor relay in which a photovoltaic diode is connected in parallel with the resistor. 2. A diode which is parasitically formed when the resistor is formed as a diffused resistor on a semiconductor substrate is the photovoltaic diode.
The semiconductor relay described.