JPH05206202A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH05206202A
JPH05206202A JP30429091A JP30429091A JPH05206202A JP H05206202 A JPH05206202 A JP H05206202A JP 30429091 A JP30429091 A JP 30429091A JP 30429091 A JP30429091 A JP 30429091A JP H05206202 A JPH05206202 A JP H05206202A
Authority
JP
Japan
Prior art keywords
resistance layer
semiconductor chip
insulating film
leads
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30429091A
Other languages
Japanese (ja)
Inventor
Shunichi Karube
俊一 軽部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP30429091A priority Critical patent/JPH05206202A/en
Publication of JPH05206202A publication Critical patent/JPH05206202A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the mounting area of a semiconductor chip, by forming a terminal resistance layer for impedance matching of a transmission line, on a chip carrier. CONSTITUTION:A semiconductor chip 3 to which bumps 4 are joined is mounted on the tips of metal leads 2 protruding on the aperture part lower surface of an insulating film 1 of polyimide based resin or the like. On the upper surface of the insulating film 1, a resistance layer 5 for a terminal resistor which is matched with the characteristic impedance of a transmission line and composed of a thin film or a thick film is formed along the leads 2, and connected with the leads 2 via a through hole 6 formed in the vicinity of the bumps 4. Since the terminal resistor is not constituted as an individual parts, high density mounting can be realized. Since the resistance layer is constituted of a thin film or a thick film, fine working is enabled, and the effect that impedance characteristics or the like can be easily and precisely matched is obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置に関し、特に
チップキャリアに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a chip carrier.

【0002】[0002]

【従来の技術】従来の半導体装置は、図2に示すよう
に、パッケージングされた半導体チップ11をプリント
配線板上に実装し、半導体チップ11と電気的に接続し
たプリント配線板の配線12と並列になるように接続し
て終端用の抵抗13を半導体チップ11とは別部品とし
て取りつけていた。
2. Description of the Related Art In a conventional semiconductor device, as shown in FIG. 2, a packaged semiconductor chip 11 is mounted on a printed wiring board, and wiring 12 of the printed wiring board electrically connected to the semiconductor chip 11 is provided. The resistors 13 for terminating were connected in parallel and mounted as separate parts from the semiconductor chip 11.

【0003】[0003]

【発明が解決しようとする課題】この従来の半導体装置
では、伝送路終端用の抵抗が別部品となっていたため、
組み立てが複雑なうえに、伝送路に含まれるべき伝送波
形の反射防止の終端抵抗のために貴重な配線基板上のス
ペースをとってしまうという問題点があった。
In this conventional semiconductor device, the resistance for terminating the transmission line is a separate component.
There is a problem that the assembly is complicated and a valuable space on the wiring board is taken up by the terminating resistor for preventing reflection of the transmission waveform to be included in the transmission path.

【0004】また、個別部品の抵抗を使用するため、そ
れぞれの抵抗値を精密にあわせ込むのが困難であるとい
う問題があった。
Further, since the resistors of the individual parts are used, it is difficult to precisely match the respective resistance values.

【0005】[0005]

【課題を解決するための手段】本発明の半導体装置は、
中央に開孔部を設けた絶縁フィルムの一方の面に配列し
て設け且つ先端を前記開孔部内に突出した金属リード
と、前記絶縁フィルムの他方の面に設け且つ前記絶縁フ
ィルムに設けたスルーホールを介して前記金属リードと
電気的に接続した抵抗層と、前記金属リードの先端に接
続して装着した半導体チップとを含んで構成される。
The semiconductor device of the present invention comprises:
A metal lead which is arranged on one surface of the insulating film having an opening in the center and whose tip projects into the opening, and a through hole which is provided on the other surface of the insulating film and provided on the insulating film. A resistance layer electrically connected to the metal lead through a hole, and a semiconductor chip connected to the tip of the metal lead and mounted.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0007】図1(a),(b)は本発明の一実施例を
示す平面図及びA−A′線断面図である。
1A and 1B are a plan view and a sectional view taken along the line AA 'showing an embodiment of the present invention.

【0008】図1(a),(b)に示すように、中央に
開孔部を設けたポリイミド系樹脂などの絶縁フィルム1
の下面に配列して先端を絶縁フィルム1の開孔部内に突
出した金属リード2を設けたチップキャリアの金属リー
ド2の先端に半導体チップ3上に設けたバンプ4を接合
した半導体チップ3をチップキャリアに装着する。絶縁
フィルム1の上面にはリード2に沿って形成した薄膜又
は厚膜からなる終端抵抗用の抵抗層5を設け且つ絶縁フ
ィルム1に設けたスルーホール6介して下面の金属リー
ド2と電気的に接続されている。
As shown in FIGS. 1 (a) and 1 (b), an insulating film 1 made of polyimide resin or the like having an opening at the center thereof.
The semiconductor chip 3 in which the bumps 4 provided on the semiconductor chip 3 are bonded to the tips of the metal leads 2 of the chip carrier which are arranged on the lower surface of the Attach it to the carrier. On the upper surface of the insulating film 1, a resistance layer 5 made of a thin film or a thick film formed along the lead 2 for terminating resistance is provided, and electrically connected to the metal lead 2 on the lower surface through a through hole 6 provided in the insulating film 1. It is connected.

【0009】ここで、抵抗層5は、伝送路の特性インピ
ーダンスとマッチングされ、スルーホール6は、伝送路
中の反射の影響を考慮して形成可能なかぎりバンプ4に
近づけて形成されている。
Here, the resistance layer 5 is matched with the characteristic impedance of the transmission line, and the through hole 6 is formed as close to the bump 4 as possible in consideration of the influence of reflection in the transmission line.

【0010】[0010]

【発明の効果】以上説明したように本発明は、チップキ
ャリア上に伝送路のインピーダンスマッチングを目的と
する終端抵抗層を設けているので、半導体チップの実装
時に実装面積を小さくでき、高密度実装を実現できると
いう効果を有する。
As described above, according to the present invention, since the terminating resistance layer for the purpose of impedance matching of the transmission line is provided on the chip carrier, the mounting area can be reduced when mounting the semiconductor chip, and the high density mounting can be achieved. It has an effect that can be realized.

【0011】また、抵抗層は微細加工が容易な薄膜もし
くは厚膜で形成できるので、インピーダンス特性などを
精密に合わせ易いうという効果を有する。
Further, since the resistance layer can be formed of a thin film or a thick film which can be easily microfabricated, it has an effect of facilitating precise adjustment of impedance characteristics and the like.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す平面図及びA−A′線
断面図。
FIG. 1 is a plan view and a sectional view taken along the line AA ′ showing an embodiment of the present invention.

【図2】従来の半導体装置の一例を示す模式的斜視図。FIG. 2 is a schematic perspective view showing an example of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 絶縁フィルム 2 金属リード 3 半導体チップ 4 バンプ 5 抵抗層 6 スルーホール 11 半導体チップ 12 配線 13 抵抗部品 1 Insulating Film 2 Metal Lead 3 Semiconductor Chip 4 Bump 5 Resistive Layer 6 Through Hole 11 Semiconductor Chip 12 Wiring 13 Resistive Component

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 中央に開孔部を設けた絶縁フィルムの一
方の面に配列して設け且つ先端を前記開孔部内に突出し
た金属リードと、前記絶縁フィルムの他方の面に設け且
つ前記絶縁フィルムに設けたスルーホールを介して前記
金属リードと電気的に接続した抵抗層と、前記金属リー
ドの先端に接続して装着した半導体チップとを含むこと
を特徴とする半導体装置。
1. A metal lead which is arranged on one surface of an insulating film having a hole in the center thereof and has a tip protruding into the hole, and a metal lead which is provided on the other surface of the insulating film. A semiconductor device comprising: a resistance layer electrically connected to the metal lead through a through hole provided in a film; and a semiconductor chip connected to and mounted on a tip of the metal lead.
JP30429091A 1991-11-20 1991-11-20 Semiconductor device Withdrawn JPH05206202A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30429091A JPH05206202A (en) 1991-11-20 1991-11-20 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30429091A JPH05206202A (en) 1991-11-20 1991-11-20 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH05206202A true JPH05206202A (en) 1993-08-13

Family

ID=17931256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30429091A Withdrawn JPH05206202A (en) 1991-11-20 1991-11-20 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH05206202A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5889325A (en) * 1996-07-25 1999-03-30 Nec Corporation Semiconductor device and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5889325A (en) * 1996-07-25 1999-03-30 Nec Corporation Semiconductor device and method of manufacturing the same

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990204