JPH0519997B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an integrated device including light-emitting semiconductor elements such as semiconductor lasers and light-emitting diodes used in optical communications, information processing devices, and the like.

(Prior Art and Problems to be Solved by the Invention) Conventionally, devices in which a light-emitting semiconductor device such as a semiconductor laser or a light-emitting diode and a transistor for driving the device are integrated on the same substrate have been designed to reduce stray capacitance and It has the advantage of being smaller, and research and development is actively underway. As shown in the magazine "Applied Physics Letters (APL)" vol. 41126-128, such an integrated device has a semiconductor laser region and a transistor region arranged two-dimensionally on a substrate. Ta.

Because of this structure, conventional integrated devices including light-emitting semiconductor elements require the integration of semiconductor lasers and transistors on a substrate with a relatively large area, and the integration of even more semiconductor lasers and transistors. However, it has the disadvantage that a very large area of the substrate is required and the degree of integration cannot be increased.

An object of the present invention is to eliminate these drawbacks and provide an integrated device including light emitting semiconductor elements with a high degree of integration.

(Means for Solving the Problems) An integrated device including a light emitting semiconductor element of the present invention mainly includes an active layer serving as a light emitting region, and a first conduction type first conduction type having a larger forbidden band width than the active layer. a cladding layer, a second cladding layer of a second conductivity type having a larger forbidden band width than the active layer, a base layer of a first conductivity type in contact with the second cladding layer, and a second cladding layer in contact with the base layer. a conductive type third cladding layer, the active layer is sandwiched between the first cladding layer and the second cladding layer, and the base layer is sandwiched between the second cladding layer and the third cladding layer. The thickness of the base layer is about twice the mean free path of electrons or less, and the doping concentration of the second clad layer and the third clad layer is lower than the doping concentration of the base layer. The second cladding layer and the third cladding layer are substantially entirely depleted in a thermal equilibrium state by lowering the temperature.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of one embodiment of the present invention, and FIG. 2 is an energy band diagram of the main parts of this embodiment. In the figure, 1 is a p-GaAs substrate, 2 is a p-type cladding layer (p-A _xp Ga _1-xp As, x _p =0.2 to 0.8),
3 is an active layer (A _xa Ga _1-xa As, 0≦X _a <X _p ,
X _o , thickness ≦0.5 μm (typically thickness ~0.1 μm), 4
is an n-type cladding layer (n-A _xo Ga _1-xo As, X _o =
0.2 to 0.8, n≦1×10 ¹⁷ cm ^-3 , thickness = 0.2 to 3 μm,
Preferably thickness = 0.5 to 1 μm), 5 is a base layer (p
−A _xb Ga _1-xb As, 0≦x _b ≦1, p≧1×10 ¹⁸ cm
^-3 , thickness 50-200 Å), 6 is emitter layer (n-A
_xe Ga _1-xe As, 0≦x _e ≦0.8, preferably x _e x _o ,
n≦1×10 ¹⁷ cm ^-3 , thickness = 0.2 to 3 μm, preferably thickness = 0.5 to 1 μm), 7 is the cap layer (n-
8 is an n-type electrode, 9 is a p-type electrode, 10 is a p-type electrode, 11 is a stripe region, and 12 is a Fermi level.

In this example, the electron concentration in the emitter layer 6 and the n-type cladding layer 4 is relatively low (n≦1
×10 ¹⁷ cm ^-3 ) and the hole concentration in the base layer 5 is high (p≦1×10 ¹⁸ cm ^-3 ), so the n-type cladding layer 4 and emitter layer 6 are all depleted. Therefore, in a state of thermal equilibrium, the energy band structure is as shown in FIG. 2a. Next, when a bias voltage is applied so that the emitter layer 6 becomes negative and the p-type cladding layer 2 becomes positive, the energy band structure shown in FIG. 2b is obtained. Here, if a positive voltage is applied to the base layer 5 with respect to the emitter layer 6, the second
The energy band structure shown in FIG. c is obtained, and the height of the triangular potential barrier with the base layer 5 as the apex becomes small. Therefore, the electron current passing through the base layer 5 from the emitter layer 6 increases. Conversely, when a negative voltage is applied to the base layer 5 with respect to the emitter, the height of the triangular potential barrier with the base layer 5 at its apex increases, so that the electron current decreases. In this way, the height of the triangular potential barrier with the base layer at its apex can be changed by applying the voltage to the base layer 5, so that the electron current injected into the active layer 3 can be controlled. In addition, since the thickness of the base layer 5 is very thin, about twice the mean free path of electrons, very few electrons lose energy due to lattice scattering and fall into the potential wells of the base layer, and most of the electrons is considered to pass through the base layer 5. Therefore, the mutual conductance of the transistor formed by the n-type cladding layer 4, base layer 5, and emitter layer 6 is very large, and the active layer 3
It is possible to greatly change the current injected into the

In this embodiment, a semiconductor laser consisting of a p-type cladding layer 2, an active layer 3 and an n-type cladding layer 4, and a transistor consisting of an n-type cladding layer 4, a base layer 5 and an emitter layer 6 are arranged in the layer direction. Since it is integrated, the semiconductor laser and the transistor can be integrated in the same area as a normal semiconductor laser. If the structure of this embodiment is adopted, even when a plurality of semiconductor lasers and transistors are integrated, it is possible to implement the device with a high degree of integration.

The manufacturing method of this example will be briefly explained. First, on a p-GaAs substrate 1, a p-type cladding layer 2, an active layer 3, an n-type cladding layer 4, a base layer 5, an emitter layer 6, and a cap layer 7 are successively grown. Next, the stripe area 11 is etched using a photoetching method.
form. Next, an n-type electrode 8 and a p-type electrode 10 are formed. Next, a p-type electrode 9 is formed on the base layer 5 using a lift-off method or the like. As the material for the p-type electrode 9, A is one of the preferable materials since an ohmic electrode can be formed only for the p-type.

In this embodiment, the active layer 3 has a single layer structure, but the active layer in the present invention is not limited to this, and may have a multiple quantum well structure or a multiple structure with a light guide layer. Further, in this example, an electrode was formed on the base layer, but by making light incident on the base layer without forming an electrode, a photodetector-like operation was performed in which the base voltage was changed. The present invention can also be realized by changing the current injected into the light emitting semiconductor element. Further, in this embodiment, a striped semiconductor laser is used as a light emitting semiconductor element, but the present invention is not limited to this and can be applied to an integrated device including any light emitting semiconductor element such as a light emitting diode having a circular electrode. Furthermore, in this example, the material is A.
Although GaAs/GaAs system was used, it is not limited to this.
The present invention can also be realized using other materials such as InGaAsP/InP and InGaAAs/InP.

(Effects of the Invention) As explained above, according to the structure of the present invention,
Since the light emitting semiconductor element and the transistor are arranged to overlap in the layer thickness direction, the light emitting semiconductor element and the transistor can be integrated in the same area as a normal light emitting semiconductor element. Therefore, by adopting the present invention, it is possible to realize an integrated device in which light emitting semiconductor elements and transistors are mounted with a high degree of integration.

[Brief explanation of drawings]

Fig. 1 is a sectional view of an embodiment of the present invention, Fig. 2a
-c are energy band structure diagrams of main parts of the example. In the figure, 1 is a p-GaAs substrate, 2 is a p-type cladding layer, 3 is an active layer, 4 is an n-type cladding layer, and 5 is a p-type cladding layer.
is the base layer, 6 is the emitter layer, 7 is the cap layer,
8 is an n-type electrode, 9 is a p-type electrode, 10 is a p-type electrode,
11 is a stripe region, and 12 is a Fermi level.

Claims (1)

[Claims] 1. An active layer that mainly serves as a light-emitting region, a first cladding layer of a first conduction type that has a larger forbidden band width than the active layer, and a first cladding layer of a second conduction type that has a larger forbidden band width than the active layer. a second cladding layer; a first conductivity type base layer in contact with the second cladding layer;
a third cladding layer of a second conductivity type in contact with the base layer, the active layer is sandwiched between the first cladding layer and the second cladding layer, and the base layer is sandwiched between the second cladding layer and the second cladding layer. and the third cladding layer, and the thickness of the base layer is approximately twice the mean free path of electrons or less,
By making the doping concentration of the second cladding layer and the third cladding layer lower than the doping concentration of the base layer, substantially the entire second cladding layer and the third cladding layer are depleted in a thermal equilibrium state. An integrated device including a light emitting semiconductor element.