JPH05196963A - Liquid crystal element - Google Patents
Liquid crystal elementInfo
- Publication number
- JPH05196963A JPH05196963A JP800492A JP800492A JPH05196963A JP H05196963 A JPH05196963 A JP H05196963A JP 800492 A JP800492 A JP 800492A JP 800492 A JP800492 A JP 800492A JP H05196963 A JPH05196963 A JP H05196963A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- light
- electrode
- electrodes
- pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133512—Light shielding layers, e.g. black matrix
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
Landscapes
- Physics & Mathematics (AREA)
- Liquid Crystal (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、液晶を用いた表示素子
及び光変調素子に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display element and a light modulation element using liquid crystal.
【0002】[0002]
【従来の技術】液晶素子は表示素子もしくは光変調素子
として精力的な研究開発が行われており、現在これを用
いた直視型表示装置が広く用いられているほか、投射型
表示装置などに適用されている。2. Description of the Related Art A liquid crystal element has been actively researched and developed as a display element or a light modulation element, and a direct-view type display device using the liquid crystal element is currently widely used, and also applied to a projection type display device. Has been done.
【0003】液晶素子は一般に相対する2枚の電極板と
これに狭持された液晶材を基本構成要素として持つが、
複数の画素を持つ液晶素子の場合、双方の電極の大きさ
が異なることが多い。特にTFT(薄膜トランジスタ)
などの能動素子をもつ液晶素子では一方の基板(主基
板)に能動素子とこれに接続された画素電極が設けら
れ、他方の基板(対向基板)に一面の共通電極が設けら
れる。A liquid crystal element generally has two electrode plates facing each other and a liquid crystal material sandwiched between the electrode plates as basic constituent elements.
In the case of a liquid crystal element having a plurality of pixels, the sizes of both electrodes are often different. Especially TFT (thin film transistor)
In a liquid crystal element having an active element such as, an active element and a pixel electrode connected thereto are provided on one substrate (main substrate), and a common electrode on one surface is provided on the other substrate (counter substrate).
【0004】図15はTN(ツイスト・ネマチック)液
晶とTFTを用いた一般的な液晶表示装置の画素部を示
したものであり、図16は図15におけるA−A′線で
の断面を示したものである。主基板1101、対向基板
1109にそれぞれ透明な画素電極1108及び対向電
極1110が形成され、その上に配向膜1118が塗布
されており、これらの間にTN液晶材1119が狭持さ
れている。このような素子では画素電極の隙間(境界部
1121)にある液晶材に対して電圧をかけられないた
め、この部分の透過光は制御できない。また画素電極上
でも電場の方向が電極に対して垂直でない外縁部につい
ては液晶層1119に配向異常(ディスクリネーション
等)が発生し、やはり透過光を制御できなくなる。すな
わちこのような素子では電圧を十分与えても境界部11
21及びその近傍の透過光を十分制御できないため、そ
のままでは画素の明暗比の低下や、画像の焼き付き、残
像といった表示不良を生じる。このため通常このような
問題の発生する液晶素子では、画素境界部に何らかの遮
光部が設けられる。例えば図16の対向側遮光部111
1のごとく画素電極外縁部を大きく覆う形で遮光部を設
け、特に配向異常の現れ易い部位についてはその面積を
広げ、透過光を制御できない境界部1121及びその近
傍を画素開口部から隠ぺいすることが行われている(特
開平1−266512号公報)。なお図15,図16に
おいて、1103はゲート電極、1104はゲート絶縁
膜、1105は半導体層、1106はドレイン電極、1
107はソース電極である。FIG. 15 shows a pixel portion of a general liquid crystal display device using a TN (twisted nematic) liquid crystal and a TFT, and FIG. 16 shows a cross section taken along the line AA 'in FIG. It is a thing. A transparent pixel electrode 1108 and a counter electrode 1110 are formed on a main substrate 1101 and a counter substrate 1109, respectively, and an alignment film 1118 is applied thereon, and a TN liquid crystal material 1119 is sandwiched therebetween. In such an element, since a voltage cannot be applied to the liquid crystal material in the gap (boundary portion 1121) between the pixel electrodes, the transmitted light in this portion cannot be controlled. Further, also on the pixel electrode, an abnormal alignment (disclination or the like) occurs in the liquid crystal layer 1119 in the outer edge portion where the direction of the electric field is not perpendicular to the electrode, and the transmitted light cannot be controlled again. That is, in such an element, even if a sufficient voltage is applied, the boundary portion 11
Since the transmitted light of 21 and its vicinity cannot be controlled sufficiently, the display ratio such as a reduction in the light-dark ratio of the pixel, image burn-in, and an afterimage will occur as it is. Therefore, in a liquid crystal element in which such a problem usually occurs, some kind of light shielding portion is provided at the pixel boundary portion. For example, the opposite-side light shielding unit 111 in FIG.
1. A light-shielding portion is provided so as to largely cover the outer edge portion of the pixel electrode as shown in FIG. 1, and the area is enlarged particularly in a portion where an abnormal alignment is likely to appear, and the boundary portion 1121 where transmitted light cannot be controlled and its vicinity are hidden from the pixel opening portion. (Japanese Patent Laid-Open No. 1-266512). 15 and 16, 1103 is a gate electrode, 1104 is a gate insulating film, 1105 is a semiconductor layer, 1106 is a drain electrode, 1
107 is a source electrode.
【0005】また素子の小型化高密度化に応じて開口率
の確保が問題となってくるが、開口率を制限する要因は
遮光部1111の開口面積と画素電極1108の下部に
設けられる蓄積容量電極1102の遮光部面積である。
このうち対向電極1110に設ける遮光部1111は画
素電極1108に対して視野角に相当する張り出し部分
が必要となる。また画素電極に対する位置ずれを考慮し
て予め開口部を狭めなければならないが、主基板上の画
素部に対する対向基板上の遮光部の位置精度は、TFT
を形成する際に用いるフォトリソグラフィに比較して精
度向上が困難な基板張り合わせ工程の位置合わせに精度
に依存しており、開口率低下の原因となっている。この
ため例えば図17,図18のごとく他の電極と絶縁され
た導電性遮光部1117を画素電極と同じ基板上の画素
境界部にフォトリソグラフィを用いて設けることにより
開口率を向上させる方式が考案されている(信学技報V
ol.90 No.431 P.59〜63)。なお、
図18は、図17におけるA−A′線での断面を示した
ものである。Further, as the size and density of the element become higher, securing the aperture ratio becomes a problem, but the factors that limit the aperture ratio are the opening area of the light shielding portion 1111 and the storage capacitance provided below the pixel electrode 1108. The area of the light shielding portion of the electrode 1102.
Of these, the light shielding portion 1111 provided on the counter electrode 1110 needs to have a projecting portion corresponding to the viewing angle with respect to the pixel electrode 1108. In addition, the opening must be narrowed in advance in consideration of the positional deviation with respect to the pixel electrode, but the positional accuracy of the light shielding part on the counter substrate with respect to the pixel part on the main substrate is
It depends on the precision of the alignment in the substrate bonding process, which is difficult to improve the precision as compared with the photolithography used when forming the sapphire, and causes the reduction of the aperture ratio. Therefore, for example, as shown in FIGS. 17 and 18, a method of improving the aperture ratio by providing a conductive light shielding portion 1117 insulated from other electrodes at the pixel boundary portion on the same substrate as the pixel electrode by using photolithography is devised. Has been done (Science Technical Report V
ol. 90 No. 431 P.M. 59-63). In addition,
FIG. 18 shows a cross section taken along the line AA ′ in FIG.
【0006】[0006]
【発明が解決しようとする課題】既に述べたように従来
の素子では画素境界部付近の透過光を十分制御できず、
そのままでは画素の明暗化の低下や、表示不良を生じる
ため、図15のように対向基板上に遮光部を設けてい
る。素子の光利用効率を上げるために高い開口率を実現
しようとすれば、基板張り合わせ工程に高い位置合わせ
精度が要求され、製作が困難となる。従って基板張り合
わせ精度を極端に上げずとも表示品位を落とさずに開口
率を確保できる手段が要求される。As described above, the conventional device cannot sufficiently control the transmitted light in the vicinity of the pixel boundary portion.
If the pixel is left as it is, the brightness of the pixel is deteriorated and a display defect occurs. Therefore, as shown in FIG. 15, a light shielding portion is provided on the counter substrate. If a high aperture ratio is to be achieved in order to improve the light utilization efficiency of the device, a high positioning accuracy is required in the substrate bonding process, which makes manufacturing difficult. Therefore, there is a demand for a means capable of ensuring the aperture ratio without deteriorating the display quality even if the substrate bonding accuracy is not extremely increased.
【0007】能動素子を持った液晶素子の場合、主基板
上に余分の導電層を設けることは能動素子の電気的特性
及び液晶材に与える電界に影響をもたらし、また製造プ
ロセスにおける制約,歩留まり低下につながるため、必
ずしも好ましいとは言えない。加うるに蓄積容量電極は
能動素子をもつ液晶素子において表示性能を向上させ得
る手段であるが、同時に開口率を低下させる原因でもあ
る。In the case of a liquid crystal element having an active element, providing an extra conductive layer on the main substrate affects the electrical characteristics of the active element and the electric field applied to the liquid crystal material, and also restricts the manufacturing process and lowers the yield. Therefore, it is not always preferable. In addition, the storage capacitor electrode is a means for improving display performance in a liquid crystal element having an active element, but at the same time, it is a cause for lowering the aperture ratio.
【0008】本発明は上述の問題点を解決し、画素境界
部の光もれを防ぐと同時に画素電極外縁部に発生する液
晶の配向異常(ディスクリネーション)を隠ぺいするこ
とを、画素開口部を必要以上に狭めることなく、あるい
は基板張り合わせ工程に高い位置合わせ精度を要求する
ことなく実現し、液晶表示装置の表示性能を向上させる
ことを目的とする。The present invention solves the above-mentioned problems and prevents the leakage of light at the pixel boundary portion and at the same time conceals the liquid crystal misalignment (disclination) generated at the outer edge portion of the pixel electrode. It is an object of the present invention to improve the display performance of a liquid crystal display device by realizing the liquid crystal display device without narrowing it more than necessary or without requiring high alignment accuracy in the substrate bonding process.
【0009】[0009]
【課題を解決するための手段】本発明は、画素電極並び
にこれと接続する能動素子及び配線を有する主基板と対
向電極を有する対向基板との間隙に液晶材料が狭持され
た液晶素子において、遮光性蓄積容量電極を前記主基板
上の画素電極外縁部の下部に配したことを特徴とする。The present invention provides a liquid crystal element in which a liquid crystal material is sandwiched in a gap between a main substrate having a pixel electrode and active elements and wirings connected to the pixel electrode and a counter substrate having a counter electrode, The light-shielding storage capacitor electrode is arranged below the outer edge portion of the pixel electrode on the main substrate.
【0010】[0010]
【作用】本発明の構造をとることにより、液晶表示素子
の画素電極外縁部に発生する配向異常を画素開口部から
隠ぺいすることができ、同時に画素開口率を向上するこ
とができる。画素電極上の液晶の配向異常は、画素電極
外縁部に発生する横方向電界が原因となりその近傍に発
生する。図1は本発明の基本構成を示す平面図、図2は
図1においてA−A′線で示した箇所の断面図である
が、画素電極108の外縁部の下部に遮光性蓄積容量電
極102を設けるならば、問題となる配向異常は遮光性
蓄積容量電極102の上に発生することになり、目的と
する遮光効果が得られる。図1,図2においては遮光性
蓄積容量電極102を能動素子の配線(ゲート電極10
3,ドレイン電極106)とは独立したものとして設け
てあるが、隣接する走査電極の一部を遮光性蓄積容量電
極として利用するいわゆるゲートストレージタイプなど
他の形状も考えられる。遮光性蓄積容量電極102は、
その目的から画素電極108と絶縁層113を介してあ
る程度の面積について重なり合う必要があるが、重なり
部分の面積については画素電極内のいずれの箇所に配さ
れても遮光せざるを得ない面積である。このような遮光
性蓄積電極を画素中央部に配した場合には開口率の低下
をまねくが、画素として十分に透過光を制御できない箇
所に配した場合には画素開口部を有効に利用できること
になる。By adopting the structure of the present invention, it is possible to hide the alignment abnormality generated at the outer edge portion of the pixel electrode of the liquid crystal display element from the pixel opening portion, and at the same time improve the pixel opening ratio. The abnormal alignment of the liquid crystal on the pixel electrode is caused by the lateral electric field generated at the outer edge of the pixel electrode and occurs in the vicinity thereof. 1 is a plan view showing the basic structure of the present invention, and FIG. 2 is a cross-sectional view taken along the line AA ′ in FIG. 1. The light-shielding storage capacitor electrode 102 is formed below the outer edge of the pixel electrode 108. If such an arrangement is provided, a problematic alignment abnormality will occur on the light-shielding storage capacitor electrode 102, and the desired light-shielding effect can be obtained. 1 and 2, the light-shielding storage capacitor electrode 102 is connected to the wiring of the active element (gate electrode 10
3, the drain electrode 106) is provided independently, but other shapes such as a so-called gate storage type in which a part of the adjacent scanning electrodes are used as a light-shielding storage capacitor electrode are also conceivable. The light-shielding storage capacitor electrode 102 is
For that purpose, it is necessary to overlap the pixel electrode 108 through the insulating layer 113 for a certain area, but the area of the overlapping portion is an area where light cannot be shielded regardless of where it is arranged in the pixel electrode. .. When such a light-shielding storage electrode is arranged in the central portion of the pixel, the aperture ratio is lowered, but when it is arranged in a portion where the transmitted light cannot be sufficiently controlled as a pixel, the pixel opening portion can be effectively used. Become.
【0011】遮光性蓄積容量電極102の画素電極10
8に対する相対位置は画素電極形成プロセスで決定され
るためパネル製造時に高精度を実現し易い。また画素電
極108の下部に遮光層を配するため、配向異常を隠ぺ
いできるだけの面積があれば十分にその機能を果たし得
る。このため遮光部面積を必要最小限に抑えることがで
き、開口率向上につながる。The pixel electrode 10 of the light-shielding storage capacitor electrode 102
Since the relative position with respect to 8 is determined by the pixel electrode forming process, it is easy to realize high precision during panel manufacturing. Further, since the light-shielding layer is provided below the pixel electrode 108, the function can be sufficiently fulfilled if there is an area capable of concealing the alignment abnormality. For this reason, the area of the light-shielding portion can be suppressed to a necessary minimum, which leads to improvement of the aperture ratio.
【0012】能動素子を主基板上に持つ液晶素子は能動
素子や配線等に他の導電層を近接させることが好ましく
ない、もしくは近接させることができないといった場合
があり、必ずしも主基板上のみに遮光部を設けることは
適当ではない。こうした素子においては図2のごとく遮
光性蓄積容量電極102を主基板上画素電極108の下
部に配し、これと重なるように対向側遮光部111を設
けることにより、画素電極外縁部の配向異常を画素開口
部から隠ぺいすることができる。対向側遮光部111は
能動素子が光に曝されるのを防ぐと共に主基板101上
の構造では塞ぐことができない間隙を塞ぐことができ
る。この時の開口部は対向側遮光部111には依存せ
ず、主基板上の遮光性蓄積容量電極102によって決め
ることができるので、前記従来法のごとく対向側遮光層
の開口部を狭める必要はなく、基板はり合わせ時の位置
合わせ精度もさほど高くする必要がない。In a liquid crystal element having an active element on the main substrate, it may not be desirable or impossible to bring another conductive layer close to the active element, wiring, etc. Providing a section is not appropriate. In such an element, as shown in FIG. 2, the light-shielding storage capacitor electrode 102 is arranged below the pixel electrode 108 on the main substrate, and the opposite-side light-shielding portion 111 is provided so as to overlap with the pixel electrode 108, thereby preventing the abnormal alignment of the outer edge portion of the pixel electrode. It can be hidden from the pixel opening. The opposite-side light-shielding portion 111 can prevent the active element from being exposed to light and can close a gap that cannot be closed by the structure on the main substrate 101. The opening portion at this time does not depend on the opposite side light shielding portion 111 and can be determined by the light shielding storage capacitor electrode 102 on the main substrate. Therefore, it is not necessary to narrow the opening portion of the opposite side light shielding layer as in the conventional method. In addition, it is not necessary to increase the positioning accuracy when the substrates are bonded together.
【0013】[0013]
【実施例】 (実施例1)図3は本発明を適用した液晶素子の一実施
例を示す平面図であり、図4は図3においてA−A′線
で示した箇所の断面図である。主基板となるガラス基板
201にはクロムからなる遮光性蓄積容量電極202、
ゲート電極203、ドレイン電極206、ソース電極2
07、窒化シリコンからなるゲート絶縁膜204、非晶
質シリコンからなる半導体層205、透明なITO(I
ndium TinOxide:酸化インジウム錫)か
らなる画素電極208を形成し、対向基板となるガラス
基板209にはITOからなる対向電極210とクロム
からなる対向側遮光部211を形成した。ここで遮光性
蓄積容量電極202は約6μmの幅を持ち画素電極20
8の外縁部に約5μmの幅で重なりを持っている。対向
側遮光部211はその開口部端部が基板組み合わせ時に
遮光性蓄積容量電極202の外周と内周のほぼ中間に位
置するよう設けられており、基板張り合わせ時に±3μ
mのずれを生じても開口率に影響を与えないようになっ
ている。双方の基板表面にポリイミド配向膜218を塗
布,焼成し、それらを基板張り合わせ時に各基板表面に
おける配向方向が互いにほぼ90°をなすような方向に
配向処理した後、約5μmの間隙を持つよう基板を張り
合わせ、TN液晶材料219を注入、封止して液晶表面
素子を得た。EXAMPLE 1 FIG. 3 is a plan view showing an example of a liquid crystal element to which the present invention is applied, and FIG. 4 is a sectional view taken along the line AA ′ in FIG. .. A glass substrate 201 serving as a main substrate has a light-shielding storage capacitor electrode 202 made of chromium,
Gate electrode 203, drain electrode 206, source electrode 2
07, a gate insulating film 204 made of silicon nitride, a semiconductor layer 205 made of amorphous silicon, and a transparent ITO (I
A pixel electrode 208 made of ndium tin oxide (indium tin oxide) was formed, and a counter electrode 210 made of ITO and a light-shielding portion 211 made of chromium on the opposite side were formed on a glass substrate 209 serving as a counter substrate. Here, the light-shielding storage capacitor electrode 202 has a width of about 6 μm, and has a width of about 6 μm.
The outer edge of No. 8 has an overlap with a width of about 5 μm. The opposite-side light-shielding portion 211 is provided so that its opening end portion is located substantially in the middle between the outer periphery and the inner periphery of the light-shielding storage capacitor electrode 202 when the substrates are combined, and ± 3 μ when the substrates are laminated.
Even if a deviation of m occurs, it does not affect the aperture ratio. A polyimide alignment film 218 is applied to both surfaces of the substrates, baked, and subjected to an alignment treatment such that the alignment directions on the surfaces of the substrates are approximately 90 ° when the substrates are bonded together, and then the substrates are made to have a gap of about 5 μm. Were bonded together, and the TN liquid crystal material 219 was injected and sealed to obtain a liquid crystal surface element.
【0014】かかる素子において各々の電極に駆動電圧
を与えてノーマリホワイトモードにて表示を行ったとこ
ろ、60μmピッチの画素で開口率35%以上、明暗比
200:1以上の鮮明な画像を容易に実現することがで
きた。比較のため従来構造の液晶表示素子を作成して確
認したところ開口率35%では明暗比が10:1以下と
なり、200:1の明暗比を得るためには開口率を10
%以下にまで落とさねばならなかった。When a drive voltage is applied to each electrode in such an element and display is performed in a normally white mode, it is easy to obtain a clear image with a pixel ratio of 60 μm and an aperture ratio of 35% or more and a light-dark ratio of 200: 1 or more. Could be realized. For comparison, when a liquid crystal display device having a conventional structure was manufactured and confirmed, the light-dark ratio was 10: 1 or less when the aperture ratio was 35%, and the aperture ratio was 10 to obtain a light-dark ratio of 200: 1.
I had to drop it to below%.
【0015】図3,図4の実施例では、遮光性蓄積容量
電極202は画素電極208の外縁部を均等かつ全周囲
にわたって重なるよう配されているが、図5のごとく周
囲の一部について本発明を適用しても当該箇所において
は同様の機能を果たす。また図6に示すように配向異常
の発生する箇所はラビングの方向に依存し画素の辺に対
して45°にラビングした場合はラビングの始まる側の
画素電極隅部220にほぼ決まって発生するため、その
箇所について幅を広くした遮光部202を設けることに
より更に効果を高めることができる。In the embodiments of FIGS. 3 and 4, the light-shielding storage capacitor electrode 202 is arranged so that the outer edge portion of the pixel electrode 208 is evenly and entirely overlapped, but as shown in FIG. Even if the invention is applied, the same function is achieved in the relevant part. Further, as shown in FIG. 6, the location where the alignment abnormality occurs depends on the rubbing direction, and when the rubbing is performed at 45 ° with respect to the side of the pixel, it almost always occurs at the pixel electrode corner 220 on the rubbing start side. The effect can be further enhanced by providing the light-shielding portion 202 having a wider width at that portion.
【0016】なお以上の例では画素電極の外周が遮光性
蓄積容量電極の外周よりも内側に示されているが、必ず
しもこれに限る必要はなく、画素電極の外縁部に重なり
が配されておれば遮光性蓄積容量電極の外周は画素電極
の外周に対していかなる位置にあろうとかまわない。In the above example, the outer periphery of the pixel electrode is shown inside the outer periphery of the light-shielding storage capacitor electrode, but the invention is not necessarily limited to this, and an overlap is provided on the outer edge of the pixel electrode. For example, the outer circumference of the light-shielding storage capacitor electrode may be located at any position with respect to the outer circumference of the pixel electrode.
【0017】なおこの例ではゲート,ソース,ドレイ
ン,蓄積容量の各電極材料としてクロムを用いたが適す
る材料はこれに限らず、アルミ,モリブデン等の遮光性
導電対であれば何を用いてもかまわず、また画素電極及
び対向電極の材料は光透過性導電材料であればITOに
限るものではない。In this example, chromium was used as the electrode material for the gate, source, drain, and storage capacitors, but the suitable material is not limited to this, and any light-shielding conductive pair such as aluminum or molybdenum may be used. The material of the pixel electrode and the counter electrode is not limited to ITO as long as it is a light transmissive conductive material.
【0018】(実施例2)図7は本発明を適用した液晶
素子の一実施例を示す平面図であり、図8は図7におい
てA−A′線で示した箇所の断面図である。主基板とな
るガラス基板501には、クロムからなるゲート電極5
03、ドレイン電極506、ソース電極507、窒化シ
リコンからなるゲート絶縁膜504、非晶質シリコンか
らなる半導体層505、ITOからなる画素電極508
を形成し、対向基板となるガラス基板509にはITO
からなる対向電極510とクロムからなる対向側遮光部
511を形成した。ここでは隣接画素のゲート電極50
3の一部が蓄積容量電極として作用するいわゆるゲート
ストレージ構造を有しており、この蓄積容量部が画素電
極508の外縁部に約5μmの幅で重なりを持ってい
る。対向側遮光部511はその開口部端部が基板組み合
わせ時に遮光性蓄積容量部の外端と内端のほぼ中間に位
置するよう設けられている。双方の基板表面にポリイミ
ド配向膜518を塗布,焼成し、配向処理した後、約5
μmの間隙を持つよう基板を張り合わせ、TN液晶材料
519を注入,封止して液晶表示素子を得た。(Embodiment 2) FIG. 7 is a plan view showing an embodiment of a liquid crystal element to which the present invention is applied, and FIG. 8 is a sectional view taken along the line AA 'in FIG. The glass substrate 501 serving as the main substrate has a gate electrode 5 made of chromium.
03, a drain electrode 506, a source electrode 507, a gate insulating film 504 made of silicon nitride, a semiconductor layer 505 made of amorphous silicon, and a pixel electrode 508 made of ITO.
And ITO is formed on the glass substrate 509 serving as a counter substrate.
A counter electrode 510 made of and a counter-side light shielding portion 511 made of chromium were formed. Here, the gate electrode 50 of the adjacent pixel
Part of 3 has a so-called gate storage structure that acts as a storage capacitor electrode, and this storage capacitor portion overlaps the outer edge portion of the pixel electrode 508 with a width of about 5 μm. The opposite-side light-shielding portion 511 is provided so that the end portion of the opening thereof is located substantially in the middle between the outer end and the inner end of the light-shielding storage capacitor portion when the substrates are combined. After the polyimide alignment film 518 is applied to both substrate surfaces, baked, and subjected to alignment treatment, approximately 5
Substrates were bonded together with a gap of μm, TN liquid crystal material 519 was injected and sealed, and a liquid crystal display element was obtained.
【0019】かかる素子において各々の電極に駆動電圧
を与えてノーマリホワイトモードにて表示を行ったとこ
ろ、60μmピッチの画素で開口率37%以上、明暗比
200:1以上の鮮明な画素を容易に実現することがで
きた。When a driving voltage is applied to each electrode in such an element and display is performed in a normally white mode, it is possible to easily obtain a clear pixel with an aperture ratio of 37% or more and a light / dark ratio of 200: 1 or more in a pixel of 60 μm pitch. Could be realized.
【0020】この例ではゲート電極503の遮光性蓄積
容量部は画素電極508の外縁部の一部に重なるよう配
されているが、実施例1と同じく全周囲にわたって重な
るよう設けてもかまわず、また図9に示すように液晶デ
ィスクリネーション発生位置520に応じて部分的に重
なり幅を変えることがより望ましい。なお画素電極の外
縁部に重なりが配されておればゲート電極の遮光性蓄積
容量部の外縁は画素電極の外周に対していかなる位置に
あろうと同様の機能を持つ。In this example, the light-shielding storage capacitor portion of the gate electrode 503 is arranged so as to overlap a part of the outer edge portion of the pixel electrode 508, but it may be provided so as to overlap over the entire circumference as in the first embodiment. Further, as shown in FIG. 9, it is more preferable to partially change the overlapping width according to the liquid crystal disclination generation position 520. If the outer edge of the pixel electrode is overlapped, the outer edge of the light-shielding storage capacitor portion of the gate electrode has the same function regardless of the position of the outer edge of the pixel electrode.
【0021】(実施例3)図10は本発明を適用した液
晶素子の一実施例を示す平面図であり、図11は図10
においてA−A′線で示した箇所の断面図である。主基
板となるガラス基板701にはクロムからなる遮光性蓄
積容量電極702、ゲート電極703、ドレイン電極7
06、ソース電極707、酸化シリコンからなる絶縁層
713、窒化シリコンからなるゲート絶縁膜704、非
晶質シリコンからなる半導体層705、ITOからなる
画素電極708を形成し、対向ガラス基板709にはI
TOからなる対向電極710とクロムからなる対向側遮
光部711を形成した。ここで遮光性蓄積容量電極70
2は画素電極708の外縁部に約5μmの幅で重なりゲ
ート配線及びドレイン配線と約2μm重なっている。対
向側遮光部711はTFTのチャネル部715を遮光す
るよう、チャネル部715の直上から約10μmせりだ
すように設けられている。双方の基板表面にポリイミド
配向膜718を塗布,焼成し、配向処理した後、約5μ
mの間隙を持つよう基板を張り合わせ、TN液晶材料7
19を注入,封止して液晶表示素子を得た。(Embodiment 3) FIG. 10 is a plan view showing an embodiment of a liquid crystal element to which the present invention is applied, and FIG. 11 is shown in FIG.
FIG. 6 is a cross-sectional view taken along the line AA ′ in FIG. A glass substrate 701 serving as a main substrate has a light-shielding storage capacitor electrode 702, a gate electrode 703, and a drain electrode 7 made of chromium.
06, a source electrode 707, an insulating layer 713 made of silicon oxide, a gate insulating film 704 made of silicon nitride, a semiconductor layer 705 made of amorphous silicon, and a pixel electrode 708 made of ITO are formed.
A counter electrode 710 made of TO and a counter side light shield 711 made of chromium were formed. Here, the light-shielding storage capacitor electrode 70
2 overlaps the outer edge of the pixel electrode 708 with a width of about 5 μm and overlaps with the gate wiring and the drain wiring by about 2 μm. The opposite-side light-shielding portion 711 is provided so as to protrude from the channel portion 715 by approximately 10 μm so as to shield the TFT channel portion 715 from light. Approximately 5μ after polyimide alignment film 718 is applied to both substrate surfaces, baked, and subjected to alignment treatment.
TN liquid crystal material 7
19 was injected and sealed to obtain a liquid crystal display element.
【0022】かかる素子において各々の電極に駆動電圧
を与えてノーマリホワイトモードにて表示を行ったとこ
ろ、60μmピッチの画素で開口率36%以上、明暗比
200:1以上の鮮明な画像を容易に実現することがで
きた。When a drive voltage was applied to each electrode in such an element to display in a normally white mode, it was possible to easily obtain a clear image with an aperture ratio of 36% or more and a light / dark ratio of 200: 1 or more in a pixel of 60 μm pitch. Could be realized.
【0023】この例でも実施例1,2と同様に液晶ディ
スクリネーションの発生位置に応じて部分的に重なり幅
を変えることがより望ましい。また遮光性蓄積容量電極
702がゲート配線もしくはドレイン配線の下部にて部
分的あるいは全面的に連結していてかまわない。図12
のごとく遮光性蓄積容量電極702がゲート配線もしく
はドレイン配線と重なりを持たず、その間隙部分に対応
した対向側遮光部711を設けた構造をとることもでき
る。遮光性電極と画素電極外縁部の重なり面積が配向異
常の現れ易い部位だけでは蓄積容量が不十分な場合には
図13のごとくITO等の透明電極材料で蓄積容量電極
712の面積を増やすことにより蓄積容量を補える。In this example as well, it is more desirable to partially change the overlapping width according to the position where liquid crystal disclination occurs, as in the first and second embodiments. Further, the light-shielding storage capacitor electrode 702 may be partially or wholly connected under the gate wiring or the drain wiring. 12
As described above, it is possible to adopt a structure in which the light-shielding storage capacitor electrode 702 does not overlap the gate wiring or the drain wiring, and the opposite-side light-shielding portion 711 corresponding to the gap is provided. When the storage capacitance is insufficient only in the area where the light-shielding electrode and the outer edge of the pixel electrode overlap easily in the orientation, the area of the storage capacitance electrode 712 is increased by a transparent electrode material such as ITO as shown in FIG. Can supplement the storage capacity.
【0024】図14は図10で示した液晶素子に対して
対向側遮光部711を設ける代りにTFTのチャネル部
715に窒化シリコンの絶縁層714を介してアルミニ
ウムからなる遮光層716を設けたものである。このも
のについては基板張り合わせ時の目合わせの必要がな
く、素子作成がより容易となり、遮光性蓄積容量電極7
12により液晶の配向異常が画素開口部より隠ぺいされ
た結果、明暗比150:1以上の鮮明な画像が得られ
た。In FIG. 14, a light shielding layer 716 made of aluminum is provided in the channel portion 715 of the TFT via an insulating layer 714 of silicon nitride instead of providing the light shielding portion 711 on the opposite side to the liquid crystal element shown in FIG. Is. This device does not require alignment at the time of laminating the substrates, which makes it easier to fabricate the device,
As a result of 12, the abnormal alignment of the liquid crystal was hidden from the pixel opening, and as a result, a clear image with a light / dark ratio of 150: 1 or more was obtained.
【0025】以上の例は非晶質シリコンのTFTを用い
たTN液晶素子についてのものであるが、本発明はこれ
に限ることなく、能動素子を用いる液晶素子一般に適用
することが可能であり、スーパー・ホメオトロピックモ
ード等に代表される他の液晶表示モードに対しても適用
可能である。Although the above example relates to a TN liquid crystal element using an amorphous silicon TFT, the present invention is not limited to this, and can be applied to liquid crystal elements using active elements in general, It is also applicable to other liquid crystal display modes such as the super homeotropic mode.
【0026】[0026]
【発明の効果】以上説明した通り、本発明を適用すれ
ば、能動素子を持つ液晶素子において画素境界部の光も
れを防ぎ、且つ画素電極外縁部に発生する液晶の配向異
常(ディスクリネーション)液晶欠陥)を隠ぺいするこ
とが、画素開口部を必要以上に狭めることなく高い位置
合わせ精度で可能となる。このことにより素子の光利用
効率を下げることなく高品位の表示が実現でき、特に液
晶表示素子を小型化高密度化する際に大きな利点とな
る。As described above, according to the present invention, in a liquid crystal element having an active element, light leakage at a pixel boundary portion is prevented, and liquid crystal alignment abnormality (disclination) generated at an outer edge portion of a pixel electrode is prevented. ) Liquid crystal defects) can be concealed with high alignment accuracy without unnecessarily narrowing the pixel opening. As a result, high-quality display can be realized without lowering the light utilization efficiency of the element, which is a great advantage especially when the liquid crystal display element is downsized and the density is increased.
【図1】本発明の液晶素子の基本構成を示す平面図であ
る。FIG. 1 is a plan view showing a basic configuration of a liquid crystal element of the present invention.
【図2】図1のA−A′線断面図である。FIG. 2 is a sectional view taken along the line AA ′ of FIG.
【図3】本発明の一実施例である液晶素子の平面図であ
る。FIG. 3 is a plan view of a liquid crystal element that is an embodiment of the present invention.
【図4】図3のA−A′線断面図である。FIG. 4 is a cross-sectional view taken along the line AA ′ of FIG.
【図5】図3の液晶素子の変形例を示す平面図である。FIG. 5 is a plan view showing a modified example of the liquid crystal element of FIG.
【図6】図3の液晶素子の変形例を示す平面図である。6 is a plan view showing a modified example of the liquid crystal element of FIG.
【図7】本発明の一実施例である液晶素子の平面図であ
る。FIG. 7 is a plan view of a liquid crystal element that is an embodiment of the present invention.
【図8】図7のA−A′線断面図である。8 is a cross-sectional view taken along the line AA ′ of FIG.
【図9】図7の液晶素子の変形例を示す平面図である。9 is a plan view showing a modified example of the liquid crystal element of FIG.
【図10】本発明の一実施例である液晶素子の平面図で
ある。FIG. 10 is a plan view of a liquid crystal element that is an embodiment of the present invention.
【図11】図10のA−A′線断面図である。11 is a cross-sectional view taken along the line AA ′ of FIG.
【図12】図10の液晶素子の変形例を示す平面図であ
る。12 is a plan view showing a modified example of the liquid crystal element of FIG.
【図13】図10の液晶素子の変形例を示す平面図であ
る。13 is a plan view showing a modified example of the liquid crystal element of FIG.
【図14】図10の液晶素子の変形例を示す平面図であ
る。14 is a plan view showing a modified example of the liquid crystal element of FIG.
【図15】従来の液晶素子の平面図である。FIG. 15 is a plan view of a conventional liquid crystal element.
【図16】図15のA−A′線断面図である。16 is a cross-sectional view taken along the line AA ′ of FIG.
【図17】従来の液晶素子の平面図である。FIG. 17 is a plan view of a conventional liquid crystal element.
【図18】図17のA−A′線断面図である。18 is a cross-sectional view taken along the line AA ′ of FIG.
101,201,501,701,1001,1101
主ガラス基板 102,202,302,702,1002,1102
遮光性蓄積容量電極 103,203,503,603,703,1003,
1103 ゲート電極 204,504,704,1104 ゲート絶縁膜 205,505,705,1105 半導体層 106,206,506,706,1106 ドレイン
電極 207,507,707,1107 ソース電極 108,208,508,708,1008,1108
画素電極 109,209,509,709,1009,1109
対向ガラス基板 110,210,510,710,1010,1110
対向電極 211,511,1111 対向側遮光部 712 透光性蓄積容量電極 113,713,1013,1014 絶縁膜 715,1015 チャネル 1016 チャネル遮光部 1217 遮光層 118,218,518,718,1018,1118
配向膜 119,219,519,719,1019,1119
液晶層 220,520 ディスクリネーション発生部位 1121 画素電極境界部 122 TFT101, 201, 501, 701, 1001, 1101
Main glass substrate 102, 202, 302, 702, 1002, 1102
Light-shielding storage capacitor electrodes 103, 203, 503, 603, 703, 1003
1103 gate electrode 204, 504, 704, 1104 gate insulating film 205, 505, 705, 1105 semiconductor layer 106, 206, 506, 706, 1106 drain electrode 207, 507, 707, 1107 source electrode 108, 208, 508, 708, 1008,1108
Pixel electrodes 109, 209, 509, 709, 1009, 1109
Opposing glass substrate 110, 210, 510, 710, 1010, 1110
Opposing electrodes 211, 511, 1111 Opposite-side light-shielding portion 712 Light-transmissive storage capacitor electrode 113, 713, 1013, 1014 Insulating film 715, 1015 Channel 1016 Channel light-shielding portion 1217 Light-shielding layer 118, 218, 518, 718, 1018, 1118
Alignment film 119, 219, 519, 719, 1019, 1119
Liquid crystal layer 220,520 Disclination generation part 1121 Pixel electrode boundary part 122 TFT
Claims (1)
び配線を有する主基板と対向電極を有する対向基板との
間隙に液晶材料が狭持された液晶素子において、遮光性
蓄積容量電極を前記主基板上の画素電極外縁部の下部に
配したことを特徴とする液晶素子。1. A liquid crystal element in which a liquid crystal material is sandwiched in a gap between a main substrate having a pixel electrode, an active element and a wiring connected to the pixel electrode, and a counter substrate having a counter electrode. A liquid crystal element, which is arranged below an outer edge portion of a pixel electrode on a substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP800492A JPH05196963A (en) | 1992-01-21 | 1992-01-21 | Liquid crystal element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP800492A JPH05196963A (en) | 1992-01-21 | 1992-01-21 | Liquid crystal element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05196963A true JPH05196963A (en) | 1993-08-06 |
Family
ID=11681224
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP800492A Pending JPH05196963A (en) | 1992-01-21 | 1992-01-21 | Liquid crystal element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05196963A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0915642A (en) * | 1995-06-29 | 1997-01-17 | Nec Corp | Liquid crystal display device |
JPH10197888A (en) * | 1997-01-08 | 1998-07-31 | Furontetsuku:Kk | Liquid crystal display device and electronic equipment |
KR100282933B1 (en) * | 1993-12-01 | 2001-03-02 | 모리시타 요이찌 | LCD panel and projection display device using same |
JP2009103925A (en) * | 2007-10-23 | 2009-05-14 | Nec Lcd Technologies Ltd | Lateral electric field type active matrix liquid crystal display |
CN103018982A (en) * | 2011-09-22 | 2013-04-03 | 上海中航光电子有限公司 | Horizontally arrayed pixel structure |
CN103135296A (en) * | 2011-11-30 | 2013-06-05 | 上海中航光电子有限公司 | Thin film transistor liquid crystal display (LCD) array substrate |
-
1992
- 1992-01-21 JP JP800492A patent/JPH05196963A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100282933B1 (en) * | 1993-12-01 | 2001-03-02 | 모리시타 요이찌 | LCD panel and projection display device using same |
JPH0915642A (en) * | 1995-06-29 | 1997-01-17 | Nec Corp | Liquid crystal display device |
JPH10197888A (en) * | 1997-01-08 | 1998-07-31 | Furontetsuku:Kk | Liquid crystal display device and electronic equipment |
JP2009103925A (en) * | 2007-10-23 | 2009-05-14 | Nec Lcd Technologies Ltd | Lateral electric field type active matrix liquid crystal display |
CN103018982A (en) * | 2011-09-22 | 2013-04-03 | 上海中航光电子有限公司 | Horizontally arrayed pixel structure |
CN103018982B (en) * | 2011-09-22 | 2016-03-02 | 上海中航光电子有限公司 | Transversely arranged dot structure |
CN103135296A (en) * | 2011-11-30 | 2013-06-05 | 上海中航光电子有限公司 | Thin film transistor liquid crystal display (LCD) array substrate |
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