JPH05191917A - Control method for inactive terminal of current differential protection relay - Google Patents

Control method for inactive terminal of current differential protection relay

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Publication number
JPH05191917A
JPH05191917A JP4021778A JP2177892A JPH05191917A JP H05191917 A JPH05191917 A JP H05191917A JP 4021778 A JP4021778 A JP 4021778A JP 2177892 A JP2177892 A JP 2177892A JP H05191917 A JPH05191917 A JP H05191917A
Authority
JP
Japan
Prior art keywords
relay
circuit
terminal
current differential
determination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4021778A
Other languages
Japanese (ja)
Inventor
Takamichi Sadagami
高通 貞神
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4021778A priority Critical patent/JPH05191917A/en
Publication of JPH05191917A publication Critical patent/JPH05191917A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To disable a breaker to trip unnecessarily when the breaker is activated in a current differential protection relay. CONSTITUTION:A current differential protection relay is provided with an inactive terminal control system at each terminal to protect a multi-terminal transmission line. The relay comprises a first relay 5 which does not any input form an inactive terminal by the inactive terminal control when there is any terminal which is at halt, and then, executes a determination; a second relay 6 which latches inputs from all the terminals irrespective of the presence of any inactive terminals, and then, executes a determination; a circuit 7 which executes an inner determination instantaneously when the first relay 5 and second relay 6 are activated together; and the circuits 9 and 10 which execute an inner determination after a given period of time when the first relay 5 is activated, but the second relay 6 is not activated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電流差動保護継電装置の
休止端制御方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control method for a quiescent end of a current differential protection relay device.

【0002】[0002]

【従来の技術】電流差動リレーは各端子の電流値から事
故点電流を検出するもので、2端子送電線だけでなく、
多端子送電線にも適用できる。そのためには各端子の電
流波形を相手端子へ伝送する必要があり、ディジタルリ
レーシステムでは各端子電流の瞬時値データをディジタ
ル量に変換して符号化し、PCM(Pulse Code Modula-
tion)伝送方向で相手端へ伝送している。このように伝
送されてきた各端子の電流データを収集して判定処理す
るマイクロコンピュータで構成したものがディジタル電
流差動リレーである。このため、送電線各端子でデータ
のサンプリング同期をとって各端子同時刻のデータを抽
出し、このデータを加算することで伝送遅れ補償などの
操作なしに正確な差電流を得られるようにしている。サ
ンプリング同期をとる方法としては、信号端局で発生す
る同期信号をもとに、各端子電流の同時サンプリングを
行なう方式と、サンプリング同期機能をリレー側に内蔵
した方式とがあるが、以下では図6を用いて後者につい
てのみ説明する。
2. Description of the Related Art A current differential relay detects an accident point current from a current value of each terminal, and not only a two-terminal transmission line but also
It can also be applied to multi-terminal transmission lines. For that purpose, it is necessary to transmit the current waveform of each terminal to the other terminal, and in the digital relay system, the instantaneous value data of each terminal current is converted into a digital amount and encoded, and the PCM (Pulse Code Modulator-
transmission) to the other end in the transmission direction. A digital current differential relay is configured by a microcomputer that collects the current data of each terminal transmitted in this way and performs a determination process. For this reason, sampling the data at each terminal of the transmission line to extract the data at the same time on each terminal, and by adding this data, an accurate difference current can be obtained without operations such as transmission delay compensation. There is. There are two methods for sampling synchronization: one that simultaneously samples each terminal current based on the synchronization signal generated at the signal terminal station, and one that has a sampling synchronization function built into the relay side. Only the latter will be described using 6.

【0003】図6において、入力変換器31はA端子の変
流器CT−1を介した系統電気量iL が入力され、アナ
ログ入力ユニット32に導入され、アナログフィルタ33を
介した後サンプル・ホールド回路(S/H)34,アナロ
グ・ディジタル変換器(A/D)35で所定のサンプリン
グ同期毎にディジタルデータに変換され、システムバス
36を介して伝送制御ユニット37及び演算ユニット41へ導
入される。伝送制御ユニット37ではパラレル・シリアル
変換回路(P/S)38により伝送装置を介して相手端へ
データを送信する。相手端のデータは伝送装置を介して
シリアル・パラレル変換回路(S/P)39により受信
し、システムバス36を介して演算ユニット41へ導入され
る。サンプリング同期制御回路(SYNC)40はサンプ
ル・ホールド回路(S/H)34とシリアル・パラレル変
換回路(S/P)39のサンプル同期を合せるよう、サン
プル・ホールド回路(S/H)34のサンプリングタイミ
ングの制御を行なう。演算ユニット41はディジタル変換
器(AD)35のデータとシリアル・パラレル変換器39の
データを加算し、差電流が整定値以上のときしゃ断器C
B−1を引外す指令を出す。
In FIG. 6, an input converter 31 receives a system electric quantity i L via a current transformer CT-1 at an A terminal, is introduced into an analog input unit 32, and is sampled via an analog filter 33. The hold circuit (S / H) 34 and the analog / digital converter (A / D) 35 convert the data into digital data at every predetermined sampling synchronization, and the system bus
It is introduced into the transmission control unit 37 and the arithmetic unit 41 via 36. In the transmission control unit 37, the parallel / serial conversion circuit (P / S) 38 transmits data to the other end via the transmission device. The data at the other end is received by the serial / parallel conversion circuit (S / P) 39 via the transmission device and introduced into the arithmetic unit 41 via the system bus 36. The sampling synchronization control circuit (SYNC) 40 samples the sample and hold circuit (S / H) 34 so that the sample and hold circuit (S / H) 34 and the serial / parallel conversion circuit (S / P) 39 are synchronized with each other. Control timing. The arithmetic unit 41 adds the data of the digital converter (AD) 35 and the data of the serial / parallel converter 39, and when the difference current is the set value or more, the breaker C
Issue a command to trip B-1.

【0004】図7はPCM伝送方式に使用している各端
子の情報を送るための伝送フォーマットで、60Hz系に適
用しているものの一例である。1スーパーフレーム(1
6.67ms )は900 ビットで構成され、1フレーム−75ビ
ットの内訳は、フレーム同期信号6ビット,各端子電流
の瞬時値データ36ビット(12ビットの3相分),制御信
号12ビット(制御信号でしゃ断器の入切情報,点検指令
情報及び同期制御信号等を送っている。)及びCRCチ
ェック信号(Cyclic Redandancy Check )により構成さ
れている。CRCチェック信号は通信関連で符号誤りを
検出するため一般的に使用されている方式で、本例では
受信信号の誤りを検出し、ビットの単発不良を確実に検
出させるようにしている。又、制御信号ではフレーム同
期及びサンプリング同期の制御をすると共に、同期がと
れていないときは不良検出を行なっている。上記CRC
チェックで符号誤り又は同期不良を検出したときは受信
データ不良と判定し、装置ロック及び警報表示を行なう
のが一般的である。又、電源を切にした場合も上記制御
信号を送れないため受信データ不良と判定される。
FIG. 7 shows a transmission format for transmitting information of each terminal used in the PCM transmission system, which is an example applied to the 60 Hz system. 1 super frame (1
6.67ms) consists of 900 bits. 1 frame-75 bits consists of 6 bits for frame sync signal, 36 bits for instantaneous value data of each terminal current (12 bits for 3 phases), 12 bits for control signal (control signal) It sends on / off information of the circuit breaker, inspection command information, synchronization control signal, etc.) and a CRC check signal (Cyclic Redandancy Check). The CRC check signal is a method generally used for detecting a code error in communication. In this example, an error in a received signal is detected, and a single-shot failure of a bit is surely detected. Further, the control signal controls the frame synchronization and the sampling synchronization, and detects the defect when the synchronization is not achieved. CRC above
When a code error or synchronization failure is detected in the check, it is generally determined that the received data is bad, and the device is locked and an alarm is displayed. Further, even when the power is turned off, the control signal cannot be sent, so that the received data is determined to be defective.

【0005】図8は従来から実施している休止端制御回
路でA端子の場合について示している。12はCF検出回
路(受信データ不良検出回路)、13はB端のCB(しゃ
断器)切検出回路、14及び15はNOT回路で、CF検出
回路12が不良検出したときNOT回路14は出力0、CB
切検出回路13が切検出したときNOT回路15は出力0と
なる。16及び17はAND回路で、NOT回路14の出力1
のとき、CB切検出回路13が切検出したときはAND回
路16が出力1、又、切検出しないときはAND回路17が
出力1となる。18はF/F回路(フリップフロップ回
路)で入力端子Sが1,Rが0のとき出力端子Qは出力
1となりB端休止と判定する。入力端子Sが0,Rが1
のとき出力端子Qは出力0となりB端運用と判定する。
又、入力端子S,Rともに0のときは出力端子Qは前値
保持となっている。3はB端電流零制御条件でF/F回
路18のQの出力1のときはB端休止と判定し、B端の受
信電流データを零に制御する。19はNOT回路でF/F
18のQの出力1のとき出力0となる。20はAND回路で
CF検出回路12が検出し、及びB端運用中でF/F回路
18の出力0のとき出力1となる。21は伝送不良検出回路
で、B端の受信データ不良のときAND回路20の出力1
となると伝送不良と判定し装置ロックを行なう。
FIG. 8 shows the case of the terminal A in a conventional pause end control circuit. 12 is a CF detection circuit (received data defect detection circuit), 13 is a CB (breaker) disconnection detection circuit at the B end, 14 and 15 are NOT circuits, and when the CF detection circuit 12 detects a defect, the NOT circuit 14 outputs 0 , CB
When the disconnection detection circuit 13 detects the disconnection, the NOT circuit 15 outputs 0. 16 and 17 are AND circuits, the output 1 of the NOT circuit 14
In this case, the AND circuit 16 outputs 1 when the CB disconnection detection circuit 13 detects disconnection, and the AND circuit 17 outputs 1 when disconnection is not detected. Reference numeral 18 is an F / F circuit (flip-flop circuit). When the input terminal S is 1 and R is 0, the output terminal Q is output 1 and it is determined that the B terminal is idle. Input terminal S is 0, R is 1
In this case, the output terminal Q becomes output 0 and it is determined that the terminal B is in operation.
When both the input terminals S and R are 0, the output terminal Q holds the previous value. 3 is a B terminal current zero control condition, and when the Q output 1 of the F / F circuit 18 is 1, it is judged that the B terminal is idle, and the B terminal received current data is controlled to zero. 19 is a NOT circuit F / F
When the output of Q of 18 is 1, the output becomes 0. Reference numeral 20 is an AND circuit, which is detected by the CF detection circuit 12, and is in operation at the B end, and is an F / F circuit.
When the output of 18 is 0, the output is 1. Reference numeral 21 is a transmission failure detection circuit, which outputs 1 from the AND circuit 20 when the reception data at the B end is defective.
If so, it is determined that the transmission is defective and the device is locked.

【0006】図9は従来の内部判定回路で、A端子の場
合について示している。1は図6のアナログ入力ユニッ
ト32を介して取り込まれたA端電流入力Ia 、2はB端
から伝送され、伝送制御ユニット37を介して取り込まれ
たB端電流入力Ib 、3は図8のB端電流零制御条件で
B端休止と判定したとき条件が成立する。4はB端電流
入力Ib の切換制御回路で、B端運用中はB端電流入力
b を制御せず切換制御された出力Ib OはIb と同じ
である。B端休止のとき3のB端電流零制御条件が成立
すると、切換制御回路4ではB端電流入力Ib を零に制
御する。このため出力Ib Oは零となる。5は電流差動
リレーで、Ia とIb Oを取り込み差動原理により内部
事故判定を行なう。ここで電流差動リレーの判定式につ
いて説明する。実際は比率特性及び位相特性を考慮して
いるが、本発明では特に関係ないため省略する。 (電流差動リレーの判定式) Ia +Ib O>Ik のとき内部事故判定 Ia +Ib O<Ik のときは外部事故又は平常時と判定 ここでIk は検出感度で予め整定された定数。 上記よりB端運用中はIb とIb Oの大きさは同じであ
るが、B端休止のときは切換制御回路4によりIb Oが
零に制御されるため電流差動リレー5へはIa のみが入
力されることになる。
FIG. 9 shows a conventional internal determination circuit for the A terminal. 1 is an A-terminal current input I a taken in through the analog input unit 32 of FIG. 6, 2 is transmitted from the B-terminal, and B-terminal current input I b taken in through the transmission control unit 37 is 3 The condition is satisfied when it is determined that the B end is stopped under the B end current zero control condition of No. 8. 4 is a switching control circuit of the B-end current input I b, in the B-end operational output I b O which is switching control without controlling the B-end current input I b is the same as I b. When the B-terminal current zero control condition 3 in the B-terminal pause is satisfied, the switching control circuit 4 controls the B-terminal current input I b to zero. Therefore, the output I b O becomes zero. 5 is a current differential relay, performs internal fault determined by differential principle captures I a and I b O. Here, the determination formula of the current differential relay will be described. Actually, the ratio characteristic and the phase characteristic are taken into consideration, but they are omitted here because they are not particularly relevant in the present invention. (Determination expression of the current differential relay) I a + I b O> internal fault determination I a + I b O <pre settles I k detection sensitivity here determined when an external fault or normal when the I k when I k The given constant. From the above, the sizes of I b and I b O are the same during the operation at the B end, but when the B end is idle, the switching control circuit 4 controls the I b O to zero, so that the current differential relay 5 is not supplied. Only I a will be input.

【0007】[0007]

【発明が解決しようとする課題】図10は従来技術の問題
点を説明するための図である。図10(a) は両端CB入の
とき保護区間内部に事故が発生した場合である。事故電
流IA ,IB は事故点Fへ流れ込むようになる。このと
き図9の電流差動リレー5にはCT−1,2を介した両
端の電流Ia ,Ib が取り込まれる。Ia ,Ib は両方
共内部方向に流れ込んでいるため、差動電流はIa とI
b が加算された値となったときIa +Ib >Ik とな
り、電流差動リレー5が内部事故判定を行なって動作出
力を出す。図10(b) はA端CB入でB端CB切状態の場
合である。このとき電流(潮流)IA ,IB は流れず、
差動電流Ia ,Ib O共に零となるため、Ia +Ib
<Ik となり、電流差動リレー5は不動作となる。図10
(c) は図10(b) の状態からB端CB入操作を行なった場
合である。通常両端共CB入状態であれば休止制御は行
なわれないため、図9の電流差動リレー5には両端の入
力が取り込まれる。このときIa に対しIb Oは逆位相
となるため、Ia +Ib Oは零となって電流差動リレー
5は不動作となる。ところが図10(c) のように図10(b)
の状態からB端CB入操作を行なった直後は、図11のタ
イムチャートのように、B端CB入からB端休止制御が
解除されるまで時間遅れを生じる。これはCBの主コン
タクト入からCB補助パレット入までの時間遅れと保護
装置が取り込むための処理時間を要するためである。こ
のためB端CB入により送電線に夫々IA ,IB の電流
(潮流又は外部事故電流)が流出るが、B端休止制御解
除に時間遅れが生じるため、この間は電流差動リレー5
にA端のIa の入力のみが取り込まれる。このときIa
の大きさがIk を越えていれば電流差動リレー5は動作
出力を出す。
FIG. 10 is a diagram for explaining the problems of the prior art. Fig. 10 (a) shows the case where an accident occurred inside the protection section when both ends were in the CB. The accident currents I A and I B will flow into the accident point F. At this time, the currents I a and I b at both ends are taken into the current differential relay 5 of FIG. 9 via CT-1 and CT-2. Since both I a and I b are flowing inward, the differential currents are I a and I
When b becomes the added value, I a + I b > I k , and the current differential relay 5 makes an internal accident determination and outputs an operation output. FIG. 10 (b) shows the case where the A end CB is inserted and the B end CB is turned off. At this time, currents (tidal currents) I A and I B do not flow,
Since both the differential currents I a and I b O become zero, I a + I b O
<I k , and the current differential relay 5 does not operate. Figure 10
(c) is a case where the B end CB insertion operation is performed from the state of FIG. 10 (b). Normally, if both ends are in the CB on state, the pause control is not performed, so that the current differential relay 5 in FIG. Since for this case I a a I b O reverse phase, current differential relay 5 becomes I a + I b O is zero becomes inoperative. However, as shown in Fig. 10 (c), Fig. 10 (b)
Immediately after the B end CB input operation is performed in the state of, a time delay occurs from the B end CB input until the B end suspension control is released, as shown in the time chart of FIG. This is because there is a time delay from the entry of the CB main contact to the entry of the CB auxiliary pallet and the processing time for the protection device to take in. For this reason, the currents I A and I B (tidal current or external fault current) flow into the power transmission line due to the input of the CB at the B end.
Only the input of I a at the A end is taken in. At this time I a
Is larger than I k , the current differential relay 5 outputs an operation output.

【0008】たとえB端CB入の直後に電流差動リレー
5が動作出力を出しても、保護装置にはフェイルセーフ
リレーが設けてあり、この両方の動作出力がANDで成
立したときCBの引外しをするよう考慮しているため、
直ちにトリップには継らない。しかし、このとき外部事
故の発生が重なるか、又はB端母線電圧無しの場合はフ
ェイルセーフリレーも動作しているため、不要にCBを
引外すことになる。特に重要送電線には通常自動再閉路
機能が設けられており、送電線の事故除去後、極力速く
CBを投入することで系統の連けいを保ち、電力の供給
障害をなくするよう考慮されている。しかし、自動再閉
路でCBを投入するときは、雷が送電線に落ちるような
天候状態の場合であり、前述のCB入のとき、外部事故
の発生との重なりが懸念される。なお且つ雷で他送電線
に事故が発生していることが考えられる。供給障害をな
くするためこの状況での不要なCBの引外しは許容でき
ない。本発明は上記問題点を解決するためなされたもの
であり、CB入のとき不要にCBの引外しを行なわない
よう考慮した電流差動保護継電装置の休止端制御方式を
提供することを目的としている。
Even if the current differential relay 5 outputs an operation output immediately after the B terminal CB is turned on, a fail-safe relay is provided in the protection device. When both operation outputs are ANDed, CB is pulled. Because I am considering to remove it,
Don't immediately follow the trip. However, if an external accident occurs at this time, or if there is no B-terminal bus voltage, the fail-safe relay is also operating, so CB is unnecessarily tripped. Especially important transmission lines are usually provided with an automatic reclosing function, and it is considered that the CB is turned on as quickly as possible after the accident of the transmission lines is eliminated to maintain the continuity of the grid and eliminate the power supply failure. .. However, when the CB is turned on by the automatic reclosing circuit, it is in a weather condition such that lightning falls on the power transmission line, and when the CB is turned on, there is a concern that it may overlap with the occurrence of an external accident. Furthermore, it is possible that an accident occurred on another transmission line due to lightning. Unnecessary tripping of the CB in this situation is unacceptable to eliminate supply disruption. The present invention has been made to solve the above problems, and an object of the present invention is to provide a dormant end control system for a current differential protection relay device in consideration of avoiding unnecessary tripping of CB when CB is turned on. I am trying.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するた
め、本発明は多端子送電線を保護するために各端子に設
けた電流差動リレーの休止端制御方式において、休止端
の端子がある場合は、休止端制御により休止端の入力を
取り込まず判定を行なう第1のリレーと、休止端の有り
無しに拘らず休止端制御を行なわず全端子の入力を取り
込んで判定を行なう第2のリレーで構成され、第1のリ
レーと第2のリレーが共に動作の場合は瞬時に内部判定
を行ない、第1のリレーが動作で第2のリレーが不動作
の場合は、一定時間後内部判定を行なうようにした。
In order to achieve the above-mentioned object, the present invention is a system for controlling a quiescent end of a current differential relay provided at each terminal in order to protect a multi-terminal transmission line. In this case, the first relay that makes a decision without taking in the input of the pause end by the pause end control and the second relay that makes a decision by taking inputs of all terminals without performing the pause end control regardless of the presence or absence of the pause end. It is composed of relays, and when the first relay and the second relay are both operating, it makes an internal determination instantly, and when the first relay is operating and the second relay is not operating, it makes an internal determination after a certain period of time. To do.

【作用】CB入の直後の内部事故時は瞬時に内部事故判
定を行ない、外部事故時は休止端解除される一定時間後
内部判定を行なうことでCB入の直後の外部事故でも不
要なCBの引外しを防止できるようになった。
[Function] When an internal accident immediately after entering the CB, the internal accident is instantly judged, and at the time of an external accident, the internal judgment is made after a certain period of time when the rest end is released. It has become possible to prevent tripping.

【0010】[0010]

【実施例】以下図面を参照して実施例を説明する。図1
は本発明による電流差動保護継電装置の休止端制御方式
を説明する一実施例の構成図である。図1において、図
9と同一部分については同一符号を付して説明を省略す
る。図において、6は今回付加された電流差動リレーで
A端及びB端各電流入力1,2に直接接続され、その出
力の一方はAND回路7と、又、他方はNOT回路8へ
接続される。又、AND回路7の他方の入力としては電
流差動リレー6の出力が入力され、更にAND回路9の
他方の入力として電流差動リレー5の出力が入力され
る。そしてAND回路9の出力は限時動作回路10を介し
てOR回路11に入力されると同時に、AND回路7の出
力もOR回路11に入力される。OR回路11の出力は内部
事故判定出力となる。上記した電流差動リレー6の判定
式は既に説明した電流差動リレー5と同じとしている。
又、限時動作回路10の限時は、B端CB入からB端休止
解除が行なわれる時間以上とする。
Embodiments will be described below with reference to the drawings. Figure 1
FIG. 3 is a configuration diagram of an embodiment for explaining a dormant end control system of a current differential protection relay device according to the present invention. In FIG. 1, the same parts as those in FIG. 9 are designated by the same reference numerals and the description thereof will be omitted. In the figure, 6 is a current differential relay added this time, which is directly connected to the current inputs 1 and 2 at the A and B ends, and one of the outputs is connected to an AND circuit 7 and the other to a NOT circuit 8. It The output of the current differential relay 6 is input to the other input of the AND circuit 7, and the output of the current differential relay 5 is input to the other input of the AND circuit 9. The output of the AND circuit 9 is input to the OR circuit 11 via the time delay operation circuit 10, and at the same time, the output of the AND circuit 7 is also input to the OR circuit 11. The output of the OR circuit 11 becomes the internal accident determination output. The determination formula of the current differential relay 6 described above is the same as that of the current differential relay 5 already described.
Further, the time limit of the time delay operation circuit 10 is set to be longer than the time from when the B terminal CB is input to when the B terminal pause is released.

【0011】図2は動作説明のためのタイムチャートで
ある。図10(a),(b) の動作は図9と同様であるため省略
し、図10(b) の状態からB端CB入操作を行なった直後
について説明する。既に従来技術で説明したように、C
Bの主コンタクト入からB端休止解除まで時間遅れが生
ずるため、電流差動リレー5がA端IA 入力のみを取り
込んで動作出力を出しても、電流差動リレー6にはB端
休止に関係なく、IA とIB の入力が取り込まれてい
る。ここでIA に対してIB が逆位相の状態であれば、
不動作のままとなっている。このため、AND回路7は
成立せず、AND回路9により限時動作回路10が起動さ
れるが、限時動作回路10がタイムアップ前にB端休止解
除されるため電流差動リレー5が復帰してAND回路9
が成立せず、内部事故判定は行なわれない。本発明の回
路の中で限時動作回路10により一定時間後内部判定され
るのは、図3のようにB端子のCBがCTより母線側に
配置されている場合、CBとCTの間に事故が発生した
ときにも、A端子のCBを引外さないと事故除去ができ
ないためである。ゆえに図3のようにCBがCTより母
線側に配置されることを考慮する必要がない場合は図1
の符号8〜11の回路を省略することが可能である。
FIG. 2 is a time chart for explaining the operation. The operations of FIGS. 10 (a) and 10 (b) are omitted because they are similar to those of FIG. 9, and a description will be given immediately after the B end CB insertion operation is performed from the state of FIG. 10 (b). As already explained in the prior art, C
Since there is a time delay from the main contact input of B to the release of the B end stop, even if the current differential relay 5 takes in only the A end I A input and outputs the operation output, the current differential relay 6 is set to the B end stop. Inputs of I A and I B are taken in regardless. Here, if I B has a phase opposite to I A ,
It remains inoperative. Therefore, the AND circuit 7 is not established, and the time delay operation circuit 10 is started by the AND circuit 9, but the current differential relay 5 is restored because the time delay operation circuit 10 is released from the B end stop before the time is up. AND circuit 9
Is not established, no internal accident judgment is made. In the circuit of the present invention, the time-delay operation circuit 10 internally determines after a certain time that if the CB of the B terminal is arranged on the bus bar side of CT as shown in FIG. 3, an accident occurs between CB and CT. This is because even if the occurrence occurs, the accident cannot be removed without removing the CB of the A terminal. Therefore, as shown in FIG. 3, when it is not necessary to consider that CB is arranged on the bus side from CT,
It is possible to omit the circuits of reference numerals 8 to 11.

【0012】図4は他の実施例の構成図であり、図4に
おいて図9と同一部分については同一符号を付して説明
を省略する。本実施例ではCB入の直後の内部事故時は
瞬時に内部事故判定を行ない、外部事故時は休止端解除
される一定時間後に内部判定しようとするものである。
AND回路15には従来装置の入力以外に、電流零制御3
から限時動作復帰回路13とNOT回路14を介した出力が
入力される。又、AND回路16には電流差動リレー6と
B端正常運転中12と電流零制御3の出力とが入力され
る。なお、各AND回路15,7,16の出力はOR回路17
を介して内部事故判定出力となる。したがって、電流差
動リレー5と6が両方とも内部判定して動作すると、A
ND回路7の条件が成立し、瞬時に内部事故判定をす
る。又、電流差動リレー5が動作,電流差動リレー6が
不動作のときは、B端電流零制御条件3が解除されてか
ら、限時動作復帰回路13の一定時限経過したとき、AN
D回路15によりOR回路17を介して内部事故判定をす
る。上記構成により図10(a),(b) の場合は図9の場合と
同じ動作をする。このことは図5のタイムチャートから
明らかである。
FIG. 4 is a block diagram of another embodiment. In FIG. 4, the same parts as in FIG. In this embodiment, an internal accident determination is instantaneously performed when an internal accident occurs immediately after the CB is entered, and when an external accident occurs, an internal determination is made after a certain time after the suspension edge is released.
In addition to the input of the conventional device, the AND circuit 15 has a current zero control 3
Is input from the delay time operation recovery circuit 13 and the NOT circuit 14. Further, the AND circuit 16 receives the current differential relay 6, the B-side normal operation 12 and the output of the current zero control 3. The output of each AND circuit 15, 7, 16 is the OR circuit 17
It becomes an internal accident judgment output via. Therefore, if both the current differential relays 5 and 6 operate by making an internal judgment, A
The condition of the ND circuit 7 is satisfied, and the internal accident is instantly judged. Further, when the current differential relay 5 is operating and the current differential relay 6 is not operating, when the fixed time period of the time delay operation recovery circuit 13 has passed since the B-terminal zero current control condition 3 was canceled, AN
The D circuit 15 determines an internal accident via the OR circuit 17. With the above configuration, in the case of FIGS. 10A and 10B, the same operation as in the case of FIG. 9 is performed. This is clear from the time chart of FIG.

【0013】次に従来装置で問題となっていた図10(b)
の状態からB端CB入操作を行なった直後については以
下のようになる。即ち、CBの主コンタクト入からB端
休止解除まで時間遅れが生じ、電流差動リレー5がA端
a 入力のみ取り込んで動作出力を出しても、電流差動
リレー6にはB端休止に無関係なIa とIb の入力が取
り込まれているため、Ia に対しIb が逆位相の状態で
あれば不動作のままとなっている。このためAND回路
7は成立しない。又、AND回路15においてもB端休止
解除してから限時動作復帰回路13の復帰時限の間は、N
OT回路14によりロックされ、その後B端休止解除され
るときは電流差動リレー5も復帰するため、AND回路
15は成立せず、内部事故判定も行なわれない。なお、限
時動作復帰回路13の復帰時限は電流差動リレー5の復帰
時限と協調をとるようにしている。
Next, FIG. 10 (b), which is a problem in the conventional device
Immediately after performing the B end CB entry operation from the state of, the following is performed. That is, even if a time delay occurs from the main contact of the CB to the release of the B end suspension, even if the current differential relay 5 takes in only the A end I a input and outputs the operation output, the current differential relay 6 is in the B end suspension. since the input unrelated I a and I b are taken, stuck in the inoperative if the state of the I b antiphase to I a. Therefore, the AND circuit 7 does not work. Further, in the AND circuit 15 as well, N is set during the recovery time limit of the time-delaying operation recovery circuit 13 after canceling the pause at the B end.
When locked by the OT circuit 14 and then released from the B end stop, the current differential relay 5 also recovers, so the AND circuit
15 is not established and no internal accident judgment is made. The time limit of the time delay operation recovery circuit 13 is coordinated with the time limit of the current differential relay 5.

【0014】図3のF点に事故が発生したときは電流差
動リレー5,6共不動作のため本装置では内部判定せ
ず、B端に設置されている母線保護装置によりB端のC
Bが引外される。このためB端休止となりB端電流零制
御条件3が成立し、切換制御回路4でB端電流と零に制
御する。これより電流差動リレー5へはA端電流のみが
入力されて動作する。このとき限時動作復帰回路13の動
作限時だけNOT回路14によるロックが遅れるため、こ
の間でAND回路15が成立し、OR回路17を介して内部
判定を行なうことができる。本装置の回路の中でAND
回路15による内部判定回路を設けているのは、図3のよ
うにB端子のCBがCTより母線側に配置されている場
合、CBとCTの間のF点に事故が発生したときにもA
端子のCBを引外さないと事故除去ができないためであ
る。
When an accident occurs at point F in FIG. 3, the current differential relays 5 and 6 do not operate, so this device does not make an internal determination, and a busbar protection device installed at the end B causes a C at the end B.
B is tripped. For this reason, the B end is stopped and the B end current zero control condition 3 is satisfied, and the switching control circuit 4 controls the B end current to zero. As a result, only the A-terminal current is input to the current differential relay 5 to operate. At this time, since the lock by the NOT circuit 14 is delayed only for the operation time limit of the time delay operation recovery circuit 13, the AND circuit 15 is established during this time, and the internal determination can be performed via the OR circuit 17. AND in the circuit of this device
The internal judgment circuit by the circuit 15 is provided so that when the CB of the B terminal is arranged on the bus side of CT as shown in FIG. 3, even when an accident occurs at the point F between CB and CT. A
This is because the accident cannot be removed without removing the CB of the terminal.

【0015】ただし、図3のようなCBがCTより母線
側に配置されていない場合は、図4の符号8,13,14,
15の回路は省略可能である。12はB端正常運転中条件で
図8の受信データ不良又は装置試験中でないとき成立す
る。正常運転中とは伝送路不良又は保守点検中等により
電流入力が正常でない場合を除き、通常正常な入力が取
り込まれる状態を指す。AND回路16ではB端電流零制
御条件とB端正常運転条件12が成立中に内部事故判定を
行なう。これはB端CB投入直後B端子側にのみ事故電
流が流入するようなとき、B端電流零制御している電流
差動リレー5の動作が休止制御が解除されるまで遅れる
ため、このとき瞬時に内部判定を行なわせるため設けて
いる。
However, when the CB as shown in FIG. 3 is not arranged on the bus bar side of CT, reference numerals 8, 13, 14,
The 15 circuits can be omitted. The condition 12 is established when the terminal B is operating normally and the reception data in FIG. 8 is not good or the device is not being tested. Normal operation refers to a state in which normal input is normally taken in, unless the current input is abnormal due to a defective transmission line or during maintenance and inspection. The AND circuit 16 makes an internal accident determination while the B end current zero control condition and the B end normal operation condition 12 are satisfied. This is because when the fault current flows only to the B terminal side immediately after the B terminal CB is turned on, the operation of the current differential relay 5 that controls the B terminal current to zero is delayed until the suspension control is released. It is provided in order to make internal judgment.

【0016】[0016]

【発明の効果】以上説明したように、本発明によればし
ゃ断器の投入直後の内部事故時は瞬時に内部事故判定を
し、外部事故時は休止端解除される一定時間後に内部判
定するようにしたので、しゃ断器の入操作を行なった直
後に休止制御の解除遅れにより、不要にしゃ断器を引外
す虞れがない、信頼性のある休止端制御を行なうことが
可能となる。
As described above, according to the present invention, when an internal accident occurs immediately after the breaker is turned on, the internal accident is judged instantaneously, and when an external accident occurs, the internal judgment is made after a certain time after the rest end is released. Therefore, it is possible to perform reliable pause end control without fear of tripping the breaker unnecessarily due to the release delay of the pause control immediately after the operation of turning on the breaker.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による休止端制御方式を説明する一実施
例の構成図。
FIG. 1 is a configuration diagram of an embodiment illustrating a pause control method according to the present invention.

【図2】図1の動作説明のタイムチャート。FIG. 2 is a time chart for explaining the operation of FIG.

【図3】しゃ断器がCTより母線側に設置されていて、
CTより母線側に事故が発生した状態を示す構成図。
[Fig. 3] A circuit breaker is installed on the bus side of CT,
The block diagram which shows the state which the accident generate | occur | produced on the bus-bar side from CT.

【図4】他の実施例の構成図。FIG. 4 is a configuration diagram of another embodiment.

【図5】図4の動作説明のタイムチャート。5 is a time chart for explaining the operation of FIG.

【図6】ディジタル形電流差動リレーの構成図。FIG. 6 is a block diagram of a digital type current differential relay.

【図7】伝送方式の伝送フォーマット。FIG. 7 is a transmission format of a transmission method.

【図8】従来の休止端制御回路図。FIG. 8 is a conventional idle end control circuit diagram.

【図9】従来の休止端制御方式の回路例図。FIG. 9 is a circuit example diagram of a conventional pause edge control system.

【図10】休止端制御の各場合を示す図。FIG. 10 is a diagram showing each case of rest edge control.

【図11】従来方式の動作説明のタイムチャート。FIG. 11 is a time chart for explaining the operation of the conventional method.

【符号の説明】[Explanation of symbols]

1,2 電流入力 3 電流零制御条件 4 切換制御回路 5,6 電流差動リレー 7,9,15,16 AND回路 8,14 NOT回路 10,13 限時動作回路 11,17 OR回路 12 B端正常運転中条件 1, 2 Current input 3 Zero current control condition 4 Switching control circuit 5, 6 Current differential relay 7, 9, 15, 16 AND circuit 8, 14 NOT circuit 10, 13 Time delay operation circuit 11, 17 OR circuit 12 B terminal normal Operating condition

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 多端子送電線を保護するため、各端子に
設けた休止端制御方式を備えた電流差動保護継電装置に
おいて、休止端の端子がある場合は、休止端制御により
休止端の入力を取り込まず判定を行なう第1のリレー
と、休止端の有り無しに拘らず休止端制御を行なわず全
端子の入力を取り込んで判定を行なう第2のリレーと、
前記第1のリレーと第2のリレーが共に動作の場合は瞬
時に内部判定を行なう回路と、前記第1のリレーが動作
で第2のリレーが不動作の場合は一定時間後内部判定を
行なう回路を備えたことを特徴とする電流差動保護継電
装置の休止端制御方式。
1. A current differential protection relay device provided with a quiescent end control system provided at each terminal for protecting a multi-terminal transmission line, and when there is a quiescent end terminal, the quiescent end is controlled by the quiescent end control. A first relay that makes a determination without taking in the input of the input, and a second relay that makes a decision by taking in the input of all terminals without performing the pause end control regardless of the presence or absence of the pause end.
A circuit that makes an internal determination instantly when both the first relay and the second relay are operating, and an internal determination after a certain period of time when the first relay is operating and the second relay is not operating. A quiescent end control system for a current differential protection relay, which is equipped with a circuit.
【請求項2】 多端子送電線を保護するため、各端子に
設けた休止端制御方式を備えた電流差動保護継電装置に
おいて、休止端の端子がある場合は、休止端制御により
休止端の入力を取り込まず判定を行なう第1のリレー
と、休止端の有り無しに拘らず休止端制御を行なわず全
端子の入力を取り込んで判定を行なう第2のリレーで構
成され、第1のリレーと第2のリレーが共に動作の場合
は瞬時に内部判定を行なう回路と、第1のリレーが動作
で第2のリレーが不動作の場合は、休止端制御解除から
一定時間後内部判定を行なう回路と、休止端制御端子が
正常運転中のとき第2のリレーが動作で瞬時に内部判定
を行なう回路を備えたことを特徴とする電流差動保護継
電装置の休止端制御方式。
2. A current differential protection relay device provided with a dormant end control system provided at each terminal to protect a multi-terminal transmission line, and if there is a dormant end terminal, the dormant end is controlled by the dormant end control. A first relay that makes a determination without taking in the input of the first relay, and a second relay that makes a determination by taking in the input of all terminals without performing the pause end control regardless of the presence or absence of the pause end. And the second relay are both operating, a circuit that makes an internal determination instantly, and when the first relay is operating and the second relay is not operating, an internal determination is made after a certain period of time from the release of the pause end control. A quiescent end control system for a current differential protection relay device, comprising a circuit and a circuit for instantaneously making an internal judgment by the operation of a second relay when the quiescent end control terminal is operating normally.
JP4021778A 1992-01-10 1992-01-10 Control method for inactive terminal of current differential protection relay Pending JPH05191917A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4021778A JPH05191917A (en) 1992-01-10 1992-01-10 Control method for inactive terminal of current differential protection relay

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4021778A JPH05191917A (en) 1992-01-10 1992-01-10 Control method for inactive terminal of current differential protection relay

Publications (1)

Publication Number Publication Date
JPH05191917A true JPH05191917A (en) 1993-07-30

Family

ID=12064520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4021778A Pending JPH05191917A (en) 1992-01-10 1992-01-10 Control method for inactive terminal of current differential protection relay

Country Status (1)

Country Link
JP (1) JPH05191917A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012147512A (en) * 2011-01-06 2012-08-02 Toshiba Corp Protection control measurement device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012147512A (en) * 2011-01-06 2012-08-02 Toshiba Corp Protection control measurement device

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