JPH0518758Y2 - - Google Patents

Description

[Detailed explanation of the idea] [Technical field to which the idea belongs]

The present invention relates to a working mask for double-sided exposure, which is used for forming resist patterns on both sides of a semiconductor wafer by exposing both sides of the wafer in close contact with each other at the same time from above and below.

[Prior art and its problems]

In order to form a resist pattern using the first mask on both sides of a semiconductor wafer that has not yet undergone any photoprocessing, as shown in FIG. It is sandwiched between the lower mask 4 held in the mask holder 21 and lights 51, 5 are applied from above and below.
2 is projected and both surfaces are exposed simultaneously. In this case, the wafer 1 is first set on the pattern 6 of the lower mask 4, as shown in FIG.
overlap or are parallel, and the other two sides 62,6
3 and the wafer 1 so that the same distance d exists on the left and right sides. However, if the wafer is set by visual inspection, the OF of the mask pattern
It is difficult to keep the deviation angle of the wafer OF with respect to the reference line within a standard value, and the left and right positions also deviate, making it difficult to equalize d. Therefore, position the upper mask 3 in accordance with this lower mask 4,
Even if a marker pattern for automatic alignment is placed on the wafer 1 at the time of resist pattern formation, the accuracy of its position relative to the wafer is poor, and the next photoprocess cannot be performed automatically.

[Purpose of invention]

Except for the above-mentioned drawbacks, the present invention can expose a resist pattern at a desired position on both sides of a semiconductor that does not yet have a pattern, and can form a marker pattern on the wafer surface that can be used for automatic alignment in the subsequent photoprocess. The purpose is to provide a working mask.

[Key Points of the Invention] The present invention includes a protrusion on the upper surface of the lower mask, and from this protrusion, a linear side that contacts the entire OF of the wafer and a point perpendicular to that side that contacts the outer periphery of the wafer. By making the thickness of this protruding part smaller than the thickness of the wafer, the OF reference line of the mask pattern and the wafer OF
It becomes easy to bring the deviation angle between the pattern and the gap between both sides of the pattern and the wafer outer circumference to within the standard, and the above object is achieved.

[Example of idea]

FIG. 1 shows a lower mask according to an embodiment of the present invention, which has an L-shaped guide 7 on the surface of the mask 4. FIG. This guide 7 is a flat convex portion having a step with a thickness of 200 to 300 μm, and is formed from glass, metal, resin, or the like by vapor deposition or lamination on the guide surface. When setting wafer 1, wafer OF
11 is brought into close contact with one of the inner sides 71 of the guide 7, and the circumference of the wafer 1 is brought into contact with the other inner side 72, thereby determining the relative position between the wafer 1 and the mask 4. Since the thickness of wafer 1 is 400 to 500 μm,
The guide 7 does not become an obstacle when positioning the upper mask over the lower mask 4.

[Effect of the idea]

According to the present invention, a lower mask for double-sided exposure has one side that is in opposition to the OF of the semiconductor wafer, and one side that is perpendicular to the side and is in opposition to the outer periphery of the wafer, and has a protrusion that is smaller in thickness than the thickness of the semiconductor wafer. By providing this, resist patterns can be formed on both sides of the wafer without any problems, the wafer can be easily aligned to the lower mask, and the deviation angle between the OF reference line and the OF and the deviation in the left and right positions can be reduced. Since the marker pattern is small and an automatic alignment marker pattern can be formed at a predetermined position on the wafer, automatic alignment is possible in subsequent photoprocessing steps, which is extremely effective for improving the accuracy of semiconductor photoprocessing and automating processes.

[Brief explanation of the drawing]

FIG. 1 is a plan view of a lower mask alignment according to an embodiment of the present invention, FIG. 2 is a sectional view of a double-sided exposure process, and FIG. 3 is a plan view of a conventional lower mask alignment. 1... Semiconductor wafer, 11... OF, 3... Upper mask, 4... Lower mask, 51, 52...
Light, 7...Guide (projection).

Claims (1)

[Scope of utility model registration request] A working mask for exposure is placed in close contact with both sides of the semiconductor wafer, which does not have a pattern yet, and exposed from above and below, and a protrusion is formed on the upper surface of the lower mask in the working mask for exposure used when forming a resist pattern on both sides of the semiconductor wafer. Prepare,
This protruding portion has one linear side that contacts the entire orientation flat of the semiconductor wafer, and one linear side that is perpendicular to the linear side and touches the outer periphery of the semiconductor wafer, and the thickness of this protruding portion is A working mask for double-sided exposure of semiconductor wafers, characterized by having a thickness smaller than that of semiconductor wafers.