JPH05177533A - Method and device for polishing semiconductor wafer - Google Patents
Method and device for polishing semiconductor waferInfo
- Publication number
- JPH05177533A JPH05177533A JP3356287A JP35628791A JPH05177533A JP H05177533 A JPH05177533 A JP H05177533A JP 3356287 A JP3356287 A JP 3356287A JP 35628791 A JP35628791 A JP 35628791A JP H05177533 A JPH05177533 A JP H05177533A
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- wafer
- pressure
- cloth
- holding head
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体ウェーハを所定
の表面粗さに鏡面研磨する研磨方法と装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing method and apparatus for mirror-polishing a semiconductor wafer to a predetermined surface roughness.
【０００２】[0002]
【従来の技術】半導体ウェーハは、ＳｉやＧｅのような
単体元素、ＩＩＩ−Ｖ族やＩＩ−ＶＩ族化合物に代表さ
れる化合物半導体の単結晶から製造され、各種エレクト
ロニクス製品を製造するための重要な素材となってい
る。その代表的製品である、シリコン単結晶ウェーハ
（以下単にウェーハとする）の場合、例えば図４に示す
ような製造工程により作られる。まず、シリコン単結晶
インゴットを作り、それの外径を円筒研磨すると共に一
部面取り（ＯＦ加工）を行う。次に、所定の厚みにスラ
イシングし、外周を面取り（ベベリング）した後、所定
のラッピング，エッチングおよび熱処理を行い、研磨工
程に入る。研磨工程は通常、１次研磨、２次研磨、３次
研磨と複数段階で構成される。１次研磨および２次研磨
は半導体ウェーハを所定の厚みにすべく所定取代だけ研
磨すると共に概略の平坦度を得るための研磨工程を分担
する。一方、３次以上の研磨は所定の表面粗さを得るた
めのものである。2. Description of the Related Art Semiconductor wafers are manufactured from single elements such as Si and Ge, and single crystals of compound semiconductors represented by III-V and II-VI compounds, and are important for manufacturing various electronic products. It is made of various materials. In the case of a typical product, a silicon single crystal wafer (hereinafter simply referred to as a wafer), it is manufactured by the manufacturing process as shown in FIG. 4, for example. First, a silicon single crystal ingot is formed, and the outer diameter of the silicon ingot is cylindrically polished and partially chamfered (OF processing). Next, after slicing to a predetermined thickness and chamfering (beveling) the outer periphery, predetermined lapping, etching and heat treatment are performed, and a polishing step is started. The polishing process is usually composed of a plurality of stages including primary polishing, secondary polishing, and tertiary polishing. The primary polishing and the secondary polishing share a polishing step for polishing a semiconductor wafer by a predetermined margin so as to have a predetermined thickness and for obtaining a rough flatness. On the other hand, the third or higher polishing is for obtaining a predetermined surface roughness.
【０００３】図４は横軸に研磨代（取代）を表示し、縦
軸に表面粗さを表示したものであり、前記の各研磨工程
の分担をわかり易く表示したものである。この表面粗さ
は、一例として光学干渉式表面粗さ計で測定することが
でき、その値はＲrms （Ｒｏｕｇｈｎｅｓｓ Ｒｏｏｔ
−Ｍｅａｎ−Ｓｑｕａｒｅ）記号によりｎｍ（ナノメー
ター）単位で表示される。FIG. 4 shows the polishing allowance on the abscissa and the surface roughness on the ordinate, showing the allocation of each polishing step in an easy-to-understand manner. This surface roughness can be measured by an optical interference type surface roughness meter as an example, and its value is R rms (Roughness Root).
It is expressed in nm (nanometer) by the -Mean-Square symbol.
【０００４】以上の研磨工程を終了した後、ウェーハは
図４に示すように洗浄工程で洗浄された後、検査，出荷
される。なお、図示していないが、ウェーハの研磨方法
としては、研磨布を表面に敷設して回転する研磨テーブ
ル上に、ウェーハ保持ヘッドに保持されたウェーハを押
圧しながら回転し、ウェーハと研磨布間に砥粒とアルカ
リ性の液剤とを混合したメカノケミカルの研磨剤を介在
させて行う。After the above polishing process is completed, the wafer is cleaned in a cleaning process as shown in FIG. 4, and then inspected and shipped. Although not shown, as a method of polishing a wafer, a polishing cloth is laid on the surface and rotated on a rotating polishing table while pressing the wafer held by a wafer holding head to rotate between the wafer and the polishing cloth. Is performed by interposing a mechanochemical abrasive containing a mixture of abrasive grains and an alkaline liquid agent.
【０００５】[0005]
【発明が解決しようとする課題】半導体ウェーハの研磨
条件としては、研磨テーブルとウェーハ保持ヘッド間の
相対速度と、半導体ウェーハを研磨布側に押圧する研磨
圧力と、研磨布および研磨剤の種類等が上げられる。図
５は横軸に研磨圧力（ｇ／ｃｍ2 ）をとり、縦軸に研磨
布単位長さあたりの切込量（ｎｍ／ｍ）をとったもので
ある。また、符号Ｄ，Ｅ，Ｆは研磨布の種類を表わす。
図示のように研磨布の種類の如何に拘らず、研磨圧力が
高い方が切込量は大きい。一方、研磨テーブルとウェー
ハ保持ヘッド間の相対速度は速い程表面粗さはよくなる
傾向にあり、研磨布は軟らかい方が表面粗さがよくなる
が切込量は小さくなる。以上のことから、従来の研磨工
程では予め研磨条件を各段階ごとに一定にしてウェーハ
研磨を行っていた。従って、ウェーハの面粗さは初期に
設置された研磨条件により略決められていた。図６に示
すように、研磨布３の表面はその硬，軟に拘らず凹凸に
形成され、その凹凸に沿って研磨剤１１が付着してい
る。ウェーハ５が仮りに平坦に形成されていても（実際
はかなり凹凸している）、所定の研磨圧力によりウェー
ハ５を波状の研磨布３に押圧して研磨すると、図７に示
すように研磨布３の波状形状がウェーハ５に転写され、
ウェーハ５の表面を粗らす。そのため、長時間研磨して
も所望の表面粗さのウェーハ５を得ることが出来ない問
題点があった。The semiconductor wafer polishing conditions include the relative speed between the polishing table and the wafer holding head, the polishing pressure for pressing the semiconductor wafer against the polishing cloth, the type of the polishing cloth and the polishing agent, and the like. Is raised. In FIG. 5, the horizontal axis represents the polishing pressure (g / cm 2 ) and the vertical axis represents the cut amount per unit length of polishing cloth (nm / m). The symbols D, E, and F represent the types of polishing cloth.
As shown in the figure, the cut amount is larger when the polishing pressure is higher, regardless of the type of polishing cloth. On the other hand, the higher the relative speed between the polishing table and the wafer holding head, the better the surface roughness. The softer the polishing cloth, the better the surface roughness, but the smaller the cut amount. From the above, in the conventional polishing process, the wafer was polished in advance with the polishing conditions being constant in each stage. Therefore, the surface roughness of the wafer is substantially determined by the polishing conditions initially set. As shown in FIG. 6, the surface of the polishing cloth 3 is formed into unevenness regardless of whether it is hard or soft, and the abrasive 11 adheres along the unevenness. Even if the wafer 5 is temporarily formed flat (actually, it is considerably uneven), when the wafer 5 is pressed against the corrugated polishing cloth 3 by a predetermined polishing pressure and polished, as shown in FIG. The wavy shape of is transferred to the wafer 5,
The surface of the wafer 5 is roughened. Therefore, there is a problem that the wafer 5 having a desired surface roughness cannot be obtained even after polishing for a long time.
【０００６】一方、研削技術の１つとしてスパークアウ
ト研削方法が従来より行われている。スパークアウト研
削とは、砥石でワークを研削加工する際に、砥石の送り
を止めてワークを研削し、その状態で研削する技術であ
り、公知のものである。特公平３−４９７０５号公報は
その一例を示す開示例である。同技術はウェーハをカッ
プ形砥石で研削仕上げするもので、所定の切込量に達し
た位置で砥石の切込を止め、同時にウェーハの回転を減
速して所望の仕上面精度を得るようにしたものである。On the other hand, a spark-out grinding method has been conventionally performed as one of grinding techniques. The spark-out grinding is a known technique for stopping the feed of the grindstone to grind the work when grinding the work with the grindstone, and grinding in that state. Japanese Examined Patent Publication No. 3-49705 is a disclosure example showing an example thereof. In this technology, the wafer is ground and finished with a cup-shaped grindstone, and the cutting of the grindstone is stopped at the position where the predetermined cutting amount is reached, and at the same time, the rotation of the wafer is decelerated to obtain the desired finishing surface accuracy. It is a thing.
【０００７】本発明は、特公平３−４９７０５号公報に
開示するような公知のスパークアウト研削技術から着想
したものであるが、ウェーハの研磨工程には切込の概念
がなく研削工程のようなスパークアウト研削技術をその
まま適用することが出来ない。また、図６および図７に
示したように、ウェーハの研磨圧力により、研磨布３側
の凹凸がウェーハ側に転写されてしまい、表面粗さをそ
れ以上向上させることが出来ない。そこで、本発明は、
図６および図７に示した問題点が研磨条件、特に研磨圧
力に影響があることを見出すと共に、前記スパークアウ
ト研削技術を基にして前記スパークアウト研磨工程を創
案し、ウェーハの面粗さを効率よく改善することが出来
るウェーハの研磨方法と装置を提供することを目的とす
る。The present invention was conceived from a known spark-out grinding technique as disclosed in Japanese Patent Publication No. 3-49705, but there is no concept of cutting in the polishing process of the wafer and it is the same as the grinding process. Spark-out grinding technology cannot be applied as it is. Further, as shown in FIGS. 6 and 7, the unevenness of the polishing cloth 3 side is transferred to the wafer side by the polishing pressure of the wafer, and the surface roughness cannot be further improved. Therefore, the present invention is
It was found that the problems shown in FIGS. 6 and 7 affect the polishing conditions, especially the polishing pressure, and the spark-out polishing process was devised based on the spark-out grinding technique to improve the surface roughness of the wafer. An object of the present invention is to provide a wafer polishing method and apparatus that can be efficiently improved.
【０００８】[0008]
【課題を解決するための手段】本発明は、以上の目的を
達成するために、研磨テーブルの表面に敷設された研磨
布にウェーハ保持ヘッドに保持された半導体ウェーハを
所定の研磨圧力で押圧し、前記研磨布と前記ウェーハ間
に研磨剤を介在させながら該ウェーハの研磨仕上げを行
う研磨方法において、研磨工程を、研磨圧力の高い高荷
重研磨工程（以下、通常研磨工程という）と研磨圧力の
低い低荷重研磨工程（以下、スパークアウト研磨工程と
いう）とから構成し、通常研磨工程を所定時間ｔ0 実施
した後、スパークアウト研磨を所定時間ｔ1 だけ自動的
に行うと共に、スパークアウト研磨工程の研磨圧力およ
び時間ｔ1 を前記研磨布，研磨剤，ウェーハ形状および
材質，通常研磨工程条件等に対応して定め、所定の表面
粗さを得るようにした研磨方法を特徴とすると共に、研
磨テーブルの表面に敷設された研磨布にウェーハ保持ヘ
ッドに保持された半導体ウェーハを所定の研磨圧力で押
圧し、研磨布とウェーハ間に研磨剤を介在させながら該
ウェーハの研磨仕上げを行う研磨装置において、研磨テ
ーブルを回転駆動する研磨テーブル駆動部と、ウェーハ
保持ヘッドを回転駆動するウェーハ保持ヘッド駆動部
と、ウェーハの研磨圧力を調整する研磨圧力調整部と、
実際の研磨圧力を検出する研磨圧力検出部と、制御装置
から構成され、制御装置は、研磨テーブル駆動部，ウェ
ーハ保持ヘッド駆動部，研磨圧力調整部，研磨圧力検出
部にそれぞれ連結し、それ等を自動制御すると共に、通
常研磨工程条件，ウェーハの形状および材質，研磨剤お
よび研磨布の種類等の使用条件を基にして、スパークア
ウト研磨工程の研磨圧力，所定時間ｔ1 および前記研磨
テーブルとウェーハ保持ヘッド間の相対速度等を調整制
御すべく構成されてなる半導体ウェーハの研磨装置をそ
の手段としたものである。In order to achieve the above object, the present invention presses a semiconductor wafer held by a wafer holding head against a polishing cloth laid on the surface of a polishing table with a predetermined polishing pressure. In the polishing method of polishing and polishing the wafer while interposing a polishing agent between the polishing cloth and the wafer, the polishing step includes a high load polishing step with a high polishing pressure (hereinafter referred to as a normal polishing step) and a polishing pressure And a low-load polishing step (hereinafter referred to as a spark-out polishing step). After performing the normal polishing step for a predetermined time t 0 , the spark-out polishing is automatically performed for a predetermined time t 1 and the spark-out polishing step is performed. the polishing cloth of the polishing pressure and time t 1 of, abrasive, the wafer shape and material, determined in accordance with the usual polishing conditions, so as to obtain a predetermined surface roughness While featuring a polishing method, the semiconductor wafer held by the wafer holding head is pressed against the polishing cloth laid on the surface of the polishing table with a predetermined polishing pressure, while the polishing agent is interposed between the polishing cloth and the wafer. In a polishing apparatus for polishing and polishing a wafer, a polishing table drive unit that rotationally drives a polishing table, a wafer holding head drive unit that rotationally drives a wafer holding head, and a polishing pressure adjustment unit that adjusts a polishing pressure of a wafer,
It is composed of a polishing pressure detector for detecting the actual polishing pressure and a controller, and the controller is connected to the polishing table driver, the wafer holding head driver, the polishing pressure adjuster, and the polishing pressure detector, respectively. Automatic control, and based on normal polishing process conditions, wafer shape and material, use conditions such as the type of polishing agent and polishing cloth, polishing pressure in the spark-out polishing process, predetermined time t 1 and the polishing table. The polishing apparatus for a semiconductor wafer, which is configured to adjust and control the relative speed between wafer holding heads, is used as the means.
【０００９】[0009]
【作用】所望の研磨代に対して研磨布及び研磨剤の種
類、半導体ウェーハの形状及び材質等を考慮して通常研
磨工程の研磨圧力，研磨すべき時間ｔ0 および研磨テー
ブルとウェーハ保持ヘッドとの相対速度等を定め、通常
研磨を行う。時間ｔ0 が経過したことを制御装置により
確認したら、予め決められた研磨条件に基づきウェーハ
保持ヘッドの研磨圧力を下げ、スパークアウト研磨工程
内に調整する。所定の研磨圧力の有無を研磨圧力を検出
部にて検出し、ＯＫの場合は所定時間ｔ1 だけスパーク
アウト研磨を行う。時間ｔ1 経過後、所望の表面粗さに
仕上げられたら研磨工程を終了し、次工程の洗浄を行
う。本発明のスパークアウト研磨工程は、研磨布と研磨
剤によるメカノケミカルな鏡面研磨方法において、研磨
布および研磨剤による切込作用のあることを発見し、そ
れを応用した研磨方法であるから、その作用は、通常研
磨工程における研磨圧力が比較的高く、また硬度が高く
圧縮率の低い研磨布を用いた場合に、より効果的に発揮
される。すなわち、このような特性の研磨布を使用する
ことにより、従来の研磨法よりも面粗さは向上する。従
って、本発明の適用は前述の鏡面研磨段階の１次研磨ま
たは２次研磨の段階で行なうことがより効果的であり、
それにより３次研磨が省略できるか、またはその工程の
手間を省いたり、３次研磨時間を短縮することができ
る。また、従来法における１次研磨、２次研磨、３次研
磨の各段階で研磨機や研磨の諸条件を使い分ける必要性
も簡略化できるので、スパークアウト研磨導入に伴う研
磨時間の延長は、研磨機の種類切替えの手間が省略され
たり、研磨条件の簡略化により相殺され、しかも表面粗
さは従来法に比して改善されるので、その分が利得とな
るものである。勿論このスパークアウト研磨は、最終の
研磨段階での適用も可能であるし、スパークアウトを１
段のみとせず、２〜３段に分けて行なうこともできる。
また、装置は、ウェーハ単枚処理の枚葉式研磨機または
複数枚単位処理のバッチ式研磨機のいずれにても適用が
可能である。With respect to the desired polishing allowance, the polishing pressure in the normal polishing step, the polishing time t 0, the polishing table and the wafer holding head in consideration of the types of polishing cloth and polishing agent, the shape and material of the semiconductor wafer, etc. The relative speed etc. are determined, and polishing is usually performed. When it is confirmed by the control device that the time t 0 has elapsed, the polishing pressure of the wafer holding head is lowered based on the predetermined polishing conditions, and adjustment is performed within the spark-out polishing process. The presence or absence of a predetermined polishing pressure is detected by the detection unit, and if it is OK, spark-out polishing is performed for a predetermined time t 1 . After a lapse of time t 1 , when the surface is finished to have a desired surface roughness, the polishing step is finished and the next step of cleaning is performed. The spark-out polishing step of the present invention is a mechanochemical mirror-polishing method using a polishing cloth and a polishing agent, and it is found that there is a cutting action by the polishing cloth and the polishing agent, and since it is a polishing method applying it, The action is more effectively exhibited when a polishing cloth having a relatively high polishing pressure in the polishing step and a high hardness and a low compression rate is used. That is, the surface roughness is improved by using the polishing cloth having such characteristics as compared with the conventional polishing method. Therefore, it is more effective to apply the present invention in the primary polishing or the secondary polishing of the above-mentioned mirror polishing,
Thereby, the third polishing can be omitted, or the labor of the process can be omitted or the third polishing time can be shortened. Further, since it is possible to simplify the necessity of properly using the polishing machine and various polishing conditions in each stage of the primary polishing, secondary polishing, and tertiary polishing in the conventional method, the extension of polishing time accompanying the introduction of spark-out polishing is Since the trouble of changing the type of machine is eliminated or offset by the simplification of the polishing conditions, and the surface roughness is improved as compared with the conventional method, that amount becomes a gain. Of course, this spark-out polishing can also be applied at the final polishing stage, and
It is also possible to perform not only the steps but also two or three steps.
The apparatus can be applied to either a single-wafer polishing machine for single wafer processing or a batch-type polishing machine for multiple wafer processing.
【００１０】[0010]
【実施例】以下、本発明の一実施例を図面に基づき説明
する。図１は本実施例の全体構成図であり、図２は本実
施例の作用動作を説明するためのフローチャートであ
り、図３は研磨圧力，時間ｔ1 と表面粗さの関係を示す
線図である。図１に示すように表面が平坦な研磨テーブ
ル２の表面には研磨布３が敷設される。研磨テーブル２
は研磨テーブル駆動部４により回転駆動される。半導体
ウェーハ５を保持するトップリング６を有するウェーハ
保持ヘッド７は研磨テーブル２の表面上に配設され、ウ
ェーハ保持ヘッド駆動部８により回転駆動される。な
お、半導体ウェーハ５は研磨布３に当接係合する。ウェ
ーハ保持ヘッド７には半導体ウェーハ５を研磨布３側に
押圧し研磨圧力を調整するための研磨圧力調整部９と研
磨圧力を検出するための研磨圧力検出部１０がそれぞれ
係合して配置される。また、研磨テーブル２の表面側に
は研磨剤１１を研磨布３側に供給する研磨剤供給手段１
２等が配置される。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is an overall configuration diagram of this embodiment, FIG. 2 is a flow chart for explaining the operation of this embodiment, and FIG. 3 is a diagram showing the relationship between polishing pressure, time t 1 and surface roughness. Is. As shown in FIG. 1, a polishing cloth 3 is laid on the surface of a polishing table 2 having a flat surface. Polishing table 2
Is driven to rotate by the polishing table drive unit 4. A wafer holding head 7 having a top ring 6 for holding the semiconductor wafer 5 is arranged on the surface of the polishing table 2 and is rotationally driven by a wafer holding head drive unit 8. The semiconductor wafer 5 abuts and engages with the polishing cloth 3. A polishing pressure adjusting unit 9 for adjusting the polishing pressure by pressing the semiconductor wafer 5 toward the polishing cloth 3 and a polishing pressure detecting unit 10 for detecting the polishing pressure are arranged in engagement with the wafer holding head 7. It Further, on the surface side of the polishing table 2, a polishing agent supply means 1 for supplying the polishing agent 11 to the polishing cloth 3 side.
2 etc. are arranged.
【００１１】制御装置１は、研磨テーブル駆動部４，ウ
ェーハ保持ヘッド駆動部８，研磨圧力調整部９，研磨圧
力検出部１０等を自動制御するもので、それ等と電気的
に連結する。また、制御装置１には半導体ウェーハ５の
形状および材質等のデータや研磨布３，研磨剤の種類等
の研磨工程に必要な各データが入力，記憶される。図１
の表示部１３に示すように、制御装置１は研磨工程にお
ける研磨圧力，研磨時間，研磨テーブル２とウェーハ保
持ヘッド７間の相対速度等を研磨剤，研磨布３の種類と
ウェーハの形状および材質等のデータを基にして設定す
ると共に、それ等に基づき研磨テーブル２，ウェーハ保
持ヘッド７等を自動制御するように構成される。本実施
例では研磨工程を研磨圧力ｐ0 で研磨時間ｔ0 の通常研
磨工程と研磨圧力ｐ1 で研磨時間ｔ1 のスパークアウト
研磨工程の２工程から形成される。半導体ウェーハ５は
まず、研磨圧力ｐ0 で研磨布３に押圧され、時間ｔ0 だ
け通常研磨が行われた後、研磨圧力ｐ0 よりも低圧力の
研磨圧力ｐ1 で研磨時間ｔ1 のスパークアウト研磨によ
り仕上げられて完成品となる。The control device 1 automatically controls the polishing table driving unit 4, the wafer holding head driving unit 8, the polishing pressure adjusting unit 9, the polishing pressure detecting unit 10 and the like, and is electrically connected to them. Further, the controller 1 receives and stores data such as the shape and material of the semiconductor wafer 5 and various data necessary for the polishing process such as the polishing cloth 3 and the type of polishing agent. Figure 1
As shown in the display section 13, the controller 1 indicates the polishing pressure, the polishing time, the relative speed between the polishing table 2 and the wafer holding head 7 in the polishing process, the type of the polishing agent, the polishing cloth 3, the shape and the material of the wafer. And the like, and the polishing table 2, the wafer holding head 7 and the like are automatically controlled based on them. In this embodiment, the polishing process is composed of two processes, a normal polishing process with a polishing pressure p 0 and a polishing time t 0 , and a spark-out polishing process with a polishing pressure p 1 and a polishing time t 1 . The semiconductor wafer 5 is first pressed by the polishing pad 3 at the polishing pressure p 0 and is normally polished for the time t 0 , and then the spark for the polishing time t 1 is applied at the polishing pressure p 1 lower than the polishing pressure p 0. Finished by out polishing to obtain a finished product.
【００１２】次に、図２のフローチャートにより本実施
例の作用動作を説明する。まず、研磨圧力ｐ0 ，研磨時
間ｔ0 の通常研磨が行われる（ステップ１００）。通常
研磨の研磨時間がｔ0 に達したか否かの自動チェックが
行われ（ステップ１０１）、ｙｅｓの場合には次工程は
スパークアウト研磨の各研磨条件，本実施例では研磨圧
力ｐ1 ，および研磨時間ｔ1 の設定（ステップ１０２）
を経た後、設定値通りに形成されているかの条件チェッ
クを行う（ステップ１０３）。ｙｅｓの場合には次工程
のスパークアウト研磨実施を行う（ステップ１０４）。
スパークアウト研磨の研磨時間ｔ1 の経過を確認する
（ステップ１０５）。ｙｅｓの場合には表面粗さの測定
を行う（ステップ１０６）。所定の表面粗さを満足した
か否かを確認し（ステップ１０７）、ｙｅｓの場合には
スパークアウト研磨工程を終了し、次工程側に搬送され
る（ステップ１０８）。Next, the operation and operation of this embodiment will be described with reference to the flow chart of FIG. First, normal polishing is performed at a polishing pressure p 0 and a polishing time t 0 (step 100). An automatic check is made as to whether or not the polishing time for normal polishing has reached t 0 (step 101). If yes, the next step is each polishing condition for spark-out polishing, polishing pressure p 1 in this embodiment, And setting of polishing time t 1 (step 102)
After that, a condition check is performed to determine whether or not the film is formed according to the set value (step 103). If yes, the spark-out polishing of the next step is performed (step 104).
The progress of the polishing time t 1 of the spark-out polishing is confirmed (step 105). If yes, the surface roughness is measured (step 106). It is confirmed whether or not the predetermined surface roughness is satisfied (step 107). If the result is yes, the spark-out polishing process is terminated and the process is conveyed to the next process side (step 108).
【００１３】図３はスパークアウト研磨の効率を示す線
図である。図中には３つの研磨圧力Ａ，Ｂ，Ｃの場合が
示され、Ｃ＞Ｂ＞Ａである。前記研磨圧力ｐ0 がＣ表示
に相当し、前記研磨圧力ｐ1 がＢ，Ａで示される。下方
の横軸には研磨圧力Ａ，Ｂ，Ｃの場合の研磨時間ｔ1 が
それぞれ示され、上方の横軸には研磨代（取代）が示さ
れる。また、縦軸には表面粗さが示される。研磨圧力Ｃ
で研磨時間ｔ0 の通常研磨が行われた後、研磨圧力を
Ａ，Ｂに変えることにより表面粗さが変化することがわ
かる。例えば、一番低い研磨圧力のＡの場合には研磨時
間ｔ1 が長いが表面粗さは大巾に小さくなる。一方、研
磨圧力が中間のＢの場合には表面粗さは勿論改善され、
かつ研磨時間ｔ1 が比較的短いが途中から飽和してしま
うため、研磨代が増加しても所望の表面粗さを得ること
が出来ない場合が生ずる。当然ながら研磨圧力Ｃを維持
した場合、表面粗さも変化しない。FIG. 3 is a diagram showing the efficiency of spark-out polishing. In the figure, three polishing pressures A, B, and C are shown, and C>B> A. The polishing pressure p 0 corresponds to the C indication, and the polishing pressure p 1 is indicated by B and A. The lower horizontal axis shows the polishing time t 1 under the polishing pressures A, B, and C, and the upper horizontal axis shows the polishing allowance. The vertical axis shows the surface roughness. Polishing pressure C
It can be seen that the surface roughness is changed by changing the polishing pressure to A and B after the normal polishing for the polishing time t 0 is performed. For example, when the polishing pressure A is the lowest, the polishing time t 1 is long, but the surface roughness is greatly reduced. On the other hand, when the polishing pressure is intermediate B, the surface roughness is of course improved.
In addition, the polishing time t 1 is relatively short, but it is saturated in the middle of the process, so that the desired surface roughness may not be obtained even if the polishing allowance is increased. Of course, when the polishing pressure C is maintained, the surface roughness does not change.
【００１４】[0014]
【実験例】次に、本発明の実験例を示す。実験に使用の
半導体ウェーハは、Ｓｉ単結晶でＰ型の引上結晶方位＜
１００＞、直径１２５ｍｍのものであり、装置は枚葉式
鏡面研磨機を使用した。実験は通常の鏡面研磨工程を想
定し、研磨布／研磨剤について、次の３通りの条件組み
合わせで行った。 （１）１次研磨用：硬質ベロアタイプクロス／コロイダ
ルシリカ系研磨剤（研磨布のＪＩＳアスカーＣ硬度８
５、圧縮率４．０％） （２）２次研磨用：軟質ベロアタイプクロス／コロイダ
ルシリカ系研磨剤（研磨布のＪＩＳアスカーＣ硬度７
５、圧縮率９．０％） （３）３次研磨用：スウェードタイプクロス／コロイダ
ルシリカ系研磨剤 表面粗さは、光学干渉式表面粗さ計によりＲrms 値（単
位ｎｍ）で測定した。通常研磨条件は、研磨圧力を４０
０ｇ／ｃｍ2 、相対速度を５０〜１５０ｍ／分の範囲と
し、研磨時間は１０分に固定した。これに対し、スパー
クアウト研磨は、研磨圧力を通常研磨時の圧力以下と
し、研磨時間は０〜３０分の範囲で試験した。結果とし
て（１）及び（２）の場合には、スパークアウト研磨に
おける研磨圧力の低下により、ウェーハの面粗さが大幅
に改良されることが測定された。すなわち、（１）の場
合において、スパークアウト研磨圧力２５０ｇ／ｃｍ2
として３分間研磨した結果は、通常研磨条件におけるＲ
rms 値の１．００ｎｍが０．８０ｎｍに、同様（２）の
場合は１．００ｎｍが０．８５ｎｍに、しかし、（３）
の場合は１．００ｎｍが０．９２ｎｍとスパークアウト
による効果は小さかった。前記条件方法において、スパ
ークアウトの研磨圧力のみを１００ｇ／ｃｍ2 の低い圧
力に変更したところ、（１）（２）それぞれにおける面
粗さは０．７５ｎｍ、０．８０ｎｍと更に改善された
が、（３）の場合は誤差範囲の効果しか得られなかっ
た。EXPERIMENTAL EXAMPLE Next, an experimental example of the present invention will be shown. The semiconductor wafer used in the experiment is a Si single crystal and has a P-type pulling crystal orientation <
100>, diameter 125 mm, and the apparatus used was a single-wafer mirror polishing machine. In the experiment, assuming a normal mirror polishing step, the polishing cloth / abrasive was subjected to the following three combinations of conditions. (1) For primary polishing: hard velor type cloth / colloidal silica type polishing agent (JIS Asker C hardness of polishing cloth 8
5, compressibility 4.0%) (2) For secondary polishing: Soft velor type cloth / colloidal silica-based abrasive (JIS Asker C hardness of polishing cloth 7
(5, compressibility 9.0%) (3) For third polishing: suede type cloth / colloidal silica-based polishing agent The surface roughness was measured by R rms value (unit: nm) by an optical interference type surface roughness meter. The normal polishing condition is a polishing pressure of 40.
The polishing time was fixed at 10 minutes with a relative speed of 0 g / cm 2 and a relative speed of 50 to 150 m / minute. On the other hand, in the spark-out polishing, the polishing pressure was set equal to or lower than the pressure during normal polishing, and the polishing time was tested in the range of 0 to 30 minutes. As a result, in the cases of (1) and (2), it was measured that the reduction of the polishing pressure in the spark-out polishing significantly improved the surface roughness of the wafer. That is, in the case of (1), the spark-out polishing pressure is 250 g / cm 2
The result of polishing for 3 minutes is R under normal polishing conditions.
The rms value of 1.00 nm is 0.80 nm, and similarly (2) is 1.00 nm is 0.85 nm, but (3)
In the case of 1.00 nm, the effect due to spark-out was small, with 1.00 nm being 0.92 nm. In the above condition method, when only the polishing pressure for spark out was changed to a low pressure of 100 g / cm 2 , the surface roughness in (1) and (2) respectively was further improved to 0.75 nm and 0.80 nm, In the case of (3), only the effect of the error range was obtained.
【００１５】以上に説明したように、スパークアウト研
磨により半導体ウェーハの５の面粗さは大巾に改善させ
るが、スパークアウト研磨の研磨条件は前記実施例のよ
うに研磨圧力，研磨時間の変更にのみ限定するものでな
く、通常研磨とスパークアウト研磨間で研磨布，研磨剤
等の各条件を変えることにより、更に、面粗さの改善を
図ることが出来る。As described above, the surface roughness of the semiconductor wafer 5 is greatly improved by the spark-out polishing, but the polishing conditions for the spark-out polishing are the same as those in the above-mentioned embodiment except that the polishing pressure and the polishing time are changed. However, the surface roughness can be further improved by changing the conditions such as the polishing cloth and the polishing agent between the normal polishing and the spark-out polishing.
【００１６】[0016]
【発明の効果】本発明によれば、次のような効果が上げ
られる。 （１）研磨代を目的とした比較的高い研磨圧力で研磨し
た場合に較べ、研磨条件、特に研磨圧力を変えることに
より、研磨布の凹凸の影響を直接うけることが減少し面
粗さを大巾に向上することが出来る。 （２）通常研磨からスパークアウト研磨への移行は制御
装置により自動的に行われるため従来の１次，２次，３
次研磨工程に較べ、効率的な研磨が行われる。 （３）制御装置に、面粗さに影響を与える因子を入力
し、最適の条件でスパークアウト研磨をすることが可能
のため、所望の面粗さを有するウェーハ研磨が可能とな
る。 （４）研磨工程における研磨圧力が比較的高く、また硬
度が高く圧縮率の低い研磨布を用いた場合に、研磨布に
よる切込作用がより効果的に発揮される。 （５）鏡面研磨段階の１次研磨または２次研磨の段階で
本発明を適用することにより、３次研磨が省略できる
か、またはその工程の手間を省いたり、３次研磨時間を
短縮することができる。 （６）１次研磨、２次研磨、３次研磨の各段階で研磨機
や研磨の諸条件を使い分ける必要性も簡略化できるの
で、スパークアウト研磨導入に伴う研磨時間の延長は、
研磨機の種類切替えの手間が省略されたり、研磨条件の
簡略化により相殺され、しかも表面粗さは従来法に比し
て改善されるので、その分が利得となる。 （７）研磨圧力の変更は特に難しいものでなく、容易に
実施可能である。According to the present invention, the following effects can be obtained. (1) Compared with the case of polishing with a relatively high polishing pressure for the purpose of polishing allowance, changing the polishing conditions, especially the polishing pressure, reduces the direct influence of the unevenness of the polishing cloth and increases the surface roughness. The width can be improved. (2) Since the transition from normal polishing to spark-out polishing is automatically performed by the control device, conventional primary, secondary, and
Efficient polishing is performed as compared with the next polishing step. (3) Since a factor that affects the surface roughness can be input to the control device and spark-out polishing can be performed under optimum conditions, it is possible to polish a wafer having a desired surface roughness. (4) When a polishing cloth having a relatively high polishing pressure in the polishing step and having a high hardness and a low compression rate is used, the cutting action of the polishing cloth is more effectively exhibited. (5) By applying the present invention in the stage of the primary polishing or the secondary polishing in the mirror polishing stage, the tertiary polishing can be omitted, or the labor of the process can be omitted or the tertiary polishing time can be shortened. You can (6) Since it is possible to simplify the necessity of properly using the polishing machine and various polishing conditions in each stage of the primary polishing, the secondary polishing, and the tertiary polishing, the extension of the polishing time due to the introduction of the spark-out polishing is
The labor of changing the type of the polishing machine is omitted, and it is offset by the simplification of the polishing conditions. Moreover, the surface roughness is improved as compared with the conventional method, so that amount becomes a gain. (7) Changing the polishing pressure is not particularly difficult and can be easily performed.
【図１】本発明の一実施例の全体構成図である。FIG. 1 is an overall configuration diagram of an embodiment of the present invention.
【図２】本実施例の作用動作を説明するためのフローチ
ャートである。FIG. 2 is a flow chart for explaining the operation of the present embodiment.
【図３】本実施例の効果を説明するための線図である。FIG. 3 is a diagram for explaining the effect of the present embodiment.
【図４】従来のウェーハの製造工程を説明するための説
明用フローチャートである。FIG. 4 is an explanatory flowchart for explaining a conventional wafer manufacturing process.
【図５】研磨圧力と研磨代との関係を示す線図である。FIG. 5 is a diagram showing the relationship between polishing pressure and polishing allowance.
【図６】従来の研磨前の研磨布とウェーハとの係合状態
を示す拡大一部断面図である。FIG. 6 is an enlarged partial cross-sectional view showing an engagement state between a conventional polishing cloth and a wafer before polishing.
【図７】従来の研磨後の研磨布とウェーハとの係合状態
を示す拡大一部断面図である。FIG. 7 is an enlarged partial cross-sectional view showing a state of engagement between a conventional polishing cloth and a wafer after polishing.
１ 制御装置 ２ 研磨テーブル ３ 研磨布 ４ 研磨テーブル駆動部 ５ 半導体ウェーハ ６ トップリング ７ ウェーハ保持ヘッド ８ ウェーハ保持ヘッド駆動部 ９ 研磨圧力調整部 １０ 研磨圧力検出部 １１ 研磨剤 １２ 研磨剤噴射手段 １３ 表示部 DESCRIPTION OF SYMBOLS 1 Control device 2 Polishing table 3 Polishing cloth 4 Polishing table drive unit 5 Semiconductor wafer 6 Top ring 7 Wafer holding head 8 Wafer holding head drive unit 9 Polishing pressure adjusting unit 10 Polishing pressure detecting unit 11 Polishing agent 12 Polishing agent ejecting means 13 Display Department
───────────────────────────────────────────────────── フロントページの続き (72)発明者 山崎 正志 新潟県中頸城郡頸城村大字城野腰新田596 の２ 直江津電子工業株式会社内 (72)発明者 岡田 守 長野県更埴市大字屋代1393 長野電子工業 株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masashi Yamazaki Inventor Masashi Yamazaki 596-2, Shinogoshi Nitta, Kubiki Village, Nakakubiki-gun, Niigata Prefecture Naoetsu Electronics Industry Co., Ltd. Electronic Industry Co., Ltd.
Claims (2)
にウェーハ保持ヘッドに保持された半導体ウェーハを所
定の研磨圧力で押圧し、前記研磨布と前記ウェーハ間に
研磨剤を介在させながら該ウェーハの鏡面研磨を行う研
磨方法において、研磨工程を研磨圧力の高い高荷重研磨
工程と研磨圧力の低い低荷重研磨工程とから構成し、高
荷重研磨工程を所定時間ｔ0 実施した後、低荷重研磨工
程を所定時間ｔ1 だけ自動的に行うと共に、低荷重研磨
工程の研磨圧力および時間ｔ1 を研磨布，研磨剤，ウェ
ーハ形状および材質，通常研磨工程条件等に対応して定
め、所定の表面粗さに前記半導体ウェーハを研磨するこ
とを特徴とする半導体ウェーハの研磨方法。1. A semiconductor wafer held by a wafer holding head is pressed against a polishing cloth laid on the surface of a polishing table with a predetermined polishing pressure, and an abrasive is interposed between the polishing cloth and the wafer to form a wafer. In the polishing method for performing mirror polishing, the polishing step includes a high load polishing step with a high polishing pressure and a low load polishing step with a low polishing pressure, and the high load polishing step is performed for a predetermined time t 0 , and then the low load polishing is performed. The process is automatically performed for a predetermined time t 1 , and the polishing pressure and time t 1 of the low-load polishing process are determined according to the polishing cloth, the polishing agent, the wafer shape and material, the normal polishing process conditions, etc. A method of polishing a semiconductor wafer, which comprises polishing the semiconductor wafer to a roughness.
にウェーハ保持ヘッドに保持された半導体ウェーハを所
定の研磨圧力で押圧し、前記研磨布と前記ウェーハ間に
研磨剤を介在させながら該ウェーハの鏡面研磨を行う研
磨装置において、研磨テーブルを回転駆動する研磨テー
ブル駆動部と、ウェーハ保持ヘッドを回転駆動するウェ
ーハ保持ヘッド駆動部と、ウェーハの研磨圧力を調整す
る研磨圧力調整部と、実際の研磨圧力を検出する研磨圧
力検出部と、制御装置から構成され、制御装置は、研磨
テーブル駆動部，ウェーハ保持ヘッド駆動部，研磨圧力
調整部，研磨圧力検出部にそれぞれ連結してそれ等を自
動制御すると共に、研磨工程条件，ウェーハの形状およ
び材質，研磨剤および研磨布の種類等の使用条件を基に
して、低荷重研磨工程の研磨圧力，所定時間ｔ1 および
前記研磨テーブルとウェーハ保持ヘッド間の相対速度等
を調整制御すべく構成されることを特徴とする半導体ウ
ェーハの研磨装置。2. A semiconductor wafer held by a wafer holding head is pressed against a polishing cloth laid on the surface of a polishing table with a predetermined polishing pressure, and an abrasive is interposed between the polishing cloth and the wafer to hold the wafer. In the polishing apparatus for performing the mirror polishing of, a polishing table drive unit that rotationally drives the polishing table, a wafer holding head drive unit that rotationally drives the wafer holding head, a polishing pressure adjustment unit that adjusts the polishing pressure of the wafer, and an actual It consists of a polishing pressure detector that detects the polishing pressure and a controller. The controller is connected to the polishing table drive unit, the wafer holding head drive unit, the polishing pressure adjustment unit, and the polishing pressure detection unit, respectively, and these are automatically connected. In addition to controlling, the low load polishing process is performed based on the polishing process conditions, wafer shape and material, polishing agent, polishing cloth type, and other usage conditions. An apparatus for polishing a semiconductor wafer, which is configured to adjust and control a polishing pressure, a predetermined time t 1, a relative speed between the polishing table and a wafer holding head, and the like.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3356287A JP3006249B2 (en) | 1991-12-24 | 1991-12-24 | Polishing equipment for semiconductor wafers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3356287A JP3006249B2 (en) | 1991-12-24 | 1991-12-24 | Polishing equipment for semiconductor wafers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05177533A true JPH05177533A (en) | 1993-07-20 |
| JP3006249B2 JP3006249B2 (en) | 2000-02-07 |
Family
ID=18448277
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3356287A Expired - Fee Related JP3006249B2 (en) | 1991-12-24 | 1991-12-24 | Polishing equipment for semiconductor wafers |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3006249B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0757378A1 (en) * | 1995-08-01 | 1997-02-05 | Shin-Etsu Handotai Co., Ltd. | Process of polishing silicon wafers |
| US5816891A (en) * | 1995-06-06 | 1998-10-06 | Advanced Micro Devices, Inc. | Performing chemical mechanical polishing of oxides and metals using sequential removal on multiple polish platens to increase equipment throughput |
| JP2006080329A (en) * | 2004-09-10 | 2006-03-23 | Disco Abrasive Syst Ltd | Chemical mechanical polishing equipment |
| JP2009172711A (en) * | 2008-01-23 | 2009-08-06 | Nikon Corp | Polishing device |
| JP2019029374A (en) * | 2017-07-25 | 2019-02-21 | 株式会社ディスコ | Wafer processing method |
| JP2020057710A (en) * | 2018-10-03 | 2020-04-09 | 株式会社ディスコ | Wafer processing method |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59219142A (en) * | 1983-05-26 | 1984-12-10 | Supiide Fuamu Kk | Surface grinding method |
-
1991
- 1991-12-24 JP JP3356287A patent/JP3006249B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59219142A (en) * | 1983-05-26 | 1984-12-10 | Supiide Fuamu Kk | Surface grinding method |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5816891A (en) * | 1995-06-06 | 1998-10-06 | Advanced Micro Devices, Inc. | Performing chemical mechanical polishing of oxides and metals using sequential removal on multiple polish platens to increase equipment throughput |
| EP0757378A1 (en) * | 1995-08-01 | 1997-02-05 | Shin-Etsu Handotai Co., Ltd. | Process of polishing silicon wafers |
| JP2006080329A (en) * | 2004-09-10 | 2006-03-23 | Disco Abrasive Syst Ltd | Chemical mechanical polishing equipment |
| JP4688456B2 (en) * | 2004-09-10 | 2011-05-25 | 株式会社ディスコ | Chemical mechanical polishing equipment |
| JP2009172711A (en) * | 2008-01-23 | 2009-08-06 | Nikon Corp | Polishing device |
| JP2019029374A (en) * | 2017-07-25 | 2019-02-21 | 株式会社ディスコ | Wafer processing method |
| JP2020057710A (en) * | 2018-10-03 | 2020-04-09 | 株式会社ディスコ | Wafer processing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3006249B2 (en) | 2000-02-07 |
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