JPH05176141A - Image reader - Google Patents

Abstract

PURPOSE:To read original images even in respect to an image recorder, for which a recording speed is low and changed, by controlling the read timing and sub scan timing of a line memory corresponding to an image data write signal and a timing signal transmitted from an external device. CONSTITUTION:When a read start signal is inputted from an image recorder 12, a timing generator 4 transmits a CCD drive timing signal to a CCD driver 2 synchronously with the next line synchronizing signal and starts reading originals. At the same time, a CPU 5 transmits a motor drive timing signal and simultaneously opens a gate 7, and image data are stored in a line memory 10. When data for one line are stored, the CPU 5 opens a gate 8 and transfers the image data for one line from the memory 10 to the device 12. Thus, the output of the image data is controlled for each picture element, and the reading is enabled even in respect to the image recorder which is not provided with any large capacity page memory.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a digital copying machine,
The present invention relates to an image reading device applied to a printer or the like.

[0002]

2. Description of the Related Art As a conventional technique, for example, Japanese Patent Laid-Open No. 2-1
By controlling the drive of a reading optical system or a motor for moving a document in synchronism with a sub-scanning synchronization signal input from an image recording apparatus in Japanese Patent Publication No. 27866, a plurality of recording speeds different from each other without a page memory are provided. An image reading apparatus has been proposed that enables the reading of a document image in synchronization with the image recording apparatus.

[0003]

However, in the above-mentioned prior art, it is necessary that the synchronizing signal has a constant cycle, and the recording time of one pixel is within the cycle of sending one pixel of the image recording apparatus. Was necessary. For this reason, the recording speed via the host computer is slow, and it is not suitable for connection to an image recording apparatus or the like whose recording speed changes. Further, in the image reading apparatus having the page memory, there is a drawback that the memory capacity becomes large and the cost becomes high in addition to the above-mentioned inconvenience.

The present invention solves the above-mentioned drawbacks of the conventional apparatus and does not have a large-capacity page memory, so that the recording speed is low,
Another object of the present invention is to provide an image reading apparatus capable of reading a document image in synchronization with an image recording apparatus in which the recording speed of one pixel or one line changes.

[0005]

According to a sub-scanning timing signal for scanning a document in the sub-scanning direction, the document is sub-scanned and the image of the document is read line by line.
In an image reading device that outputs read image data, a line memory that can store image data for one line and a read timing of the line memory according to an image data write signal transmitted from an external device connected in a subsequent stage And a control means for controlling the generation of the sub-scanning timing signal based on the timing signal transmitted from the external device.

The above-mentioned object is achieved by the second means in the first means, in which there are a plurality of line memories, and the control means is the second means for sequentially controlling writing and reading of each of the line memories.

Further, in the first means, the reading speed for each pixel of the external device is read out from the line memory of the control means by the reading speed discrimination signal transmitted from the external device connected in the latter stage. This is achieved by a third means for determining whether the speed is faster or slower than the speed, and wherein the control means controls the reading speed of the line memory according to the result of the determination by the determining means.

Further, the above-mentioned object is that in the third means, when the control means determines that the reading speed for each pixel of the external device is slower than the reading speed of the line memory of the control means, the image data of the image data is read. This is achieved by a fourth means that uses the image transfer signal of the external device for transfer and controls to use the image transfer signal of the image device when it is determined that reading is fast.

Further, in the first means, the control means processes the image data stored in the line memory in accordance with the read density instruction signal input from the external device to adjust the image data density of the external device. This is achieved by the fifth means for outputting as corresponding image data.

[0010]

In the first means, the control means controls the read timing of the line memory in response to the image data write signal transmitted from the external device, and the sub-scan timing based on the timing signal transmitted from the external device. Control signal generation.

In the second means, the control means are sequentially
It controls the writing and reading of each line memory.

In the third means, the discriminating means determines whether the reading speed of each pixel of the external device is faster or slower than the reading speed of the line memory of the control means according to the reading speed discriminating signal transmitted from the external device. To determine. The control means controls the read speed of the line memory according to the discrimination result of the discrimination means.

In the fourth means, when the determining means determines that the reading speed of each pixel of the external device is slower than the reading speed of the line memory of the controlling means, the controlling means transfers the image data to the image of the external device. When it is determined that the transfer signal is fast, the control means controls to use the image transfer signal of the image reading device.

In the fifth means, the control means processes the image data stored in the line memory in response to the read density instruction signal input from the external device, and converts the image data into image data corresponding to the image data density of the external device. Output.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

(1) First Embodiment FIG. 1 is a block diagram of an image reading apparatus according to the first embodiment. In the figure, 1 is a CCD for converting optical image information into an electric signal, 2 is a CCD driver for driving the CCD 1 by a signal of a timing generator described later, and 3 is various processing for the image signal output from the CCD 1. And
A signal processing unit that outputs an image signal as a digital signal,
Reference numeral 4 is a timing generator that generates various timing signals of the present device based on information from a CPU, which will be described later, and reference numeral 5 is a CPU that controls the present device by external control information.

Further, 6 is a motor driver for driving a motor by a control signal output from the CPU 5, and 7 is image data output from the signal processing unit 3 and an address of a line memory which will be described later output from the timing generator 4. A gate (1) for controlling output of a signal and a write enable signal (hereinafter abbreviated as WE) by the CPU 5,
Reference numeral 8 is a bidirectional gate (2) for controlling the image data output from the line memory described later, the address signal of the line memory output from the CPU 5 and the output of WE and the direction of the signal by the CPU 5, and 9 is a reading optical system. A pulse motor for driving the system or the document feeder, 10 is a line memory for storing one line of image data, 11 is an interface for inputting and outputting a control signal from an external device, a status signal of this device, and image data, 12 Is an image recording apparatus including a host computer together with a printer, an image recording medium, and the like.

Next, the operation of this embodiment will be described with reference to the timing charts of FIGS.

When a reading start signal is input from the image recording device 12, the timing generator 4 sends the CCD drive timing signal to the CCD in synchronization with the next line synchronization signal.
It is sent to the driver 2 and the reading of the original is started. At the same time, the CPU 5 sends a motor drive timing signal to the motor driver 6, and the motor driver 6 drives the pulse motor 9 based on this signal by the number of rotations corresponding to the moving distance of one line. The motor drive timing signal from the next line is sequentially output until the end of reading in synchronization with the first CCD drive timing signal after the line synchronization signal is input from the image recording device 12.

The CCD drive timing signal is output from the timing generator 4 at a cycle TC in order to make the light amount accumulation time of the CCD 1 constant, and the CCD 1 outputs a 1 at a cycle TC.
Image data for each line is sequentially output. Signal processing unit 3
Signal-processes the image data input from the CCD 1 and outputs it as digital image data. Since the image data output cycle TC of the CCD 1 is shorter than the interval of the line synchronization signal, the CCD 1 reads the same data until the next motor drive timing signal is output. Therefore, as the data output from the signal processing unit 3, the same data is output until the CCD drive timing signal is output immediately after the motor drive timing signal is output.

The CPU 5 outputs the motor drive timing signal and at the same time outputs the output enable signal of the gate (1) 7, and outputs the data output from the signal processing section and the write address of the line memory 10 output from the timing generator 4. The signal and WE are sent to the line memory 10 to store the image data in the line memory 10.

When the data for one line is stored,
The CPU 5 stops outputting the output enable signal of the gate (1) 7 and simultaneously outputs the output enable signal of the gate (2) 8. Further, the main scanning direction effective data signal is output to the image recording device 12. The image recording device 12 outputs an image transfer signal when the main scanning direction effective data signal is input. When the image transfer signal is input, the CPU 5 outputs a read address signal of the line memory 10 and an output enable signal (hereinafter abbreviated as OE) to the gate (2) 8, and then outputs a data strobe signal to the image recording device 12. Output. The image recording device 12 records the data for one pixel and then outputs the image transfer signal to this device again. CPU
After confirming the input of the image transfer signal, 5 stops the output of the data strobe signal.

When the image recording device 12 finishes recording the image data for one line, it outputs a line synchronization signal to this device. After confirming this, this apparatus stops the output of the valid data signal in the main scanning direction. Hereinafter, the above operation is repeated until the image recording device 12 finishes recording all images.

As described above, according to this embodiment,
By making it possible to control the output of the image data for each pixel by the CPU 5 of the image reading apparatus, the recording speed is slow because there is no large-capacity page memory, and 1
The original image can be read in synchronization with an image recording apparatus in which the recording speed of pixels or one line changes.

(2) Second Embodiment FIG. 4 is a block diagram of the image reading apparatus of the second embodiment. In the figure, reference numerals 1 to 12 are the same as in the first embodiment.

Reference numeral 13 denotes the image data output from the signal processing unit 3 and the address signal and WE of the line memory (2) output from the timing generator 4 which will be described later.
The gates (3) and 14 for controlling by the PU 5 control the image data output from the line memory, the address signal of the line memory (2) output from the CPU 5 and the output and signal direction of the WE by the CPU 5. Bidirectional gate (4), 15 is a line memory (2) for storing one line of image data, and 16 is a line memory (1)
A gate (5) for controlling the output data of 10 by the CPU 5 and a gate (6) for controlling the output data of the line memory (2) 15 by the CPU 5.

Next, the operation of this embodiment will be described based on the timing chart of FIG.

The driving method of the CCD 1, the driving method of the pulse motor 9, and the output operation of the image data from the signal processing unit 3 are the same as those in the first embodiment.

When the line synchronizing signal is input from the image recording device 12, the CPU 5 stops the output of the effective data signal in the main scanning direction, and the line memories (1) 10, (2) 15 which read the data of the previous line. Of the output enable signal of the gate and the output gate [gate (1) 7 and gate (5) 16 or gate (3) 13 and gate (6) 17] connected to the CPU 5 are stopped at the same time. Output the output enable signal of the gate connected to the CPU 5 and the output gate of the line memory different from the line memory from which the line data is read,
After confirming that the image data is ready for external output,
The main scanning direction effective data signal is output to the image recording device 12, and external output of the image data is started.

As described above, the line memory (1)
Reading of the image data for each line from 10, (2) 15 is performed by alternately using the two-line memories (1) 10, (2) 15. The output of image data for each pixel is the same as that in the first embodiment.

In parallel with the reading of the image data from the line memories (1) 10 and (2) 15, the CPU 5 outputs the motor drive timing signal and at the same time, the signal processing unit of the line memory different from the line memory in which the previous data was written. Three
The output enable signal of the gate [gate (1) 7 or gate (3) 13] connected to is output from the signal processing unit 3 to the connected line memory (1) 10 or (2) 15. The image data, the write address signal output from the timing generator 4 and WE are transmitted to store the image data.

As described above, the line memory (1)
The writing of the image data for each line to 10, 10 (2) 15 is also performed by alternately using the two line memories (1) 10, (2) 15. Hereinafter, the above operation is repeated until the image recording device 12 finishes recording all images.

As described above, according to this embodiment,
It is provided with two line memories (1) 10 and (2) 15, and the output of image data for each pixel is controlled by the CPU 5 of the image reading device, so that there is no page memory with a large capacity, so that recording is possible. Image recording apparatus 1 having a low speed and changing the recording speed of one pixel or one line
It is possible to read the original image in synchronization with No. 2 as well, and it is possible to shorten the overall reading time by simultaneously writing and reading the read data.

(3) Third Embodiment A block diagram of the image reading apparatus of the third embodiment is the second embodiment.
(Fig. 4). Each control signal is gate (1) 7
And the input signal to the gate (3) 13 is the signal processing unit 3
Data output from the timing generator 4 and line memories (1) 10 and (2) 1 output from the timing generator 4.
5 is the same as the second embodiment except that the address signal of No. 5 is WE and OE.

Next, the operation of this embodiment will be described. Prior to reading the original, the CPU 5 determines the recording speed for each pixel of the connected image recording device 12 according to the image recording device determination signal input from the image recording device 12 by the CPU of this device.
The operation speed of the apparatus is determined by discriminating whether the operation speed is slower or faster than the normal operation speed of No. 5. The operation when the connected image recording device 12 is the latter is the same as that of the second embodiment.

Next, the operation when the image recording device 12 connected based on the timing chart of FIG. 6 is the former will be described. The driving method of the CCD 1, the driving method of the motor 9, and the output operation of the image data from the signal processing unit 3 are the same as those in the first embodiment.

When the line synchronizing signal is input from the image recording device 12, the CPU 5 stops the output of the effective data signal in the main scanning direction, the line memory (1) 10 or (2) from which the image data of the previous line is read. 15, the signal processing unit 3
And a gate connected to the output gate [gate (1) 7, gate (5) 16 or gate (3) 13,
The output of the output enable signal of the gate (6) 17] is stopped, and at the same time, the gate and the output gate connected to the signal processing unit 3 of the line memory different from the line memory from which the image data of the previous line is read out [gate (1)
7, the gate (5) 16 or the gate (3) 13, the gate (6) 17], and the main scanning direction valid data signal to the image recording device 12.

In this way, the line memory (1) 10,
The reading of the image data for each line from (2) 15 is performed by alternately using the two line memories (1) 10 and (2) 15. In addition, the timing generator 4 has a read address signal and a write address signal,
WE and OE for each line memory (1) 10 and (2) 15 are output. That is, the line memory (1) 10 or (2) 1 used for reading data.
An address signal for reading and OE are output to 5,
An address signal for writing and WE are output to the line memory (1) 10 or (2) 15 used for writing image data.

Next, the output of image data for each pixel will be described with reference to the timing chart of FIG. The image recording device 12 outputs an image transfer signal when the main scanning direction effective data signal is input. When the image transfer signal is input, the timing generator 4 outputs a read address signal and OE to the line memory (1) 10 or (2) 15 used for reading. The image recording device 12 records the data for one pixel and then outputs the image transfer signal to this device again. The operation of writing the image data in the line memory (1) 10 or (2) 15 is the same as that in the second embodiment.
Hereinafter, the above operation is repeated until the image recording device 12 finishes recording all images.

As described above, according to this embodiment,
When the image recording device 12 has a high image speed such as a printer and can record at a constant speed,
Is discriminated by a discrimination signal input from the image recording device 12 when the recording speed is slow and recording at a constant speed is difficult such as a personal computer. In the former case, the CPU 5 controls the image data output timing. The output timing of the image data is C in the latter case.
By controlling with the PU 5, the document is read in synchronization with various image recording devices without having a large-capacity page memory, so that the document can be read at a speed corresponding to the connected image recording device. It becomes possible.

(4) Fourth Embodiment FIG. 8 is a block diagram of the image reading apparatus of the fourth embodiment. The circuit blocks designated by reference numerals 1 to 17 are the same as those in the third embodiment. Input gates (1) 7, (2) 8, (3) 13, (4) 14 to the line memories (1) 10, (2) 15
These output enable signals can be controlled by both the CPU 5 and the timing generator 4. The output timing of the input signals of these gates is the same as in the third embodiment. A latch circuit 18 latches the data output from the line memories (1) 10 and (2) 15 at the rising edge of the input clock.

Next, the operation of this embodiment will be described. Prior to reading the original, the CPU 5 determines whether the recording speed for each pixel of the connected image recording device 12 is slower than the operating time of the CPU 5 of this device, based on the image recording determination signal input from the image recording device 12. It is determined whether it is fast or not, whether the image transfer signal of the image recording device 12 is used to transfer the image data for each pixel or the image transfer clock of this device is used, and the reading operation of this device is determined.

When the connected image recording device 12 has a low recording speed such as a personal computer and the recording speed of one pixel or one line changes, the operation is output from the line memories (1) 10 and (2) 15. The same as in the second embodiment except that the generated image data is latched at the rising edge of the image transfer clock generated by this apparatus. If the connected image recording device 12 can record at a constant speed such as a printer, and the recording speed is faster than the operation time of the CPU 5 of this device and slower than the transfer time of one pixel of image data, the operation is Example 3 except that the image data output from the memories (1) 10 and (2) 15 are latched at the rising edge of the image transfer clock sent from the image recording device 12.
It is similar to the case of.

Next, based on the timing chart of FIG.
An operation will be described when the connected image recording device 12 has a memory and can record at a constant speed and can perform recording faster than the transfer time of one pixel of this device, or a device without an image transfer signal. ..

When the reading start signal is input from the image recording device 12, the timing generator 4 synchronizes the CCD driving timing signal with the CC in synchronization with the next line synchronizing signal.
The data is sent to the D driver 2 and the reading operation of the original is started. At the same time, the CPU 5 sends a motor drive timing signal to the motor driver 6, and the motor driver 6 drives the pulse motor 9 based on this signal by the number of rotations corresponding to the moving distance of one line. The motor drive timing signal from the next line is CC unless the CPU 5 receives a signal for motor drive suspension from the timing generator 4.
It is output in synchronization with the D drive timing signal until the end of reading. The driving method of the CCD 1 and the output operation of the image data from the signal processing unit 3 are the same as those in the first embodiment.

When the line synchronizing signal is input from the image recording device 12, the timing generator 4 outputs the gate (5) 16 or the gate (5) of the line memory different from the line memory from which the image data of the previous line is read. 6) The output enable signal of 17] and the effective data signal in the main scanning direction are output to the image recording device 12, and the read address signal and OE are sent to the connected line memory (1) 10 or (2) 15. Then, the image data is read. When the output of the image data of one line is completed, the timing generator 4 stops the output enable signal of the output gate of the line memory (1) 10 or (2) 15 read this time, and records the image data of the effective data signal in the main scanning direction. The output to the device 12 is stopped. Also in this embodiment, the read operation of the image data for each line from the line memories (1) 10 and (2) 15 uses the two line memories (1) 10 and (2) 15 alternately. To do.

In parallel with the reading of the image data from the line memories (1) 10 and (2) 15, the motor driving timing signal is output and at the same time, the timing generator 4 operates as the line memory in which the previous image data is written. Write address signals and WEs are sent to different line memories to store image data. In addition, line memory (1) 1
The writing of the image data for each line to 0, (2) 15 is also performed by alternately using the two line memories (1) 10, (2) 15.

Next, the line memories (1) 10 and (2) 1
A case where it is necessary to write the image data in the same line memory while reading the image data from No. 5 will be described based on the timing chart of FIG. In the figure, the image transfer clock is the image transfer clock of one pixel in this apparatus and also corresponds to the processing time of one pixel. That is, when the image transfer clock is "H", the output enable signal of the input gate to the line memory (1) 10 or (2) 15 is output to perform writing, and while the image transfer clock is "L", the line memory is (1) 10 or (2) 15 is read. Further, the image data output from the line memories (1) 10 and (2) 15 are latched at the rising timing of the image transfer clock.

In this way, the line memory (1) 10,
By using (2) 15 in a time-division manner within the image transfer clock, the same line memory (1) 10,
(2) It is possible to simultaneously perform writing and reading of image data to and from 15. Note that m <n (where m is the read line number of the line memory and n is the write line number of the line memory) is a condition for simultaneously writing and reading to and from the same line memory (1) 10 and (2) 15. There must be. If the above conditional expression is not satisfied, or if the difference between the line numbers of the image data output to the image recording device 12 and the output image data of the CCD 1 is 3 or more, the timing generator 4 turns the motor temporary. The stop signal is sent to the CPU 5, and the output enable signal of the input gates of the line memories (1) 10 and (2) 15 is not output. Hereinafter, the above operation is repeated until the image recording device 12 finishes recording all the images.

As described above, according to this embodiment,
The image transfer signal input from the image recording device 12 is used according to the determination signal input from the image recording device 12,
By determining whether to use the image transfer clock generated inside this device, the recording speed is slow and the recording speed of one pixel or one line is changed without having a large capacity page memory. An image recording device capable of recording at a constant speed, such as an image recording device such as a printer or a printer, the recording speed being higher than the operation speed of the CPU 5 of the image reading device and slower than the transfer time of one pixel of image data, Various image recording devices, such as an image recording device having an image memory, capable of recording at a constant speed, capable of recording faster than the transfer time of one pixel of image data of the image reading device, an image recording device having no image transfer signal, etc. The original can be read at a speed corresponding to the connected image recording apparatus.

(5) Fifth Embodiment The block diagram of the reading apparatus of the fifth embodiment is the same as that of the second embodiment. The operation of this embodiment will be described. Prior to the reading of the original, the CPU 5 determines the operation speed of this apparatus according to the original reading density instruction signal input from the image recording device 12. The operation when the document reading density instruction signal is equal to the reading density in the main scanning direction of this apparatus is the same as in the second embodiment.

Next, the operation when the original reading density instruction signal is different from the reading density in the main scanning direction of the present apparatus will be described based on the timing chart of FIG.

The CCD driving method, the motor driving method, the flow of the image data up to the writing of the image data in the line memory, and the output timing of the image data to the image recording device 12 are the same as those in the second embodiment.

When the image recording device 12 outputs the image transfer signal, the CPU 5 causes the line memory (1) 10 to operate as necessary.
Output the read address signal of the line memory (1)
Capture the required number of data stored in 10,
The image data is processed so that the reading density is instructed by the image recording device 12, and after the processing is completed, the image data for one pixel is output to the interface 11. Then, the data strobe signal is output to the image recording device 12. The image recording device 12 records the image data for one pixel and then outputs the image transfer signal to this device again. After confirming the input of the image transfer signal, the CPU 5 stops the output of the data strobe signal. Hereinafter, the above operation is repeated until the output of the image data of one line is completed.

As described above, according to this embodiment,
The read image data in the main scanning direction is processed by the CPU 5, and the image data is interpolated or thinned so that the original reading density input from the image recording device 12 is obtained. The original reading density can be made variable without a circuit.

[0056]

According to the first aspect of the present invention, the control means (CPU) controls the read timing of the image data for each pixel stored in the line memory. Since it does not have a large-capacity page memory, even if an image recording device with a low recording speed or a variable recording speed for one pixel or one line is connected, the image data is read in synchronization with the reading of the line memory. It becomes possible to read.

According to the second aspect of the present invention, since a plurality of line memories are provided and the control means sequentially controls writing and reading of each line memory, the overall document reading time is shortened. Is possible.

According to the third aspect of the invention, the external device is a device such as a printer having a high recording speed and capable of recording at a constant speed, and the image recording device is a personal computer or the like having a low recording speed and a constant recording speed. As in the case of a device that is difficult to record at the above speed, the reading speed for each pixel of the external device is faster or slower than the reading speed of the line memory of the control means, depending on the reading speed determination signal input from the external device. Since the control means controls the reading speed of the line memory according to the determination result, it is possible to control the reading speed of the line memory with respect to various connected image recording devices that do not have a large-capacity page memory. The original can be read at a corresponding speed.

According to the fourth aspect of the invention, the discriminating means discriminates from the reading speed discriminating signal inputted from the external device that the reading speed of each pixel of the external device is slower than the reading speed of the line memory of the control means. At this time, the control means controls the image transfer signal of the external device to be used for the transfer of the image data, so that the recording speed is slow or the recording of one pixel or one line is performed, such as a personal computer without a large capacity page memory. The original can be read in synchronization with various image recording apparatuses such as an image recording apparatus whose speed changes, and the original can be read at a speed corresponding to the connected image recording apparatus.

According to the fifth aspect of the invention, the image data stored in the line memory is processed by the read density instruction signal input from the external device, and output as image data corresponding to the image data density of the external device. Therefore, the image data density can be changed without having a special circuit for the expansion / contraction process of the image data in the main scanning direction.

[Brief description of drawings]

FIG. 1 is a control block diagram of an image reading apparatus according to a first embodiment of the present invention.

FIG. 2 is a timing chart of the image reading apparatus according to the first embodiment of the present invention.

FIG. 3 is a timing chart of the image reading apparatus according to the first embodiment of the present invention.

FIG. 4 is a control block diagram of an image reading apparatus according to a second embodiment of the present invention.

FIG. 5 is a timing chart of the image reading apparatus according to the second embodiment of the present invention.

FIG. 6 is a timing chart of the image reading apparatus according to the third embodiment of the present invention.

FIG. 7 is a timing chart of the image reading apparatus according to the third embodiment of the present invention.

FIG. 8 is a control block diagram of an image reading apparatus according to a fourth embodiment of the present invention.

FIG. 9 is a timing chart of the image reading apparatus according to the fourth embodiment of the present invention.

FIG. 10 is a timing chart of the image reading apparatus according to the fourth embodiment of the present invention.

[Explanation of symbols]

 1 CCD 2 CCD driver 3 signal processing unit 4 timing generator 5 CPU 6 motor driver 7, 8, 13, 14, 16, 17 gate 9 pulse motor 10, 15 line memory 11 interface 12 image recording device

Claims (5)

[Claims] 1. An image reading apparatus which reads an image of a document line by line while sub-scanning the document according to a sub-scanning timing signal for scanning the document in the sub-scanning direction and outputs the read image data. A line memory capable of storing image data for a line, and controlling the read timing of the line memory according to an image data write signal transmitted from an external device connected to the latter stage, and a timing transmitted from the external device. An image reading apparatus comprising: a control unit that controls generation of the sub-scanning timing signal based on a signal. 2. The image reading device according to claim 1, wherein there are a plurality of line memories, and the control means sequentially controls writing and reading of each of the line memories. 3. The read speed for each pixel of the external device is compared with the read speed of the line memory of the control means according to the read speed determination signal transmitted from the external device connected to the subsequent stage. An image reading apparatus comprising: a discriminating unit that discriminates whether it is fast or slow, and the control unit controls a reading speed of the line memory according to a discrimination result of the discriminating unit. 4. The control device according to claim 3, wherein the control device transfers the image data when the determination device determines that the reading speed of each pixel of the external device is slower than the reading speed of the line memory of the control device. An image reading device characterized by using an image transfer signal of an external device and controlling to use the image transfer signal of the image device when it is determined that reading is fast. 5. The image forming apparatus according to claim 1, wherein the control unit processes the image data stored in the line memory in response to the read density instruction signal input from the external device to generate an image corresponding to the image data density of the external device. An image reading device characterized by outputting as data.