JPH05175631A - Manufacture of hybrid integrated circuit device - Google Patents

Manufacture of hybrid integrated circuit device

Info

Publication number
JPH05175631A
JPH05175631A JP35583091A JP35583091A JPH05175631A JP H05175631 A JPH05175631 A JP H05175631A JP 35583091 A JP35583091 A JP 35583091A JP 35583091 A JP35583091 A JP 35583091A JP H05175631 A JPH05175631 A JP H05175631A
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
lead
substrate
hybrid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP35583091A
Other languages
Japanese (ja)
Inventor
Shigemi Ozasa
重実 小笹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP35583091A priority Critical patent/JPH05175631A/en
Publication of JPH05175631A publication Critical patent/JPH05175631A/en
Withdrawn legal-status Critical Current

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Abstract

PURPOSE:To provide a manufacturing method of a hybrid integrated circuit which is capable of setting a hybrid integrated circuit board in any arbitrary width dimensions. CONSTITUTION:A hybrid integrated circuit composite board 1 made in a first process is coupled with a plurality of hybrid integrated circuit boards 2 horizontally by way of a disposal board portion 9 respectively. The width dimensions of the disposal board portion 9 can be set arbitrarily within a specified range. Therefore, it is possible to set the width dimensions to a certain arbitrary extent irrespective of a lead pitch 'a' and the number 'n' of a lead terminal 6. It is, therefore, possible to obtain a hybrid integrated circuit device having a hybrid integrated circuit board 2 whose width dimensions can be arbitrarily set without determining its width dimensions uniformly based on the lead span 'a' and the number 'n' of the lead terminals to be used, if each hybrid integrated circuit board 2 is separated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、複数の混成集積回路基
板が集合された混成集積回路用集合基板にリード端子を
取り付けると共に、個々の混成集積回路基板に分離して
混成集積回路装置を製造する方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention attaches a lead terminal to a hybrid integrated circuit aggregate substrate in which a plurality of hybrid integrated circuit substrates are assembled, and separates the hybrid integrated circuit substrates into individual hybrid integrated circuit devices to manufacture a hybrid integrated circuit device. On how to do.

【0002】[0002]

【従来の技術】近年、混成集積回路装置はその回路基板
上の集積度が向上し、小型化が進むと共に製造、組立方
法の改良が進み、その生産性が向上するに至っている。
その具体的な例として図7、8に示すような混成集積回
路装置の製造方法が開示されており、これを図面に従っ
て説明する。縦横に切断線を介して複数の混成集積回路
基板を連ねた混成集積回路用集合基板が構成され、この
ような集合基板の単位で回路パターンの印刷や、電子部
品の実装などが行われる。その後、混成集積回路用集合
基板は、横方向の切断線に沿って分割され、個々の混成
集積回路基板が横に一列に連なった混成集積回路用集合
基板に分離される。図7の上側には、このように混成集
積回路基板が横に一列に連なった混成集積回路用集合基
板が示されている。図7に示されたように、混成集積回
路用集合基板1には、その縁に沿って一定の間隔でリー
ドランド4が形成されている。また、図7の下側には、
リードフレーム5が示されており、これには上記リード
ランド4と同じ間隔でリード端子6が櫛歯状に導出され
ている。そして、このリード端子6の先端には、二股或
はそれ以上の本数に枝分かれしたクリップ7が形成さ
れ、図8で示すように、このクリップ8が各々リードラ
ンド4の位置で上記混成集積回路用集合基板1の縁を挟
むよう取り付けられる。さらに、このクリップ7とリー
ドランド4とが半田で接合される。その後、このリード
端子6が図8のA−A’線に沿ってフレーム8から切り
離されると共に、切断線3に沿って個々の混成集積回路
基板2が切り離される。これによって、個々に分離した
混成集積回路装置が得られ、さらに必要に応じて混成集
積回路基板2の部分に絶縁保護塗装が施される。
2. Description of the Related Art In recent years, a hybrid integrated circuit device has been improved in the degree of integration on its circuit board, has been downsized, and has been improved in its manufacturing and assembling methods, thus improving its productivity.
As a specific example thereof, a method of manufacturing a hybrid integrated circuit device as shown in FIGS. 7 and 8 is disclosed, which will be described with reference to the drawings. A hybrid integrated circuit aggregate substrate is formed by connecting a plurality of hybrid integrated circuit substrates vertically and horizontally through a cutting line, and a circuit pattern is printed and electronic components are mounted in units of such an aggregate substrate. After that, the hybrid integrated circuit collective substrate is divided along a horizontal cutting line, and the individual hybrid integrated circuit substrates are separated into the hybrid integrated circuit collective substrates which are horizontally arranged in a row. On the upper side of FIG. 7, there is shown a hybrid integrated circuit assembly substrate in which the hybrid integrated circuit substrates are arranged side by side in a row. As shown in FIG. 7, lead lands 4 are formed on the hybrid integrated circuit aggregate substrate 1 along the edges thereof at regular intervals. Also, on the lower side of FIG.
A lead frame 5 is shown, on which lead terminals 6 are led out in a comb-like shape at the same intervals as the lead lands 4. A clip 7 branched into two or more branches is formed at the tip of the lead terminal 6. As shown in FIG. It is attached so as to sandwich the edge of the collective substrate 1. Further, the clip 7 and the lead land 4 are joined by solder. Thereafter, the lead terminals 6 are separated from the frame 8 along the line AA ′ in FIG. 8 and the individual hybrid integrated circuit boards 2 are separated along the cutting line 3. As a result, individually separated hybrid integrated circuit devices are obtained, and if necessary, an insulating protective coating is applied to the portion of the hybrid integrated circuit board 2.

【0003】このような一連の混成集積回路用集合基板
1を用いた製造方法は、混成集積回路装置の回路構成が
全て同じである場合に有効で、混成集積回路装置の多量
生産方式に適している。
The manufacturing method using such a series of hybrid integrated circuit collective substrates 1 is effective when the circuit configurations of the hybrid integrated circuit devices are all the same, and is suitable for a mass production method of the hybrid integrated circuit devices. There is.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、前述し
た従来技術に用いられる混成集積回路用集合基板1は切
断線3を介して個々の混成集積回路基板2が連なってお
り、混成集積回路基板2の上に印刷されたリードランド
4の間隔はリードフレーム5に一体的に形成されたリー
ド端子6の間隔と等しく対応しているため、混成集積回
路基板2の幅寸法(リードランド4の配列方向の寸法を
いう)は、印刷された集積回路に必要なリード端子6の
本数とそのピッチによって決定されてしまう。すなわ
ち、必要なリード端子6の本数をn本、リード端子6の
間隔、すなわちリードピッチをaとすると、前述した製
造方法では上記個々の混成集積回路基板2の幅寸法は一
律にn×aとなる。
However, in the hybrid integrated circuit aggregate substrate 1 used in the above-mentioned conventional technique, the individual hybrid integrated circuit substrates 2 are connected through the cutting line 3, and the hybrid integrated circuit substrate 2 Since the distance between the lead lands 4 printed on the upper surface corresponds to the distance between the lead terminals 6 formed integrally with the lead frame 5, the width dimension of the hybrid integrated circuit board 2 (in the arrangement direction of the lead lands 4). The term "dimensions" is determined by the number of lead terminals 6 and the pitch thereof required for the printed integrated circuit. That is, assuming that the required number of lead terminals 6 is n and the spacing between the lead terminals 6, that is, the lead pitch is a, the width dimensions of the individual hybrid integrated circuit boards 2 are uniformly n × a in the above-described manufacturing method. Become.

【0005】一般に混成集積回路基板2に印刷される回
路は大小様々な種類があり、混成集積回路基板2の寸法
とリード端子6の数は、混成集積回路装置の種類並びに
実装される電子部品の種類とその数等によって決定され
る。一方、リードフレームのリード端子の間隔である上
記リードピッチaは、規格で定められている。従って、
上記の方法で製造される混成集積回路装置は、使用する
リードフレーム5のリードピッチaと必要とするリード
端子6の本数nによって一律に定まってしまい、融通性
に乏しいという欠点があった。特に、最も端のリードラ
ンド4から混成集積回路基板2の端の縁までの距離は一
律にa/2と定まってしまい、回路設計等に当たって制
約を受けるという課題があった。
Generally, there are various kinds of circuits printed on the hybrid integrated circuit board 2 of various sizes, and the size of the hybrid integrated circuit board 2 and the number of lead terminals 6 are different depending on the type of the hybrid integrated circuit device and the electronic parts to be mounted. It is determined by the type and the number. On the other hand, the lead pitch a, which is the interval between the lead terminals of the lead frame, is defined by the standard. Therefore,
The hybrid integrated circuit device manufactured by the above method has a drawback that it is not flexible because it is uniformly determined by the lead pitch a of the lead frame 5 used and the required number n of lead terminals 6. In particular, the distance from the lead land 4 at the end to the edge of the end of the hybrid integrated circuit board 2 is uniformly set to a / 2, and there is a problem that the circuit design is restricted.

【0006】本発明は上記した問題を解決するためにな
されたものであって、その目的とするところは混成集積
回路基板を任意の幅寸法に設定可能な混成集積回路の製
造方法を提供する。
The present invention has been made to solve the above problems, and an object of the present invention is to provide a method for manufacturing a hybrid integrated circuit in which the hybrid integrated circuit substrate can be set to have an arbitrary width dimension.

【0007】[0007]

【課題を解消する為の手段】すなわち、上記した本発明
の目的を達成するための本発明の要旨は、複数の混成集
積回路基板を切断線を介して横方向に連ねた混成集積回
路用集合基板を作る工程と、等間隔でリードフレームの
長手方向に並べられたリード端子を、上記混成集積回路
基板の縁に沿って等間隔に設けられたリードランドに接
合する工程と、上記リード端子を所定の長さに切断する
と共に、上記切断線に沿って上記混成集積回路用集合基
板を切断し、個々の混成集積回路基板毎に分離する工程
とを有する混成集積回路装置の製造方法において、上記
混成集積回路用集合基板を作る工程は、複数の混成集積
回路基板が捨て基板を介して横方向に連なっている混成
集積回路用基板を作る工程であり、上記混成集積回路用
集合基板を個々の混成集積回路基板毎に分離する工程
は、捨て基板の両側の切断線で各混成集積回路基板を分
離する工程を有することを特徴とする混成集積回路装置
の製造方法である。
That is, the gist of the present invention for achieving the above-mentioned object of the present invention is to provide a set for a hybrid integrated circuit in which a plurality of hybrid integrated circuit boards are connected in a horizontal direction through a cutting line. A step of making a board; a step of joining lead terminals arranged in the longitudinal direction of the lead frame at equal intervals to lead lands provided at equal intervals along the edge of the hybrid integrated circuit board; A method of manufacturing a hybrid integrated circuit device, comprising: cutting the hybrid integrated circuit collective substrate along the cutting line along with cutting to a predetermined length, and separating each hybrid integrated circuit board into individual hybrid integrated circuit boards. The step of producing the hybrid integrated circuit aggregate substrate is a step of producing a hybrid integrated circuit substrate in which a plurality of hybrid integrated circuit substrates are connected in a lateral direction through a discard substrate. Separating the formed integrated circuit each substrate is a method for manufacturing a hybrid integrated circuit device characterized by comprising the step of separating each hybrid integrated circuit board along the line of each side of the discarded substrate.

【0008】[0008]

【作 用】上記した本発明の混成集積回路装置の製
造方法によれば、まず第一の工程で作られる混成集積回
路用集合基板は、複数の混成集積回路基板を捨て基板を
介して各々横方向に連接しているが、この捨て基板の幅
寸法は所定の範囲内で任意に設定できるため、混成集積
回路基板の幅寸法を、リードピッチaと使用するリード
端子nの本数に拘らず、或る程度任意の寸法とすること
ができる。具体的には、混成集積回路基板2の最も端の
リードランドから同基板2の端までの距離を必ずしもa
/2とする必要はなく、その距離をa/2以上或は以下
とすることが可能となる。従って、捨て基板の両側の切
断線で各混成集積回路基板を分離すれば、リードピッチ
aと使用するリード端子nの本数により一律に決められ
た幅ではなく、任意の幅の混成集積回路用基板を有する
混成集積回路装置が得られる。
[Operation] According to the above-described method for manufacturing a hybrid integrated circuit device of the present invention, the hybrid integrated circuit collective substrate formed in the first step first has a plurality of hybrid integrated circuit substrates disposed side by side through the discarded substrates. Although they are connected in the same direction, the width dimension of this waste substrate can be arbitrarily set within a predetermined range. Therefore, the width dimension of the hybrid integrated circuit substrate is set regardless of the lead pitch a and the number of lead terminals n used. It can be of some arbitrary size. Specifically, the distance from the end lead land of the hybrid integrated circuit substrate 2 to the end of the substrate 2 is not necessarily a.
It is not necessary to set the distance to / 2, and the distance can be set to be a / 2 or more or less. Therefore, if each hybrid integrated circuit board is separated by cutting lines on both sides of the waste substrate, the width is not uniformly determined by the lead pitch a and the number of lead terminals n to be used, but a hybrid integrated circuit board having an arbitrary width. A hybrid integrated circuit device having is obtained.

【0009】[0009]

【実 施 例】以下、本発明の実施例について、図面に
従って詳細に説明する。図1および図2は本発明の一実
施例を示す図であり、従来例を説明した図7、8に対応
する図である。ここで、混成集積回路用集合基板1は横
方向に連なる複数の混成集積回路基板2の間に捨て基板
9を形成し、該捨て基板9の両端は図に示す如く切断線
3を介して左右の混成集積回路基板2に各々連接されて
いる。そして上記混成集積回路基板2上に各々印刷形成
されたリードランド4は混成集積回路用集合基板1の縁
に沿って等間隔aとなるように形成される。この実施例
では、上記捨て基板9の幅bは上記リードランド4の間
隔aより小さく、a>bの関係を有しており、互いに隣
接する混成集積回路基板の最も端のリードランド4の間
に形成されている。
EXAMPLES Examples of the present invention will be described in detail below with reference to the drawings. 1 and 2 are diagrams showing an embodiment of the present invention and are diagrams corresponding to FIGS. 7 and 8 for explaining a conventional example. Here, the collective substrate 1 for a hybrid integrated circuit has a waste substrate 9 formed between a plurality of hybrid integrated circuit substrates 2 which are continuous in the lateral direction, and both ends of the waste substrate 9 are left and right via cutting lines 3 as shown in the figure. Are respectively connected to the hybrid integrated circuit boards 2. The lead lands 4 formed by printing on the hybrid integrated circuit board 2 are formed at equal intervals a along the edge of the hybrid integrated circuit aggregate board 1. In this embodiment, the width b of the abandoned substrate 9 is smaller than the interval a of the lead lands 4 and has a relation of a> b, and between the lead lands 4 at the end of adjacent hybrid integrated circuit boards. Is formed in.

【0010】リードフレーム5は、フレーム8からリー
ド端子6を一定の間隔で導出してなり、リード端子6の
先端部にクリップ7を備えている。上記リードランド4
は、このリードフレーム5のリード端子6の間隔、すな
わちリードピッチaと等しい間隔で形成されている。そ
して、図2に示す如く、上記リード端子6のクリップ7
で混成集積回路用集合基板1のリードランド4の部分を
クリップし、その後このクリップ7をリードランド4に
半田付けする。その後、図2の点線A−A’に沿ってリ
ード端子6を切断して連結部8から切り離し、同時に上
記各々の切断線3の所を切断し、上記捨て基板9を取り
除くことによって図3に示すような独立した混成集積回
路装置10が複数個同時に完成する。
The lead frame 5 is formed by leading the lead terminals 6 from the frame 8 at regular intervals, and has a clip 7 at the tip of the lead terminal 6. Lead Land 4 above
Are formed at intervals between the lead terminals 6 of the lead frame 5, that is, at intervals equal to the lead pitch a. Then, as shown in FIG. 2, the clip 7 of the lead terminal 6 is formed.
The portion of the lead land 4 of the hybrid integrated circuit aggregate substrate 1 is clipped, and then the clip 7 is soldered to the lead land 4. After that, the lead terminals 6 are cut along the dotted line AA ′ in FIG. 2 to separate them from the connecting portion 8, and at the same time, the respective cutting lines 3 are cut, and the abandoned substrate 9 is removed. A plurality of independent hybrid integrated circuit devices 10 as shown are simultaneously completed.

【0011】このように、一連の混成集積回路用集合基
板1を形成する時に、あらかじめ幅bなる捨て基板を設
けることにより、図3に示す完成された混成集積回路装
置10の混成集積回路基板2の幅はn×a−bとなる。
但し、nは一つの混成集積回路基板2に取り付けられた
リード端子6の数、aはそのリード端子6のリードピッ
チである。このことは従来の捨て基板を設けない製法に
よってできる混成集積回路装置よりも、少なくとも捨て
基板9の幅だけ混成集積回路基板2の幅を狭くすること
が可能となる。しかも、従来の手法では混成集積回路基
板2の端から最も端のリードランド4のまでの距離が一
律にa/2と決められていたものが、これを寸法は(a
−b)/2とすることができる。そしてこの寸法は、捨
て基板9の幅寸法bを変えることで、任意の値に設定す
ることが可能となる。具体的には、混成集積回路装置1
0全体を小型化することはもとより、回路設計の制約を
少なくすることができるようになる。
In this way, when forming a series of hybrid integrated circuit aggregate substrates 1, a waste substrate having a width b is provided in advance, so that the hybrid integrated circuit substrate 2 of the completed hybrid integrated circuit device 10 shown in FIG. 3 is formed. Has a width of n × a−b.
However, n is the number of lead terminals 6 attached to one hybrid integrated circuit board 2, and a is the lead pitch of the lead terminals 6. This makes it possible to reduce the width of the hybrid integrated circuit board 2 by at least the width of the waste substrate 9 as compared with the conventional hybrid integrated circuit device manufactured by the manufacturing method without providing the waste substrate. Moreover, in the conventional method, the distance from the end of the hybrid integrated circuit board 2 to the lead land 4 at the end is uniformly determined as a / 2.
-B) / 2. This dimension can be set to an arbitrary value by changing the width dimension b of the waste substrate 9. Specifically, the hybrid integrated circuit device 1
In addition to downsizing the entire 0, restrictions on circuit design can be reduced.

【0012】図4、図5は本発明の他の実施例を示す図
であるが、ここに示す製法の手順は図1、図2に示す手
順と基本的に共通する。そのため、全体の説明は省略
し、相違点のみを説明すると、この図4と図5に示した
実施例では、捨て基板9がリードランド4を少なくとも
一個を含む幅を有する。すなわち、図4に示す捨て基板
9は、リードランド4の幅より広く、しかもリード端子
6のピッチaの2倍2aより狭く設定されており、各々
に各々リードランド4’、4”を1個ずつ含んでいる。
この捨て基板9、9上のリードランド4’、4”に接続
されたリード端子6’、6”は、実際に使用されず、捨
て基板9、9と共に廃棄される。すなわち、図5に示す
如く、リード端子6を点線で示すA−A’間で切断する
と共に、切断線3の部分で混成集積回路用集合基板1を
切断し、捨て基板9と共にリード端子6’、6”を廃棄
する。これにより、図6に示すような独立した混成集積
回路装置10が同時に複数個完成する。
4 and 5 are views showing another embodiment of the present invention, the procedure of the manufacturing method shown here is basically the same as the procedure shown in FIGS. Therefore, if the description is omitted and only the differences are described, in the embodiment shown in FIGS. 4 and 5, the waste substrate 9 has a width including at least one lead land 4. That is, the waste substrate 9 shown in FIG. 4 is set to be wider than the width of the lead land 4 and narrower than twice the pitch a of the lead terminals 6 and 2a, and one lead land 4 ′ and 4 ″ is provided for each. Includes each.
The lead terminals 6 ′ and 6 ″ connected to the lead lands 4 ′ and 4 ″ on the discarded substrates 9 and 9 are not actually used and are discarded together with the discarded substrates 9 and 9. That is, as shown in FIG. 5, the lead terminal 6 is cut along the line AA ′ indicated by a dotted line, the hybrid integrated circuit aggregate substrate 1 is cut along the cutting line 3, and the lead terminal 6 ′ is disposed together with the discarded substrate 9. , 6 ″ are discarded. As a result, a plurality of independent hybrid integrated circuit devices 10 as shown in FIG. 6 are simultaneously completed.

【0013】以上の如く、上記した捨て基板9をリード
ランド4を含む位置に設けることにより、混成集積回路
基板2の幅寸法は、a(n+1)−bとなる。すなわ
ち、ここで、b<aとすれば、リード端子6の本数nと
リードピッチaとが同じである場合、図4と図5に示さ
れた実施例により製造される混成集積装置の混成回路基
板2の幅は、上記図7と図8に示された従来例により製
造される混成集積回路装置と比較して、混成集積回路基
板2の幅を広くすることができる。逆に、b>aとすれ
ば、図4と図5に示された実施例により製造される混成
集積装置の混成回路基板2の幅は、上記図7と図8に示
された従来例により製造される混成集積回路装置と比較
して、混成集積回路基板2の幅を狭くすることができ
る。このように、捨て基板9の幅を変えることで、得ら
れる混成集積回路装置の混成集積回路基板2の幅は、a
×nより狭くも、また広くもすることが可能であり、任
意の幅の混成集積回路基板を有する混成集積回路装置が
従来と実質的に同じ工程を経て製造することができ、混
成集積回路基板の幅を調整する特別な工程を必要としな
い。
As described above, the width dimension of the hybrid integrated circuit substrate 2 becomes a (n + 1) -b by providing the above-mentioned waste substrate 9 at the position including the lead land 4. That is, if b <a here, when the number n of lead terminals 6 and the lead pitch a are the same, the hybrid circuit of the hybrid integrated device manufactured by the embodiments shown in FIGS. 4 and 5. As for the width of the substrate 2, the width of the hybrid integrated circuit substrate 2 can be made wider than that of the hybrid integrated circuit device manufactured by the conventional example shown in FIGS. 7 and 8. On the contrary, if b> a, the width of the hybrid circuit board 2 of the hybrid integrated device manufactured by the embodiments shown in FIGS. 4 and 5 is the same as that of the conventional example shown in FIGS. The width of the hybrid integrated circuit board 2 can be reduced as compared with the hybrid integrated circuit device to be manufactured. In this way, by changing the width of the waste substrate 9, the width of the hybrid integrated circuit substrate 2 of the obtained hybrid integrated circuit device is a
The hybrid integrated circuit device can be made narrower or wider than × n, and a hybrid integrated circuit device having a hybrid integrated circuit substrate of an arbitrary width can be manufactured through substantially the same steps as conventional ones. It does not require any special process to adjust the width of the.

【0015】[0015]

【発明の効果】以上説明した通り、混成集積回路基板の
幅を調整する特別な工程を必要とせずに、各種幅寸法の
混成集積回路基板を有する混成集積回路装置を製造する
ことができるようになる。
As described above, a hybrid integrated circuit device having hybrid integrated circuit boards of various width dimensions can be manufactured without requiring a special step of adjusting the width of the hybrid integrated circuit board. Become.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明からなる混成集積回路装置の製造方法の
一例を示す説明図である。
FIG. 1 is an explanatory view showing an example of a method for manufacturing a hybrid integrated circuit device according to the present invention.

【図2】図1に示す混成集積回路用集合基板とリードフ
レームとが接合している状態を示す図である。
FIG. 2 is a diagram showing a state in which the collective substrate for the hybrid integrated circuit shown in FIG. 1 and a lead frame are joined together.

【図3】本発明からなる製法によって混成集積回路装置
が完成した時の状態を示す図である。
FIG. 3 is a diagram showing a state when a hybrid integrated circuit device is completed by the manufacturing method according to the present invention.

【図4】本発明からなる混成集積回路装置の製造方法の
他の実施例を示す説明図である。
FIG. 4 is an explanatory view showing another embodiment of the method for manufacturing the hybrid integrated circuit device according to the present invention.

【図5】図5に示す混成集積回路用集合基板とリードフ
レームとが接合している状態を示す図である。
FIG. 5 is a view showing a state where the collective substrate for the hybrid integrated circuit shown in FIG. 5 and a lead frame are joined.

【図6】本発明の他の製法によって混成集積回路装置が
完成した時の状態を示す図である。
FIG. 6 is a diagram showing a state when a hybrid integrated circuit device is completed by another manufacturing method of the present invention.

【図7】従来の混成集積回路装置の製造方法を説明する
説明図である。
FIG. 7 is an explanatory diagram illustrating a conventional method for manufacturing a hybrid integrated circuit device.

【図8】図8に示す混成集積回路用集合基板とリードフ
レームとが接合している状態を示す図である。
FIG. 8 is a diagram showing a state in which the collective substrate for the hybrid integrated circuit shown in FIG. 8 and a lead frame are joined together.

【符号の説明】[Explanation of symbols]

1 混成集積回路用集合基板 2 混成集積回路基板 3 切断線 4 リードランド 5 リードフレーム 6 リード端子 9 捨て基板 10 混成集積回路装置 1 Hybrid Integrated Circuit Assembly Board 2 Hybrid Integrated Circuit Board 3 Cutting Line 4 Lead Land 5 Lead Frame 6 Lead Terminal 9 Discarded Board 10 Hybrid Integrated Circuit Device

Claims (1)

【整理番号】 0030497−01 【特許請求の範囲】[Reference number] 0030497-01 [Claims] 【請求項1】 複数の混成集積回路基板を切断線を介し
て横方向に連ねた混成集積回路用集合基板を作る工程
と、等間隔でリードフレームの長手方向に並べられたリ
ード端子を、上記混成集積回路基板の縁に沿って等間隔
に設けられたリードランドに接合する工程と、上記リー
ド端子を所定の長さに切断すると共に、上記切断線に沿
って上記混成集積回路用集合基板を切断し、個々の混成
集積回路基板毎に分離する工程とを有する混成集積回路
装置の製造方法において、上記混成集積回路用集合基板
を作る工程は、複数の混成集積回路基板が捨て基板を介
して横方向に連なっている混成集積回路用基板を作る工
程であり、上記混成集積回路用集合基板を個々の混成集
積回路基板毎に分離する工程は、捨て基板の両側の切断
線で各混成集積回路基板を分離する工程を有することを
特徴とする混成集積回路装置の製造方法。
1. A step of producing a hybrid integrated circuit aggregate substrate in which a plurality of hybrid integrated circuit substrates are connected in a horizontal direction through a cutting line, and lead terminals arranged at equal intervals in a longitudinal direction of a lead frame are provided. A step of joining to lead lands provided at equal intervals along the edge of the hybrid integrated circuit board, cutting the lead terminals to a predetermined length, and cutting the hybrid integrated circuit aggregate board along the cutting line. In the method of manufacturing a hybrid integrated circuit device, which comprises a step of cutting and separating each hybrid integrated circuit board, in the step of producing the hybrid integrated circuit collective substrate, a plurality of hybrid integrated circuit boards are disposed via a waste substrate. This is a step of making a substrate for a hybrid integrated circuit that is continuous in the lateral direction. The step of separating the hybrid integrated circuit collective substrate into individual hybrid integrated circuit substrates is performed by cutting lines on both sides of the discarded substrate. Basis A method of manufacturing a hybrid integrated circuit device, comprising the step of separating the plates.
JP35583091A 1991-12-21 1991-12-21 Manufacture of hybrid integrated circuit device Withdrawn JPH05175631A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35583091A JPH05175631A (en) 1991-12-21 1991-12-21 Manufacture of hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35583091A JPH05175631A (en) 1991-12-21 1991-12-21 Manufacture of hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH05175631A true JPH05175631A (en) 1993-07-13

Family

ID=18445964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35583091A Withdrawn JPH05175631A (en) 1991-12-21 1991-12-21 Manufacture of hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH05175631A (en)

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