JPH05175415A - Integrated circuit package - Google Patents

Abstract

PURPOSE:To suppress a mounting space to the minimum degree and to prevent deterioration of electric characteristics and performances by containing a replaceable delay element, which is adjusted with a delay time, in an integrated circuit package. CONSTITUTION:An integrated circuit 102 is mounted in a ceramic case 101, which is the base of an integrated circuit package. A delay element 103 is provided in the delay-element containing part in the ceramic case 101. A terminal 108 of the integrated circuit 102 is connected to a lead 104 through a terminal 109, the delay element 103, leads 1051 and 1052 and wirings 1111 and 1112. The output of the delay circuit 102 is delayed by the delay time through the delay element 103 and transmitted to the lead 104. The leads 1051 and 1052 have the spring property. The delay element 103 has the structure, which can be replaced. As the delay elements 103, the elements having various kinds of delay times are prepared. The delay time can be adjusted by replacing the elements.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit package for accommodating integrated circuits, and more particularly to a skew adjustment function between output signals of a clock driver for supplying clocks to a large number of integrated circuits or a clock supplied from the clock driver. The present invention relates to an integrated circuit package having a skew adjustment function for another integrated circuit.

[0002]

2. Description of the Related Art A conventional integrated circuit package has a structure in which the pins of the integrated circuit housed inside and the pins of the integrated circuit package are electrically connected in a one-to-one, one-to-many or a plurality of one-to-one combination and output. No means for adjusting the signal transmission time was provided.

[0003]

In the above-mentioned conventional integrated circuit package, the pins of the integrated circuit housed inside and the pins of the integrated circuit package are electrically connected, and the transmission time of the output signal is adjusted. Since a means for controlling the skew is not provided, when a skew occurs due to variations in a plurality of outputs and loads, it is necessary to place a skew adjusting circuit around the integrated circuit package so as to minimize the skew.

The skew adjustment circuit naturally requires a mounting space, and since there are a plurality of outputs, it requires a large mounting space. Further, by ensuring such a mounting space, the wiring distance to the integrated circuit of the connection destination becomes long, and there is a problem that the electrical characteristics and performance deteriorate. This is especially a problem in an integrated circuit package of a clock driver for driving a clock.

The present invention has been made in view of the problems of the above-mentioned conventional technique, and by providing the skew adjusting means, a large mounting space is not required and the electrical characteristics and It is an object to realize an integrated circuit package without performance deterioration.

[0006]

SUMMARY OF THE INVENTION An integrated circuit package of the present invention is an integrated circuit package containing an integrated circuit, wherein an electrical connection between an input / output pin of the integrated circuit and a pin of the integrated circuit package connected to the input / output pin. A delay element accommodating portion for detachably accommodating a delay element having an electrical delay time is provided in the middle of the target path.

[0007]

Since the signal transmission time between the input / output pin of the integrated circuit and the pin of the integrated circuit package is delayed according to the delay time of the delay element accommodated in the delay element accommodating portion, the delay elements having different delay times are prepared. Then, by exchanging this, skew adjustment can be performed in the integrated circuit package.

[0008]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a sectional view showing the structure of the essential part of an embodiment of the present invention.

In this embodiment, an integrated circuit 102 is mounted in a ceramic case 101 which is the base of the integrated circuit package. A lead 108 connects a terminal 108 provided around the integrated circuit 102 and a terminal 109 of the ceramic case 101. The delay element 10 accommodated in the delay element accommodating portion provided in the ceramic case 101 from the terminal 109 by the wiring 111 ₁ in the ceramic case 10 and the lead 105 ₁ connected to the wiring 111 _1.
Connected with 3. Delay element 10 having electrical delay time
3, a lead 105 ₂ and a lead 11 ₁₂ are provided on the side of the anti-integrated circuit 102 for electrical connection. Wiring 111 ₂ in the ceramic case is connected to the lead 104 which is an external terminal of the integrated circuit package.
Further, an integrated circuit cap 106 for protecting the integrated circuit 102 and a delay element cap 107 for protecting the delay element 103 are provided respectively.

In this embodiment configured as described above,
Is a terminal 108 of the integrated circuit 102, a terminal 109, a delay
Element 103, each lead 105₁, 105₂And each wiring 1
11 ₁, 111₂Be connected to the lead 104 via
Therefore, the output of the integrated circuit 102 has the delay element 103.
It is transmitted to the lead 104 with a delay of the delay time. here
Each lead 105₁, 105₂Has a spring property, and this
Therefore, the delay element 103 has a replaceable structure. Well
The delay element 103 has various delay times.
Is prepared and the delay time is adjusted by exchanging this
Is possible.

FIG. 2 is a circuit diagram when the embodiment shown in FIG. 1 is used in an actual circuit. FIG. 2A shows an example used for an output gate, and FIG. 2B shows an example used for an input gate.

In the example illustrated in FIG. 2 (a),
The output gate 2 with four outputs is provided in the integrated circuit package 215.
12, and each output of the output gate 212 and wiring 217₁~ 2
17_Four4 delay elements 21 connected via respective
Three₁~ 213_FourAnd are housed. Also, the integrated circuit package
Inside the cage 216 are four input gates 214₁~ 214_Four
Is housed. Each of these delay elements 213₁~ 21
Three_FourAnd each input gate 214 ₁~ 214_FourIs wiring 218₁~
218_FourAre respectively connected via.

In the adjusting method of this embodiment, the outputs of the input gates 214 _{1 to} 214 ₄ are compared with each other, and the wiring 21
Adjustment is performed by replacing the delay elements 213 _{1 to} 213 ₄ together with the variations due to 8 _{1 to} 218 ₄ and the output variation of the output gate 212.

Since the integrated circuit package 215 accommodates the delay elements including the wiring portion as described above, when wiring is performed outside the conventional integrated circuit package and the delay elements are arranged. Compared with the above, the mounting space is significantly reduced, and the total delay time from the output gate 212 to the input gates and each of the input gates 214 _{1 to} 214 ₄ can be reduced, and the performance of the device can be improved. It was

In the example illustrated in FIG. 2B,
Output gate 22 with four outputs in integrated circuit package 225
2 is accommodated, it is in an integrated circuit package 226 and four delay elements 223 ₁ to 223 _4, each of the delay elements 223 ₂₁ to
23 ₄ and the wiring 228 _{1-228 2} four input gates 224 ₁ to 224 ₄ which are connected via respectively is accommodated. Each output of the output gate 222 has wirings 227 ₁ to 2 2.
27 ₄ is supplied to the delay elements 223 ₁ to 223 ₄ via respectively.

The effect in the example shown in FIG. 2B is the same as that in the case of FIG. Although the method shown in FIG. 2A is simpler in consideration of the adjustment method, the variation in each output of the output gate 222 and each wiring 227 are different.
_If the variation of the delay times of _{1 to} 227 ₄ can be suppressed to be sufficiently small, the delay time is defined at the time of shipping inspection of the integrated circuit package so that each delay element 223 _{1 to} 223 ₄ can satisfy the constant delay time. It is also possible to adjust.

[0018]

As described above, according to the present invention, by mounting the replaceable delay element for adjusting the delay time in the integrated circuit package, the mounting space can be minimized.
In addition, there is an effect that the device performance can be improved by the amount of the shortened delay time caused by the reduction of the mounting space.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a configuration of a main part of an embodiment of the present invention.

2A and 2B are circuit diagrams when the embodiment shown in FIG. 1 is used in an actual circuit, in which FIG. 2A shows an example used for an output gate, and FIG. 2B shows an example used for an input gate. ..

[Explanation of symbols]

101 ceramic case 102 integrated circuits 103,213 _{1-213 4,} 223 ₁ to 223 ₄ delay elements 104, 105 _1, 105 _2, 110 lead 106 integrated circuits cap 107 delay element cap 109 terminals 111 _1, 111 _2, 217 _{1-217 4,} 218 ₁ to 21
8 ₄ , 227 _{1 to} 227 ₄ , 228 _{1 to} 228 ₄ Wiring 212, 222 Output gates 214 _{1 to} 214 ₄ , 224 _{1 to} 224 ₄ Input gates 215, 216, 225, 226 Integrated circuit packages

Claims (1)

[Claims] 1. An integrated circuit package containing an integrated circuit, wherein an electric delay time is provided in the middle of an electric path between an input / output pin of the integrated circuit and a pin of the integrated circuit package connected to the input / output pin. An integrated circuit package comprising: a delay element accommodating portion for detachably inserting an element.