JPH05160796A - Test equipment for pcm terminal station equipment - Google Patents

Abstract

PURPOSE:To simplify the digital milli-watt test for the PCM terminal station equipment processing a PCM-coded signal by a sampling frequency of 8kHz or over. CONSTITUTION:A changeover circuit 11 used to input a digital milli-watt signal 21C and sampling frequency signal 22 directly externally and selection circuits 18, 19 are provided to a CODEC circuit 15 being an object of the digital milli- watt test. Since the digital milli-watt signal is directly inputted to the CODEC circuit 15 to test the CODEC circuit 15, pattern data for the standard digital milli-watt test having been used in a conventional device are used as they are and the test is simplified.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test apparatus for PCM terminal equipment, and in particular, PCM-encodes transmission information at a sampling frequency of 8 KHz or higher and P
The present invention relates to a digital milliwatt test device for a PCM terminal station device having a codec circuit for decoding a CM-encoded received signal.

[0002]

2. Description of the Related Art A digital milliwatt test of a PCM terminal device is a test for setting and confirming a reference level in the device. As a general test method, first, the level of the receiving side is set, and then, the level of the transmitting side is set as the transmission / reception opposite side while monitoring the level of the receiving side.

In this case, since the levels of the transmitting and receiving circuits cannot be set at the same time, the receiving level is set while inputting a reference signal to the receiving circuit, considering only the receiving circuit. The setting is called the digital milliwatt test.

Specifically, a coding system called μ-Law is adopted in North America, and in this system, a reference analog signal (sine curve wave of 0 dBm 0,1 KHz) is sampled at a sampling frequency of 8 KHz. Then, the digital milliwatt signal having the pattern as shown in FIG. 3 obtained as a result is input to the codec circuit of the receiving circuit, and the level is set while decoding this.

In order to perform a digital milliwatt test in a codec circuit of a PCM terminal device which codes transmission information at a sampling frequency of 8 KHz and decodes a received signal coded at a sampling frequency of 8 KHz, as described above, A digital milliwatt signal (FIG. 3) obtained by coding the reference analog signal according to the μ-Law law using the sampling frequency can be used.

On the other hand, a signal in a band larger than 4 KHz is transmitted to the PC.
It is well known that sampling at a frequency higher than 8KHz is necessary to achieve M conversion, and recently, such 4KH
Wideband signals larger than z are being used for PCM communication.

In this case, two or more time slots in one frame are assigned to one channel, two frames form one multi-frame, and a synchronization signal is provided in the first time slot of the first frame. A wide band signal coded at a sampling frequency higher than 8 KHz is transmitted by using a frame structure in which data bits are allocated to the remaining time slots.

An example of the frame structure at this time is shown in FIG.
In the figure, S is a primary group frame synchronization bit, F1 to F8 are synchronization signals, and D1 to D8 are data bits.

In the digital milliwatt test of the PCM terminal equipment for performing the signal processing of the multiplexing system realized by such a frame structure, the synchronization signal is similarly assigned to the first time slot of the first frame and the remaining It is necessary to generate a complicated digital milliwatt pattern (which is different from the pattern in FIG. 3) in which the digital pattern obtained by coding the analog reference signal at the sampling frequency of 8 kHz or more actually sampled is assigned to the time slot. .

FIG. 2B shows a frame structure of digital milliwatt data corresponding to the digital data frame structure of FIG. 2A, and T1 'to T4' are 8-bit patterns of the digital milliwatt signal, respectively. T1 ~ T
Naturally, it will be different from each of the four patterns.

As described above, in the digital milliwatt test of the codec circuit in the PCM terminal equipment using the sampling frequency higher than 8 KHz, the standard pattern data shown in FIG. There is a drawback in that it is necessary to obtain a corresponding digital milliwatt pattern to form a frame structure as shown in FIG.

[0012]

SUMMARY OF THE INVENTION Therefore, the present invention has been made to solve the drawbacks of the prior art, and an object thereof is to always use a standard digital milliwatt pattern regardless of the sampling frequency. An object of the present invention is to provide a digital milliwatt test device for a terminal device.

[0013]

According to the present invention, there is provided a PCM terminal device having a codec circuit for PCM-encoding transmission information at a sampling frequency of 8 KHz or higher and decoding a received signal PCM-encoded at a sampling frequency of 8 KHz or higher. A digital milliwatt tester, comprising means for directly inputting a sampling frequency of 8 KHz and pattern data obtained by sampling a predetermined reference analog signal at the sampling frequency of 8 KHz and encoding the code data to the codec circuit. A test device for a PCM terminal device is obtained.

[0014]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram of an apparatus showing an embodiment of the present invention. First, as an example, two or more time slots in the above-mentioned one frame are assigned to one channel, two frames form one multi-frame, and a synchronization signal is provided in the first time slot of the first frame. An example of a PCM terminal station device for realizing a frame structure (frame of FIG. 2A) in which data bits are allocated to the remaining time slots will be described.

The PCM voice coding apparatus having means for PCM-coding the transmission voice signal 25 to output the transmission data 24, decoding the reception data 21 and outputting the reception voice signal 23 has the following configuration.

First and second F1F0 memories 13 and 14 for converting the speeds of the transmission data 25a and the reception data 22, respectively, and a synchronization signal generation circuit 16 for generating a synchronization signal 27 for ensuring synchronization between frames. The sync signal detection circuit 17 and the transmission voice signal 25 are PCM-encoded according to the input clock signal 26, and the transmission data 25a is transmitted.
To the first F1F0 memory 13 and a clock signal 26, and outputs the first F1F0 memory 13
The transmission data 25a written in the
, And outputs the transmission data 24 having the above-mentioned frame structure, writes the reception data 22 into the second F1F0 memory 14, and inputs the same into the synchronization signal detection circuit 17, the encoding means and the decoding means. And the codec circuit 15 having means.

As one embodiment of the present invention, the received data 2
The digital milliwatt test switching circuit 11 is provided without directly inputting 1 to the channel interface circuit 12,
When performing the digital milliwatt test, the received data 21 is directly input to the codec circuit 15.

In the present embodiment, the feature of the present invention is that when performing a digital milliwatt test, the frame configuration of FIG. 2A is realized by the digital milliwatt test switching circuit 11 and the selection circuits 18 and 19. The circuit on the receiving side for this purpose, that is, the channel interface circuit 11, the F1F0 memory 14 and the synchronization signal detection circuit 17 is disconnected, and the digital milliwatt signal transmitted as the reception data 21 is directly input to the codec circuit 15.

The operation will be described. In the case of normal voice signal transmission / reception, the received data 21 is switched by the digital milliwatt test switching circuit 11 and input to the channel interface circuit 12. Furthermore, F1F0
The data is input to the memory 14 and the sync signal detection circuit 17, the data is subjected to speed conversion, and then input to the codec circuit 15 together with the sync signal 27 to be decoded.

In the digital milliwatt test, the received data 21 and the channel synchronization signal 22 are input to the selection circuits 18 and 19 without being input to the channel interface circuit 11 due to the switching of the digital milliwatt test switching circuit 11. .

The selection circuits 18 and 19 select the reception data (digital milliwatt signal) 21C and the channel synchronization signal 22 in cooperation with the digital milliwatt test switching circuit 11 and input them to the codec circuit.

In the codec circuit 15, the received digital milliwatt signal 21C (pattern of FIG. 3) and the sampling signal 22 of 8 KHz which is the channel synchronizing signal are decoded to perform the digital milliwatt test.

In the present embodiment, an example in which two or more time slots in one frame are assigned to one channel and two frames form one multiframe has been described. However, other special frames The present invention can be similarly applied to the configuration.

[0025]

As described above, according to the present invention, when performing a digital milliwatt test, the digital milliwatt signal and the sampling frequency signal can be directly input to the codec circuit from the outside. A digital milliwatt signal having a pattern can be used as it is, and a PCM terminal device having a special frame structure having a large sampling frequency of 8 KHz or higher does not require a complicated pattern and frame structure. is there.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2A is a format diagram showing an example of a frame structure when encoded at a sampling frequency of 12 KHz,
(B) is a format diagram showing an example of a frame configuration required for a digital milliwatt test at that time.

FIG. 3 is a diagram showing a pattern of a digital milliwatt signal obtained by encoding a reference analog signal according to a μ-Law law.

[Explanation of symbols]

 11 Digital milliwatt test switching circuit 12 Channel interface circuit 13, 14 FIFO 15 Codec circuit 18, 19 Selection circuit

Claims (1)

[Claims] 1. A digital milliwatt test device for a PCM terminal station device having a codec circuit for PCM-encoding transmission information at a sampling frequency of 8 KHz or more and decoding a PCM-encoded reception signal at a sampling frequency of 8 KHz or more. And a means for directly inputting a sampling frequency of 8 KHz and pattern data obtained by sampling a predetermined reference analog signal at the sampling frequency of 8 KHz and encoding the code data to the CODEC circuit. apparatus.