JPH0515445U - Compound semiconductor device - Google Patents
Compound semiconductor deviceInfo
- Publication number
- JPH0515445U JPH0515445U JP6885491U JP6885491U JPH0515445U JP H0515445 U JPH0515445 U JP H0515445U JP 6885491 U JP6885491 U JP 6885491U JP 6885491 U JP6885491 U JP 6885491U JP H0515445 U JPH0515445 U JP H0515445U
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- Prior art keywords
- insulating substrate
- jig
- lid
- semiconductor device
- conductor pattern
- Prior art date
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Abstract
(57)【要約】
【目的】 放熱板上に絶縁基板を位置決めして半田付け
する際に、半田のフラックスが位置決め治具に付着せ
ず、治具と組立部品との分離を容易に行なえるようにす
ること。
【構成】 絶縁基板２の導体パターン３上に位置決め用
突起１７を設け、蓋体の裏面側には、上記の位置決め用
突起１７と嵌合する凹部５１ａをその下端面に有する第
２支柱５１を設ける。蓋体２６を第２治具１３に入れ、
第１治具１１と組み合わせることで、最終的に絶縁基板
２の放熱板１に対する相対位置が定まる。その結果、第
２治具１３による絶縁基板２の位置決めが不要となり、
間隙形成によりフラックスの付着がなくなり、容易に第
２治具１３と絶縁基板２との分離ができる。
(57) [Abstract] [Purpose] When positioning and soldering the insulating substrate on the heat sink, the solder flux does not adhere to the positioning jig, and the jig and assembly parts can be easily separated. To do so. A second supporting column 51 having a positioning protrusion 17 on the conductor pattern 3 of the insulating substrate 2 and having a recess 51a on the lower surface thereof to be fitted with the above-mentioned positioning protrusion 17 is provided on the back side of the lid. Set up. Put the lid 26 into the second jig 13,
By combining with the first jig 11, the relative position of the insulating substrate 2 to the heat sink 1 is finally determined. As a result, the positioning of the insulating substrate 2 by the second jig 13 becomes unnecessary,
The formation of the gap eliminates the adhesion of the flux, and the second jig 13 and the insulating substrate 2 can be easily separated.
Description
【０００１】[0001]
本考案は、半導体チップ等を搭載する絶縁基板と放熱板との相対的位置を決定 する位置決め手段を備えた複合半導体装置に関するものである。 The present invention relates to a composite semiconductor device having a positioning means for determining a relative position between an insulating substrate on which a semiconductor chip or the like is mounted and a heat sink.
【０００２】[0002]
この種の複合半導体装置を図９ないし図１２に示す。 図９は、組立完了後の複合半導体装置の斜視図、図１０は、主端子を折曲げる 以前の状態の縦断面図、図１１は、治具内に挿入した組立途上の複合半導体装置 の断面図、図１２は、上記治具を使用して放熱板上に主端子を半田付けした状態 の斜視図である。 これらの図において、放熱板１上には、絶縁基板２が半田付けされている。こ の絶縁基板２上には、その表面に導体パターン３が形成され、該導体パターン３ 上には、その下端部がＬ字状の折曲げられた主端子４とともに、図示を省略した 半導体チップ等の各種の電子部品が固着されている。また、信号用リード線９が 導体パターン３の所定の位置に接続され、この信号用リード線９の一端は、後述 の信号端子８の下端に固着されている。 This type of composite semiconductor device is shown in FIGS. FIG. 9 is a perspective view of the composite semiconductor device after assembly is completed, FIG. 10 is a vertical cross-sectional view of the composite semiconductor device before the main terminals are bent, and FIG. 11 is a cross-section of the composite semiconductor device in the assembly process inserted in a jig. FIG. 12 and FIG. 12 are perspective views showing a state in which the main terminals are soldered onto the heat sink using the above jig. In these figures, the insulating substrate 2 is soldered on the heat sink 1. A conductor pattern 3 is formed on the surface of the insulating substrate 2, and a semiconductor chip (not shown) is formed on the conductor pattern 3 together with a main terminal 4 whose lower end is bent in an L shape. Various electronic components such as are fixed. Further, a signal lead wire 9 is connected to a predetermined position of the conductor pattern 3, and one end of this signal lead wire 9 is fixed to a lower end of a signal terminal 8 described later.
【０００３】 上記の放熱板１の外周には、絶縁ケース５（図９、図１０参照）が嵌め合わさ れ、互いに接着剤により接着されている。また、絶縁ケース５内には、封止樹脂 が充填され、該絶縁ケース５の上端開口部は、蓋体６により閉塞されている。 上記導体パターン３上に固着された主端子４は、蓋体６に設けた貫通孔７に挿 通されて外部に導出された後、図９に示すように蓋体６上に略直角に折曲げれる 。また、蓋体６に設けた透孔１０には、信号端子８が挿通され、該信号端子８の 下端に、前記信号用リード線９の一端が接続される。An insulating case 5 (see FIGS. 9 and 10) is fitted around the outer periphery of the heat dissipation plate 1 and is bonded to each other with an adhesive. The insulating case 5 is filled with a sealing resin, and the upper end opening of the insulating case 5 is closed by a lid 6. The main terminal 4 fixed on the conductor pattern 3 is inserted into a through hole 7 formed in the lid 6 and led out to the outside, and then folded at a substantially right angle on the lid 6 as shown in FIG. Can be bent. Further, the signal terminal 8 is inserted through the through hole 10 provided in the lid body 6, and one end of the signal lead wire 9 is connected to the lower end of the signal terminal 8.
【０００４】 上記の構成の複合半導体装置は、次のようにして組み立てられる。 導体パターン３上に半導体チップや電子部品が搭載された絶縁基板２は、放熱 板１上に半田固着されるが、この場合に、図１１に示すような治具が使用される 。 すなわち、第１治具１１の凹部１２内に放熱板１を載置し、該放熱板１上に半 田を介在させて絶縁基板２を載置する。この絶縁基板２は、第２治具１３により 放熱板１の所定の位置に位置決めされる。 次に、第３治具１４の貫通孔１５に主端子４を挿通させた後、該第３治具１４ を第２治具１４に重ね合わせる。 なお、主端子４の下端は、半田を介して導体パターン３上の所定の位置に上記 第３治具１４により位置決めされる。The composite semiconductor device having the above configuration is assembled as follows. The insulating substrate 2 having semiconductor chips and electronic components mounted on the conductor pattern 3 is soldered and fixed onto the heat dissipation plate 1. In this case, a jig as shown in FIG. 11 is used. That is, the heat dissipation plate 1 is placed in the recess 12 of the first jig 11, and the insulating substrate 2 is placed on the heat dissipation plate 1 with a solder interposed. The insulating substrate 2 is positioned at a predetermined position on the heat sink 1 by the second jig 13. Next, after inserting the main terminal 4 into the through hole 15 of the third jig 14, the third jig 14 is superposed on the second jig 14. The lower end of the main terminal 4 is positioned by the third jig 14 at a predetermined position on the conductor pattern 3 via solder.
【０００５】 以上の準備の後、第１、第２及び第３治具１１，１３，１４を図示を省略した 熱板上に載せ、各部品間に介在させた半田を溶融させ、絶縁基板２を放熱板１に 、主端子４を導体パターン３の所定の位置にそれぞれ半田付けする。 次いで、図１２に示すように信号用リード線９を導体パターン３上の所定の位 置にボンディングする。 次に、図１０に示すように、放熱板１の外周に絶縁ケース５を嵌め合わせ、該 絶縁ケース５の内部に封止樹脂を注入後、該蓋体６の上端開口部を蓋体６により 閉塞する。この場合、まず、絶縁ケース５の貫通孔７に主端子４の先端部を挿通 させた後に、蓋体６の周縁部と絶縁ケース５の上端開口部とを接着剤により接着 する。 最後に、蓋体６から外部に導出した主端子４の先端部を該蓋体６の上面に沿う ように略直角に折曲げて図９に示したような複合半導体装置を完成する。After the above preparation, the first, second, and third jigs 11, 13, and 14 are placed on a hot plate (not shown) to melt the solder interposed between the respective components, and the insulating substrate 2 To the heat sink 1, and the main terminals 4 are soldered to predetermined positions of the conductor pattern 3. Next, as shown in FIG. 12, the signal lead wire 9 is bonded to a predetermined position on the conductor pattern 3. Next, as shown in FIG. 10, the insulating case 5 is fitted on the outer periphery of the heat dissipation plate 1, the sealing resin is injected into the inside of the insulating case 5, and then the upper end opening of the lid 6 is covered by the lid 6. Block. In this case, first, the leading end of the main terminal 4 is inserted into the through hole 7 of the insulating case 5, and then the peripheral edge of the lid 6 and the upper end opening of the insulating case 5 are bonded with an adhesive. Finally, the tip of the main terminal 4 led out from the lid 6 is bent at a substantially right angle along the upper surface of the lid 6 to complete the composite semiconductor device as shown in FIG.
【０００６】[0006]
ところで、上記の複合半導体装置では、放熱板１上の所定の位置に絶縁基板２ を半田付けする場合、図１１に示すように、第２治具１３によって絶縁基板２の 外周部を囲むようにして位置決めを行なうようにしている。かかる場合に、放熱 板１と絶縁基板２との間に介在させた半田付けの際のフラックスが絶縁基板２の 外周部と第２治具１３の内周部との間に付着してしまい、半田付け後に第２治具 １３がスムーズに外れず、作業能率を低下させてしまうことがあった。 By the way, in the above-mentioned composite semiconductor device, when the insulating substrate 2 is soldered at a predetermined position on the heat sink 1, as shown in FIG. 11, positioning is performed by surrounding the outer peripheral portion of the insulating substrate 2 by the second jig 13. I am trying to do. In such a case, the soldering flux interposed between the heat dissipation plate 1 and the insulating substrate 2 adheres between the outer peripheral portion of the insulating substrate 2 and the inner peripheral portion of the second jig 13, After soldering, the second jig 13 did not come off smoothly, which sometimes lowered the work efficiency.
【０００７】[0007]
本考案は、上記のような課題を解決するためになされたもので、放熱板上に絶 縁基板を位置決めして半田付けする際に、半田のフラックスが位置決め用の治具 に付着せず、組立作業をスムーズに行なうことができ、作業能率の向上を図り得 る複合半導体装置を提供することを目的とするものである。 The present invention has been made to solve the above problems, and when positioning and soldering an insulating substrate on a heat sink, the solder flux does not adhere to the positioning jig. An object of the present invention is to provide a composite semiconductor device capable of smoothly performing assembly work and improving work efficiency.
【０００８】[0008]
本考案の複合半導体装置は、放熱板上に絶縁層を介して導体パターンが形成さ れた絶縁基板と、前記導体パターン上に電子部品とともに固着され、外部に導出 される主端子と、前記放熱板の外周に接するように配置され、内部に封止樹脂が 充填される絶縁ケースと、該絶縁ケースの上端開口部を閉塞し、前記主端子の一 端が導出される貫通孔を形成した蓋体とを有する複合半導体装置において、前記 絶縁基板の導体パターン上に設けた少なくとも一対の位置決め用部材と、前記蓋 体の下面に設けられ、前記位置決め用部材と係合して前記絶縁基板の放熱板に対 する相対的位置を規制する位置決め用の支柱部とを備えたことを特徴とするもの である。 The composite semiconductor device of the present invention includes an insulating substrate on which a conductor pattern is formed on a heat sink through an insulating layer, a main terminal that is fixed to the conductor pattern together with electronic components and is led to the outside, and the heat sink. An insulating case which is arranged so as to contact the outer periphery of the plate and which is filled with a sealing resin inside, and a lid which forms a through hole through which one end of the main terminal is led out by closing an upper end opening of the insulating case. In a composite semiconductor device having a body, at least a pair of positioning members provided on a conductor pattern of the insulating substrate and a lower surface of the lid body are engaged with the positioning member to dissipate heat from the insulating substrate. The present invention is characterized in that it is provided with a positioning column portion that regulates a relative position to the plate.
【０００９】[0009]
本考案の複合半導体装置は、絶縁基板の導体パターン上に位置決め用部材と蓋 体下面に設けた位置決め用の支柱部とを嵌合させることにより、蓋体と絶縁基板 との相対的位置が定まる。一方、蓋体と絶縁基板とは、組立時に使用される第１ 治具と第２治具の組み合わせによりその相対的位置が決定されるので、結局、放 熱板に対する絶縁基板の相対位置が定まる。従って、第２治具により絶縁基板の 周縁部を囲まなくても絶縁基板の位置決めができることになり、半田付け時のフ ラックスの付着が回避でき、従来のように絶縁基板と治具との付着による作業能 率の低下が防止できる。 In the composite semiconductor device of the present invention, the relative position between the lid and the insulating substrate is determined by fitting the positioning member on the conductor pattern of the insulating substrate and the positioning pillar provided on the lower surface of the lid. .. On the other hand, since the relative positions of the lid and the insulating substrate are determined by the combination of the first jig and the second jig used during assembly, the relative position of the insulating substrate with respect to the heat dissipation plate is finally determined. .. Therefore, it is possible to position the insulating substrate without surrounding the peripheral portion of the insulating substrate with the second jig, and it is possible to avoid the adhesion of flux during soldering, and to attach the insulating substrate and the jig as in the past. It is possible to prevent the work efficiency from deteriorating.
【００１０】[0010]
以下に、本考案を図面に基づいて詳細に説明する。 図１は本考案の複合半導体装置の完成状態の外観図、図２は本考案の複合半導 体装置の主要部品を示す組立分解図、図３は蓋体の平面図、図４は蓋体の正面図 、図５は蓋体の左側面図、図６は蓋体の右側面図、図７は組立工程を説明するた めの断面図、図８は絶縁基板を位置決めする手段の要部斜視図である。上記図１ ないし図８までが本考案の複合半導体装置に係わる図である。 各部品の特徴が良く表われている図２において、放熱板１上には、絶縁基板２ が半田により固着されている。この絶縁基板２上には、導体パターン３が形成さ れ、導体パターン３上には、半導体ペレット１６や図示を省略した各種の電子部 品が搭載・固着されている。さらに、導体パターン３の所定の位置には、少なく とも２箇所に位置決め用突起１７が固着されており、後述する蓋体裏面側の位置 決め用支柱部と係合して放熱板１と絶縁基板２との相対的位置を決定する本願考 案の役割を担うものである。 Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is an external view of the composite semiconductor device of the present invention in a completed state, FIG. 2 is an exploded view showing the main parts of the composite semiconductor device of the present invention, FIG. 3 is a plan view of a lid, and FIG. 4 is a lid. Front view, FIG. 5 is a left side view of the lid, FIG. 6 is a right side view of the lid, FIG. 7 is a cross-sectional view for explaining the assembly process, and FIG. 8 is a main part of a means for positioning the insulating substrate. It is a perspective view. 1 to 8 are views relating to the composite semiconductor device of the present invention. In FIG. 2 in which the characteristics of each component are well shown, an insulating substrate 2 is fixed on the heat sink 1 by soldering. A conductor pattern 3 is formed on the insulating substrate 2, and a semiconductor pellet 16 and various electronic components (not shown) are mounted and fixed on the conductor pattern 3. Further, positioning projections 17 are fixed to at least two positions at predetermined positions of the conductor pattern 3, and engage with positioning post portions on the back surface side of the lid, which will be described later, to dissipate the heat dissipation plate 1 and the insulating substrate. It plays the role of the present proposal for determining the relative position with respect to 2.
【００１１】 符号２６は蓋体であり、この蓋体２６は３つのブロック２７，２８，２９を備 え、各ブロック２７，２８，２９の上面略中央部には、それぞれナット収納溝３ ０が形成されている。各ブロック２７，２８，２９は、連結部３１，３２により 互いに連結され、ブロック２７，２８間及びブロック２８，２９間には、空隙部 ３３がそれぞれ形成されている。この空隙部３３は、後に封止樹脂の充填により 閉塞される。 ブロック２７の側面には、一対の張出部３４が設けられ、この張出部３４に信 号端子８０が挿入・仮固定される４個の角孔３５が形成されている。 上記各ブロック２７，２８の幅方向の一端及びブロック２９の幅方向の他端に は、板状の主端子４０が挿入される貫通孔３６をそれぞれ有し、該貫通孔３６と 連通して角溝３７が形成されている。Reference numeral 26 is a lid, and this lid 26 has three blocks 27, 28, 29, and nut storage grooves 30 are respectively provided at the substantially central portions of the upper surfaces of the blocks 27, 28, 29. Has been formed. The blocks 27, 28, 29 are connected to each other by connecting portions 31, 32, and a gap 33 is formed between the blocks 27, 28 and between the blocks 28, 29, respectively. The void 33 is closed later by filling the sealing resin. A pair of overhanging portions 34 is provided on the side surface of the block 27, and four square holes 35 into which the signal terminals 80 are inserted and temporarily fixed are formed in the overhanging portions 34. A through hole 36 into which a plate-shaped main terminal 40 is inserted is provided at one end of each of the blocks 27 and 28 in the width direction and the other end of the block 29 in the width direction, respectively. The groove 37 is formed.
【００１２】 次に、蓋体２６の裏面側の構成を述べる。 蓋体２６の裏面側、すなわち、ブロック２７からの張出部３４，３４の裏面側 及びブロック２９の裏面側には、それぞれ第１支柱部５０が形成され、この第１ 支柱部５０の端面は図２に示した放熱板１上に載せられ、蓋体２６の高さ位置を 決める役割を担っている。ブロック２７，２８の裏面側には、第２支柱部５１が 形成されている。この第２支柱部５１は、第１支柱部５０より短く形成され、そ の端面には、図８に示すように凹部５１ａを有し、この凹部５１ａは、絶縁基板 ２の導体パターン３上に半田固着させた位置決め用突起１７に嵌め合わされ、一 義的には、絶縁基板２と蓋体２６との相対的位置を決定する役割を果たすもので ある。なお、後述するように、最終的には、絶縁基板２と放熱板１との相対位置 を決定することになる。Next, the configuration of the back surface side of the lid body 26 will be described. On the back surface side of the lid body 26, that is, on the back surface side of the overhanging portions 34, 34 from the block 27 and the back surface side of the block 29, a first support column 50 is formed, and the end surface of the first support column 50 is It is placed on the heat dissipation plate 1 shown in FIG. 2 and plays a role of determining the height position of the lid body 26. A second column portion 51 is formed on the back surface side of the blocks 27 and 28. The second supporting column portion 51 is formed shorter than the first supporting column portion 50, and has a concave portion 51a on its end face as shown in FIG. 8. The concave portion 51a is formed on the conductor pattern 3 of the insulating substrate 2. It is fitted to the positioning projections 17 fixed by soldering, and primarily plays a role of determining the relative position between the insulating substrate 2 and the lid 26. As will be described later, the relative position between the insulating substrate 2 and the heat sink 1 will be finally determined.
【００１３】 上記張出部３４，３４の裏面側には、第１支柱部５０に近接する位置に信号端 子案内部５２が形成されている。この信号端子案内部５２には、上記張出部３４ ，３４に設けた角孔３５と中心軸線を一致させた切溝５３が形成されている。 図２における符号８０は、信号端子である。この信号端子８０は、板材により 略Ｌ字状に形成され、起立部８１の中央よりやや上端寄りに膨出部８２が形成さ れ、また、中央よりやや下端寄りには、係止部８３が形成されている。 信号端子８０の起立部８１に連続して水平方向に略直角に屈曲する差込部８４ が形成され、さらに該差込部８４から水平方向に略直角に屈曲する脚部８５が形 成されている。A signal terminal guide portion 52 is formed at a position close to the first support column 50 on the rear surface side of the overhang portions 34, 34. The signal terminal guide portion 52 is formed with a cut groove 53 whose center axis coincides with that of the square hole 35 provided in each of the overhang portions 34, 34. Reference numeral 80 in FIG. 2 is a signal terminal. The signal terminal 80 is formed of a plate material in a substantially L shape, and a bulging portion 82 is formed slightly closer to the upper end than the center of the upright portion 81, and a locking portion 83 is formed slightly closer to the lower end from the center. Has been formed. An insertion portion 84 which is bent at a substantially right angle in the horizontal direction is formed continuously from the rising portion 81 of the signal terminal 80, and a leg portion 85 which is bent at a substantially right angle in the horizontal direction is formed from the insertion portion 84. There is.
【００１４】 次に、上記のように構成の蓋体２６、主端子４０及び信号端子８０を使用した 本考案の複合半導体装置の組立順序を説明する。 図２において、蓋体２６の角孔３６に下方から主端子４０の上端部を挿通し、 上方に引き上げる。主端子４０が蓋体２６の上面より上に出たところで、図２の 矢印で示すように角溝３７側に主端子４０を水平に移動させる。 次に、角溝３７側に移動したところで、主端子４０を手放し、角溝３７内に係 止させる。同様にして、他の主端子４０も角溝３７に落とすことにより３個の主 端子４０が遊嵌する。Next, the assembly sequence of the composite semiconductor device of the present invention using the lid body 26, the main terminal 40, and the signal terminal 80 having the above-described configuration will be described. In FIG. 2, the upper end of the main terminal 40 is inserted from below into the square hole 36 of the lid 26 and pulled up. When the main terminal 40 protrudes above the upper surface of the lid 26, the main terminal 40 is horizontally moved to the side of the square groove 37 as shown by the arrow in FIG. Next, when it moves to the side of the square groove 37, the main terminal 40 is released and locked in the square groove 37. Similarly, the other main terminals 40 are also dropped into the square groove 37 so that the three main terminals 40 are loosely fitted.
【００１５】 次に、信号端子８０を蓋体２６に装着する。 すなわち、張出部３４に形成した角孔３５の下方から信号端子８０の起立部８ １の上端部を挿入する。この場合、膨出部８２が角孔３５の内壁と接触し、さら に強制的に係止部８３の位置まで挿入することにより、信号端子８０が下方に落 下しないように係止される。一方、差込部８４は、蓋体２６の信号端子案内部５ ２に形成された切溝５３に差し込まれて支持される。 以上の準備の終了後、蓋体２６を治具に収める。 すなわち、図７において、まず、第１治具１１の凹部１２内に放熱板１を載置 し、この放熱板１上に、あらかじめ電子部品等をその導体パターン３上に搭載・ 固着させた絶縁基板２を板状半田（図示せず）を介して載置する。Next, the signal terminal 80 is attached to the lid 26. That is, the upper end of the rising portion 81 of the signal terminal 80 is inserted from below the square hole 35 formed in the overhang portion 34. In this case, the bulging portion 82 comes into contact with the inner wall of the square hole 35 and is further forcibly inserted to the position of the locking portion 83, whereby the signal terminal 80 is locked so as not to drop downward. On the other hand, the insertion portion 84 is inserted into and supported by the cut groove 53 formed in the signal terminal guide portion 52 of the lid 26. After the above preparation is completed, the lid 26 is placed in the jig. That is, in FIG. 7, first, the heat dissipation plate 1 is placed in the recess 12 of the first jig 11, and the electronic components and the like are previously mounted and fixed on the conductor pattern 3 on the heat dissipation plate 1. The substrate 2 is placed via plate solder (not shown).
【００１６】 次に、第２治具１３を第１治具１１上の所定の位置に嵌め合わせる。この場合 、第２治具１３の下端内周には、切欠部１３ａが形成されており、絶縁基板２の 外周部とは接触しないように配慮されている。 次に、所定の部品を仮固定した準備完了後の蓋体２６を第２治具１３内に入れ る。蓋体２６の裏面側には、第１支柱部５０と第２支柱部５１とが形成され、第 １支柱部５０の端面は、放熱板１の表面と当接するため、蓋体２６の高さ位置が 定められる。また、第２支柱部５１の端面に設けた凹部５１ａを絶縁基板２の位 置決め用突起１７に嵌合させることにより、当該絶縁基板２の蓋体２６に対する 相対位置が決定される。 ここで、蓋体２６は、第２治具１３によって放熱板１に対する相対位置が決定 されるので、結果的に放熱板１に対する前記絶縁基板２の相対位置が決定される ことになる。従って、第２治具１３により絶縁基板２の外周部を押さえて位置決 めしなくても何等支障がなくなる。Next, the second jig 13 is fitted to a predetermined position on the first jig 11. In this case, a notch 13a is formed on the inner circumference of the lower end of the second jig 13 so that the second jig 13 does not come into contact with the outer circumference of the insulating substrate 2. Next, the lid 26, which is prepared by temporarily fixing predetermined components, is placed in the second jig 13. A first strut portion 50 and a second strut portion 51 are formed on the back surface side of the lid body 26, and the end surface of the first strut portion 50 abuts the surface of the heat dissipation plate 1, so that the height of the lid body 26 is increased. The position is fixed. Further, by fitting the recess 51a provided on the end surface of the second support column 51 into the positioning protrusion 17 of the insulating substrate 2, the relative position of the insulating substrate 2 with respect to the lid 26 is determined. Here, since the relative position of the lid 26 with respect to the heat sink 1 is determined by the second jig 13, the relative position of the insulating substrate 2 with respect to the heat sink 1 is consequently determined. Therefore, there is no problem even if the second jig 13 does not press the outer peripheral portion of the insulating substrate 2 to position it.
【００１７】 次に、各主端子４０は、角溝３７に遊嵌しており、該主端子４０の下端に設け た脚部４３が絶縁基板２の導体パターン３の所定の位置に半田を挟んで当接する 。また、信号端子８０は、蓋体２６の角孔３５に膨出部８２により仮固定されて いるが、蓋体２６を第２治具１３にセットした後に、信号端子８の上端を下方に 押し下げることにより、差込部８４が下方に移動し、下端の脚部８５が絶縁基板 ２の導体パターン３の所定の位置に半田を挟んで当接する。Next, each main terminal 40 is loosely fitted in the square groove 37, and the leg portion 43 provided at the lower end of the main terminal 40 sandwiches the solder at a predetermined position of the conductor pattern 3 of the insulating substrate 2. Abut on. Further, the signal terminal 80 is temporarily fixed to the square hole 35 of the lid body 26 by the bulging portion 82. After the lid body 26 is set on the second jig 13, the upper end of the signal terminal 8 is pushed down. As a result, the insertion portion 84 moves downward, and the leg portion 85 at the lower end abuts on the predetermined position of the conductor pattern 3 of the insulating substrate 2 with the solder interposed therebetween.
【００１８】 上記の状態で熱板上に載せて加熱し、放熱板１と絶縁基板２、絶縁基板２上の 導体パターン３と主端子４０及び信号端子８０とをそれぞれ半田固着させる。 次に、第１治具１１及び第２治具１３を取り外し、半田固着部を洗浄した後、 放熱板１１の外周に、図１に表われている絶縁ケース６０を被せ、蓋体２６の各 ブロック２７，２８，２９間に形成された空隙部３３から封止樹脂を該絶縁ケー ス６０内に充填し・硬化させる。 次に、蓋体２６の各ブロック２７，２８，２９の上面に設けたナット収納孔３ ０にナット（図示せず）を収納した後、主端子４０がナット収納孔３０を覆うよ うに略直角折曲げて図１の外観のような複合半導体装置を完成する。 なお、上記の実施例では、位置決め用部材として絶縁基板２の導体パターン３ 上に位置決め用突起１７を設け、蓋体２６の第２支柱部５１側に凹部５１ａを設 けるようにしたが、これらの凹凸関係は逆でも良いし、また、他の係合手段でも 良い。さらに、かかる位置決め手段の個数は、少なくとも２個以上あれば良く、 特にその数には限定されない。In the above-described state, the heat sink is placed on a heat plate and heated, and the heat sink 1 and the insulating substrate 2, the conductor pattern 3 on the insulating substrate 2, the main terminal 40, and the signal terminal 80 are soldered and fixed to each other. Next, after removing the first jig 11 and the second jig 13 and washing the solder fixing portion, the outer periphery of the heat dissipation plate 11 is covered with the insulating case 60 shown in FIG. A sealing resin is filled into the insulating case 60 from the gap 33 formed between the blocks 27, 28 and 29 and cured. Next, after a nut (not shown) is housed in the nut housing hole 30 provided on the upper surface of each block 27, 28, 29 of the lid 26, the main terminal 40 is at a substantially right angle so as to cover the nut housing hole 30. By bending, the composite semiconductor device having the appearance shown in FIG. 1 is completed. In the above embodiment, the positioning protrusion 17 is provided on the conductor pattern 3 of the insulating substrate 2 as the positioning member, and the recess 51a is provided on the second pillar 51 side of the lid 26. The concavo-convex relationship may be reversed, or other engaging means may be used. Further, the number of such positioning means may be at least two or more and is not particularly limited.
【００１９】[0019]
以上のように、本考案によれば、放熱板上に絶縁基板を位置決めして半田付け する際に、第２治具の周縁部で絶縁基板の外周部を押さえることなく、一定の間 隙を保持して半田付けできるようにしたので、半田付け時のフラックスが第２治 具に付着せず、製品の組立後にスムーズに第２治具を外すことができ、作業能率 が向上するなどの優れた効果がある。 As described above, according to the present invention, when the insulating substrate is positioned and soldered on the heat dissipation plate, the peripheral portion of the second jig does not press the outer peripheral portion of the insulating substrate, and a constant gap is maintained. Since it can be held and soldered, the flux during soldering does not adhere to the second jig, the second jig can be removed smoothly after the product is assembled, and work efficiency is improved. There is an effect.
【図１】本考案の複合半導体装置の外観図である。FIG. 1 is an external view of a composite semiconductor device of the present invention.
【図２】上記複合半導体装置の主要部品を示す組立分解
図である。FIG. 2 is an assembly exploded view showing main components of the composite semiconductor device.
【図３】蓋体の平面図である。FIG. 3 is a plan view of a lid body.
【図４】上記蓋体の正面図である。FIG. 4 is a front view of the lid body.
【図５】上記蓋体の左側面図である。FIG. 5 is a left side view of the lid body.
【図６】上記蓋体の右側面図である。FIG. 6 is a right side view of the lid body.
【図７】上記複合半導体装置の組立工程を説明するため
の断面図である。FIG. 7 is a cross-sectional view for explaining an assembly process of the composite semiconductor device.
【図８】上記複合半導体装置における位置決め手段の要
部斜視図である。FIG. 8 is a perspective view of a main part of a positioning unit in the composite semiconductor device.
【図９】従来の複合半導体装置の斜視図である。FIG. 9 is a perspective view of a conventional composite semiconductor device.
【図１０】主端子を折曲げる以前の状態の従来の複合半
導体装置の縦断面図である。FIG. 10 is a vertical cross-sectional view of a conventional composite semiconductor device in a state before bending a main terminal.
【図１１】治具内に挿入した組立途上の従来の複合半導
体装置の断面図である。FIG. 11 is a cross-sectional view of a conventional composite semiconductor device inserted in a jig and being assembled.
【図１２】上記治具を使用して放熱板上に主端子を半田
付けした状態の従来の複合半導体装置の斜視図である。FIG. 12 is a perspective view of a conventional composite semiconductor device in which a main terminal is soldered onto a heat dissipation plate using the jig.
１ 放熱板 ２ 絶縁基板 ３ 導体パターン １７ 位置決め用突起 ２６ 蓋体 ３４ 張出部 ３５ 角孔 ３６ 貫通孔 ３７ 角溝 ４０ 主端子 ５０ 第１支柱部 ５１ 第２支柱部 ５１ａ 凹部 ５２ 信号端子案内部 ５３ 切溝 ６０ 絶縁ケース DESCRIPTION OF SYMBOLS 1 Heat sink 2 Insulating substrate 3 Conductor pattern 17 Positioning projection 26 Lid 34 Overhanging part 35 Square hole 36 Through hole 37 Square groove 40 Main terminal 50 First support part 51 Second support part 51a Recess 52 signal terminal guide part 53 Cut groove 60 Insulation case
Claims (1)
が形成された絶縁基板と、前記導体パターン上に電子部
品とともに固着され、外部に導出される主端子と、前記
放熱板の外周に接するように配置され、内部に封止樹脂
が充填される絶縁ケースと、該絶縁ケースの上端開口部
を閉塞し、前記主端子の一端が導出される貫通孔を形成
した蓋体とを有する複合半導体装置において、前記絶縁
基板の導体パターン上に設けた少なくとも一対の位置決
め用部材と、前記蓋体の下面に設けられ、前記位置決め
用部材と係合して前記絶縁基板の放熱板に対する相対的
位置を規制する位置決め用の支柱部とを備えたことを特
徴とする複合半導体装置。1. An insulating substrate in which a conductor pattern is formed on a heat sink through an insulating layer, a main terminal fixed to the conductor pattern together with an electronic component and led to the outside, and an outer periphery of the heat sink. A composite having an insulating case which is arranged so as to be in contact with each other and which is filled with a sealing resin, and a lid body which closes an upper end opening of the insulating case and forms a through hole through which one end of the main terminal is led out. In a semiconductor device, at least a pair of positioning members provided on a conductor pattern of the insulating substrate and a relative position of the insulating substrate with respect to the heat dissipation plate provided on the lower surface of the lid and engaged with the positioning member. A composite semiconductor device, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6885491U JP2560909Y2 (en) | 1991-08-05 | 1991-08-05 | Composite semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6885491U JP2560909Y2 (en) | 1991-08-05 | 1991-08-05 | Composite semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0515445U true JPH0515445U (en) | 1993-02-26 |
| JP2560909Y2 JP2560909Y2 (en) | 1998-01-26 |
Family
ID=13385678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6885491U Expired - Lifetime JP2560909Y2 (en) | 1991-08-05 | 1991-08-05 | Composite semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2560909Y2 (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009099645A (en) * | 2007-10-15 | 2009-05-07 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
| WO2013015031A1 (en) | 2011-07-28 | 2013-01-31 | 富士電機株式会社 | Semiconductor device and method for producing a semiconductor device |
| JP2013084764A (en) * | 2011-10-11 | 2013-05-09 | Mitsubishi Electric Corp | Power semiconductor device |
| US9691674B2 (en) | 2014-03-19 | 2017-06-27 | Fuji Electric Co., Ltd. | Semiconductor device and method for manufacturing same |
| US9831152B2 (en) | 2014-10-14 | 2017-11-28 | Fuji Electric Co., Ltd. | Semiconductor device |
| US9941254B2 (en) | 2015-04-10 | 2018-04-10 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10070527B2 (en) | 2015-08-04 | 2018-09-04 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10297533B2 (en) | 2016-01-15 | 2019-05-21 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10522434B2 (en) | 2016-01-12 | 2019-12-31 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10777473B2 (en) | 2017-01-17 | 2020-09-15 | Fuji Electric Co., Ltd. | Semiconductor device |
-
1991
- 1991-08-05 JP JP6885491U patent/JP2560909Y2/en not_active Expired - Lifetime
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009099645A (en) * | 2007-10-15 | 2009-05-07 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
| WO2013015031A1 (en) | 2011-07-28 | 2013-01-31 | 富士電機株式会社 | Semiconductor device and method for producing a semiconductor device |
| US8933554B2 (en) | 2011-07-28 | 2015-01-13 | Fuji Electric Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
| JP2013084764A (en) * | 2011-10-11 | 2013-05-09 | Mitsubishi Electric Corp | Power semiconductor device |
| US9691674B2 (en) | 2014-03-19 | 2017-06-27 | Fuji Electric Co., Ltd. | Semiconductor device and method for manufacturing same |
| US9831152B2 (en) | 2014-10-14 | 2017-11-28 | Fuji Electric Co., Ltd. | Semiconductor device |
| US9941254B2 (en) | 2015-04-10 | 2018-04-10 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10070527B2 (en) | 2015-08-04 | 2018-09-04 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10522434B2 (en) | 2016-01-12 | 2019-12-31 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10297533B2 (en) | 2016-01-15 | 2019-05-21 | Fuji Electric Co., Ltd. | Semiconductor device |
| US10777473B2 (en) | 2017-01-17 | 2020-09-15 | Fuji Electric Co., Ltd. | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2560909Y2 (en) | 1998-01-26 |
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