JPH0514761A - Color television receiver - Google Patents

Color television receiver

Info

Publication number
JPH0514761A
JPH0514761A JP16155691A JP16155691A JPH0514761A JP H0514761 A JPH0514761 A JP H0514761A JP 16155691 A JP16155691 A JP 16155691A JP 16155691 A JP16155691 A JP 16155691A JP H0514761 A JPH0514761 A JP H0514761A
Authority
JP
Japan
Prior art keywords
screen
display
sub
television receiver
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16155691A
Other languages
Japanese (ja)
Inventor
Takayuki Miura
隆之 三浦
Kenji Hara
健二 原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16155691A priority Critical patent/JPH0514761A/en
Publication of JPH0514761A publication Critical patent/JPH0514761A/en
Pending legal-status Critical Current

Links

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  • Television Systems (AREA)
  • Synchronizing For Television (AREA)
  • Studio Circuits (AREA)

Abstract

PURPOSE:To enable the interlace display of a slave screen by using a synchronizing pulse from a synchronizing signal generating circuit for the slave screen for a clock for the slave screen at the time of a non-interlace display by a master screen. CONSTITUTION:At the time of the non-interlace display such as a character display by the master screen, a character decoder 7 prepares the horizontal and vertical synchronizing pulses of the non-interlace by the incorporated synchronizing signal generating circuit. Then, this pulse is used for the display of the master screen, and the horizontal and vertical pulses outputted from a synchronizing signal generating circuit 8 for the slave screen are used for a clock for an A/D conversion, and the clock for reading a video memory 4, for preparing the slave screen. Then, the horizontal and vertical pulses are inputted through the decoder 7 to a slave screen processing circuit 3. Thus, at the time of the non-interlace display by the master screen, the interlace display by the slave screen can be operated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、子画面表示機能を有す
るカラーテレビジョン受像機に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color television receiver having a child screen display function.

【0002】[0002]

【従来の技術】近年、子画面表示機能を有するカラーテ
レビジョン受像機が市販されるようになり、親機で映出
される画像が文字画像の場合にノンインターレス方式で
表示されるのに対して、子機の画面はインターレス方式
で表示することが要求されている。
2. Description of the Related Art In recent years, color television receivers having a sub-screen display function have come on the market, and when an image displayed on a parent device is a character image, it is displayed by a non-interlace method. Therefore, the screen of the child device is required to be displayed in an interlace system.

【0003】以下に従来の子画面表示機能を有するカラ
ーテレビジョン受像機について図面を参照しながら説明
する。
A conventional color television receiver having a child screen display function will be described below with reference to the drawings.

【0004】図2に示すように、子画面表示機能は、ま
ず、入力切換回路1で入力映像信号としてテレビジョン
放送,衛星放送(BSと略す),ビデオテープレコーダ
(VTRと略す)などのうちいずれかを選択し、復調し
て得た映像信号をビデオ・クロマ・ジャングル回路2に
加え子画面処理回路3で、映像メモリ4および文字デコ
ーダ(文字同期信号発生回路を内蔵する)7からの信号
を用いて子画面を処理してつくる。つぎに、RGBマト
リクス5で子画面の色差信号をR,G,Bの3原色信号
に変換して子画面切換回路6に加えている。
As shown in FIG. 2, the sub-screen display function is first performed by the input switching circuit 1 as an input video signal among television broadcast, satellite broadcast (abbreviated as BS), video tape recorder (abbreviated as VTR), and the like. A video signal obtained by selecting any one and demodulating and adding it to the video chroma jungle circuit 2 and the sub-screen processing circuit 3 from the video memory 4 and the character decoder (having a character synchronizing signal generating circuit) 7 Create a child screen by using. Next, the RGB matrix 5 converts the color difference signal of the small screen into three primary color signals of R, G, B and applies the signals to the small screen switching circuit 6.

【0005】以上のように構成された子画面表示機能を
有するカラーテレビジョン受像機について、以下その動
作を説明する。図2に示すように、ビデオ・クロマ・ジ
ャングル回路2から出力した子画面用の輝度信号Y,色
差信号R−YおよびB−Y,水平同期パルスH,垂直同
期パルスVは子画面処理回路3において、A/D変換さ
れディジタル処理されたのち子画面圧縮データを蓄積す
るための映像メモリ4で圧縮した画面をつくる。このと
き子画面作成用のA/D変換と映像メモリ4の書込みク
ロックパルスは、親画面の水平,垂直同期パルス
p″,Vp″から文字デコーダ7を通って電圧制御発振
器VCOおよびPLL回路によって子画面処理回路3の
内部でつくりだされている。子画面処理されたのち、D
/A変換され圧縮された子画面信号の輝度信号Y′,色
差信号R−Y′,B−Y′を出力しRGBマトリクス回
路5で、R,G,Bの3原色信号を得て子画面切換回路
6に加えられる。子画面切換回路6では親画面信号に子
画面信号を重畳し合成された出力信号が得られる。
The operation of the color television receiver having the child screen display function configured as described above will be described below. As shown in FIG. 2, the sub-picture luminance signal Y, the color difference signals RY and BY, the horizontal sync pulse H, and the vertical sync pulse V output from the video chroma jungle circuit 2 are used for the sub-picture processing circuit 3. In A, a screen compressed by the video memory 4 for accumulating the sub-screen compressed data after A / D conversion and digital processing is created. At this time, the A / D conversion for writing the child screen and the write clock pulse of the video memory 4 are supplied from the horizontal and vertical synchronizing pulses H p ″, V p ″ of the parent screen through the character decoder 7 to the voltage controlled oscillator VCO and the PLL circuit. Is created inside the sub-picture processing circuit 3. After the child screen is processed, D
The luminance signal Y'and the color difference signals RY 'and BY' of the A / A converted and compressed child screen signal are output, and the RGB matrix circuit 5 obtains the three primary color signals of R, G and B to obtain the child screen. It is added to the switching circuit 6. The small screen switching circuit 6 superimposes the small screen signal on the main screen signal to obtain a combined output signal.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記従来
の構成では、文字デコーダ内蔵、あるいは、RGB入力
付のカラーテレビジョン受像機に最近使用されているよ
うに、親画面がノンインターレス表示をしている場合
に、子画面のA/D変換器およびメモリ回路に使用され
る書込みクロックがノンインターレスの同期信号からつ
くられるため、子画面の表示画面は、ノンインターレス
になってしまい、垂直方向の解像度は半分になるという
問題点を有していた。
However, in the above-mentioned conventional structure, the main screen displays a non-interlaced display as in the case of a character television or a color television receiver with RGB input. In this case, since the write clock used for the A / D converter and the memory circuit of the sub-screen is made from the non-interlaced sync signal, the display screen of the sub-screen becomes non-interlaced and the vertical direction. Had the problem of half the resolution.

【0007】本発明は上記従来の問題点を解決するもの
で、親画面がノンインターレス表示している場合でも、
子画面はインターレス表示できるようにした子画面表示
機能を有する。カラーテレビジョン受像機を提供するこ
とを目的とする。
The present invention solves the above-mentioned conventional problems. Even when the main screen is non-interlaced,
The small screen has a small screen display function that enables interlaced display. It is an object to provide a color television receiver.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に本発明の子画面表示機能を有するカラーテレビジョン
受像機は、親画面が文字表示などのノンインターレス表
示している場合に子画面用クロックを親画面用の同期信
号とは別に子画面用同期信号発生回路を設けるような構
成を有している。
In order to achieve the above object, a color television receiver having a sub-screen display function of the present invention has a sub-screen when the main screen is a non-interlaced display such as a character display. The clock for use is provided in addition to the sync signal for the parent screen, and a sync signal generation circuit for the child screen is provided.

【0009】[0009]

【作用】本発明は上記した構成により、親画面が文字画
面を表示している場合には、子画面処理回路に含まれる
電圧制御発振器VCO回路およびPLL回路によって子
画面のA/D変換回路および映像メモリの読み出し用ク
ロックは、親画面信号の同期信号を使用せず、子画面用
同期信号発生回路からの水平,垂直同期パルスH p′,
p′を使用するようにしている。
According to the present invention, with the above configuration, the main screen is a character image.
If the surface is displayed, it is included in the child screen processing circuit.
Voltage controlled oscillator VCO circuit and PLL circuit
Screen for A / D conversion circuit and video memory readout
The lock is for the child screen without using the sync signal of the parent screen signal.
Horizontal and vertical sync pulse H from sync signal generator p′,
Vp′ Is used.

【0010】[0010]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0011】図1に示すように、従来の子画面表示機能
を有するカラーテレビジョン受像機の回路構成を示す図
2と同じ動作をする回路は同じ符号をつけ説明は省略す
る。本実施例では、子画面同期信号発生回路8を新しく
設けたことが従来例と異なっている。
As shown in FIG. 1, a circuit having the same operation as that of FIG. 2 showing a circuit configuration of a conventional color television receiver having a child screen display function is given the same reference numeral and its description is omitted. The present embodiment is different from the conventional example in that a sub-screen synchronization signal generating circuit 8 is newly provided.

【0012】以上のように構成された子画面表示機能を
有するカラーテレビジョン受像機について、図1を用い
てその動作を説明する。
The operation of the color television receiver having the child screen display function configured as described above will be described with reference to FIG.

【0013】まず、親画面が通常の一般的な映像信号を
表示している場合、文字デコーダ7に入力された親画面
からの映像信号および水平,垂直パルスHp″,Vp
は、文字デコーダ7を通り、そのまま、子画面処理回路
3に入り、子画面処理回路3内のVCO回路およびPL
L回路によって子画面のA/D変換回路および映像メモ
リ4の読み出し用クロックとして使用される。
First, when the main screen displays a normal general video signal, the video signal input from the main screen to the character decoder 7 and the horizontal and vertical pulses H p ″, V p ″.
Passes through the character decoder 7 and enters the small screen processing circuit 3 as it is, and the VCO circuit and the PL in the small screen processing circuit 3 are connected.
It is used by the L circuit as an A / D conversion circuit of the child screen and a read clock of the video memory 4.

【0014】つぎに、親画面が文字放送などを受信して
ノンインターレスの画面表示をしている場合、文字デコ
ーダ7は、内蔵する同期信号発生回路により、ノンイン
ターレスの水平,垂直同期パルスHp,Vpをつくってい
る。親画面の表示にはこのままのHp,Vpを使用すれば
よい。しかし子画面を作成するためのA/D変換用クロ
ックおよび映像メモリ4の読み出し用クロックを上記し
た親画面表示の文字用の水平,垂直同期パルスHp,Vp
からつくると、子画面を作成する場合1フィールド画面
のデータが欠落してしまう。そのため本実施例で新しく
設けた子画面用同期信号発生回路8から出力した水平,
垂直パルスHp′,Vp′を、文字デコーダ7を通して、
子画面処理回路3に入力する。
Next, when the main screen receives a character broadcast or the like and displays a non-interlaced screen, the character decoder 7 uses the built-in sync signal generation circuit to perform non-interlaced horizontal and vertical sync pulses. It makes H p and V p . To display the parent screen, H p and V p as they are may be used. However, the A / D conversion clock for creating the child screen and the reading clock of the video memory 4 are used as the horizontal and vertical synchronizing pulses H p and V p for the characters on the parent screen display.
When the child screen is created, the data of the 1-field screen is lost. Therefore, in the present embodiment, the horizontal signal output from the newly-provided sub-screen synchronization signal generation circuit 8
The vertical pulses H p ′ and V p ′ are passed through the character decoder 7 and
Input to the small screen processing circuit 3.

【0015】これにより、親画面がノンインターレス表
示されているときにも、子画面はインターレス表示が保
たれることになり、1フィールドの画面データが欠落す
ることがない。
As a result, even when the main screen is displayed in the non-interlace mode, the interlaced display is maintained in the slave screen, and the screen data of one field is not lost.

【0016】[0016]

【発明の効果】以上のように本発明の子画面表示機能を
備えたカラーテレビジョン受像機は、親画面が文字放送
受信時のようなノンインターレス画面表示の場合にも子
画面をインターレス表示させることができ、子画面の垂
直解像度を劣化させることがなく、優れた子画面表示機
能を有するカラーテレビジョン受像機を実現できるもの
である。
As described above, in the color television receiver having the child screen display function of the present invention, the child screen is interlaced even if the parent screen is a non-interlaced screen display such as when receiving a character broadcast. It is possible to realize a color television receiver that can be displayed and does not deteriorate the vertical resolution of the small screen and has an excellent small screen display function.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の子画面表示機能を備えたカ
ラーテレビジョン受像機のブロック図
FIG. 1 is a block diagram of a color television receiver having a child screen display function according to an embodiment of the present invention.

【図2】従来の子画面表示機能付カラーテレビジョン受
像機のブロック図
FIG. 2 is a block diagram of a conventional color television receiver with a small screen display function.

【符号の説明】[Explanation of symbols]

3 子画面処理回路 4 映像メモリ 6 子画面切換回路 7 文字デコーダ 8 子画面用同期信号発生回路 3 Child screen processing circuit 4 video memory 6 Sub screen switching circuit 7 character decoder 8 Sub-screen sync signal generation circuit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】文字放送を受信し表示するためのノンイン
ターレス用同期信号発生装置と、親画面内に子画面を重
畳し表示するためのインターレス用同期信号発生装置と
を内蔵し、いずれかの同期信号に切換えて画面を表示す
るようにした子画面表示機能を有するカラーテレビジョ
ン受像機。
1. A non-interlace sync signal generator for receiving and displaying a teletext and an interlace sync signal generator for superimposing and displaying a sub-screen on a main screen are built-in. A color television receiver having a sub-screen display function for switching to the synchronization signal to display a screen.
【請求項2】全画面に文字放送の受信画面をノンインタ
ーレス表示するとともに、子画面表示には子画面表示用
のインターレス用同期信号発生装置に切換えるか、もし
くは、子画面を表示しないときには、文字放送用のノン
インターレス用同期信号に切換えるようにした請求項1
記載のカラーテレビジョン受像機。
2. A teletext reception screen is displayed on the entire screen in a non-interlaced manner, and the sub-screen display is switched to an interlaced sync signal generator for the sub-screen display, or when the sub-screen is not displayed. , The non-interlaced synchronizing signal for teletext is switched to.
Color television receiver as described.
JP16155691A 1991-07-02 1991-07-02 Color television receiver Pending JPH0514761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16155691A JPH0514761A (en) 1991-07-02 1991-07-02 Color television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16155691A JPH0514761A (en) 1991-07-02 1991-07-02 Color television receiver

Publications (1)

Publication Number Publication Date
JPH0514761A true JPH0514761A (en) 1993-01-22

Family

ID=15737356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16155691A Pending JPH0514761A (en) 1991-07-02 1991-07-02 Color television receiver

Country Status (1)

Country Link
JP (1) JPH0514761A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1163852A4 (en) * 1999-02-18 2002-06-12 Fujisawa Pharmaceutical Co Masking agent

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1163852A4 (en) * 1999-02-18 2002-06-12 Fujisawa Pharmaceutical Co Masking agent

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