JPH0514181A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To make an output voltage range of a basic circuit narrow. CONSTITUTION:Gates of a couple of MOS transistors(TRs), that is, a p-channel TR 10 and an n-channel TR 12 are connected and an input terminal is provided to the connection. Moreover, a drain of the TR 10 and a drain of the TR 12 are connected and an output terminal is provided to the connection point. A TR 16 of diode connection as a voltage drop element is provided between the TR 10 and a power supply line 14 and similarly a TR 20 of diode connection is provided between the TR 14 and an earth line 18. Then the range of the output voltage is reduced by the voltage drop of the TRs 16, 20.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to improvement of an integrated circuit having a basic circuit composed of a plurality of MOS type transistors.

[0002]

2. Description of the Related Art FIG. 5A shows an inverter circuit as an example of a conventional semiconductor integrated circuit. CMOS in this example
Power supply line (power supply voltage V _DD = 5V)
Is connected to the source terminal of the p-channel transistor (amplifying element) 1 and the drain terminal of the load element 1 is connected to n.
It is connected to the drain terminal of the channel transistor (amplifying element) 2. An input terminal is provided by connecting the gate terminals of both elements 1 and 2, and an output terminal is provided from the connecting portion between the drain terminal of the amplification element 1 and the drain terminal of the amplification element 2.

In the inverter circuit having such a configuration, when the input voltage Vin is high, the amplifying element 1 is turned off and the amplifying element 2 is turned on, and its output terminal is connected to the ground via the amplifying element 2, so that the output voltage Vout is It becomes Low (zero).
On the other hand, when Vin decreases, the states of the elements 1 and 2 are reversed, so that the output terminal becomes conductive with the power supply line and Vout
Becomes High (V _DD = 5V). The characteristic of the output voltage Vout with respect to the input voltage Vin at this time is shown in FIG.
Shown in.

[0004]

However, in the above-mentioned conventional inverter circuit, the output voltage thereof changes only between 0V which drops to the ground and 5V where the power supply voltage V _DD is output as it is, as described above. (Substantially 0V and 5
V)) and its output voltage range cannot be changed, and low power consumption cannot be achieved.

Further, as the miniaturization of each element progresses with the integration of semiconductor integrated circuits, the breakdown voltage (with respect to voltage) of each transistor and the like decreases. Then, if the conventional power supply voltage is applied as it is, fluctuations in the power supply voltage and element characteristics (breakdown voltage)
There is a possibility that a voltage higher than the withstand voltage may be instantaneously applied to the transistor due to the reasons such as the dispersion of the above, and the transistor may be destroyed. Further, due to the same reason, there arises a problem of durability due to long-term use.

Furthermore, β is one of the characteristics of a transistor when the temperature in the operating environment rises.
It also has a problem of stability in temperature characteristics such as a decrease in temperature and an increase in gate delay.

The present invention has been made in view of such a background, and its object is to reduce the power consumption by changing the output voltage, more specifically, by narrowing the fluctuation range of the output voltage. Another object of the present invention is to provide a semiconductor integrated circuit whose main purpose is to further improve reliability against breakdown voltage and stability of temperature characteristics.

[0008]

In order to achieve the above object, a semiconductor integrated circuit according to the present invention comprises a plurality of MOSs.
Type MOS transistor, a power source line for driving the MOS type transistor, and a voltage drop element inserted between the power source line and one of the MOS type transistors.

Further, it is desirable that the voltage drop element is constructed by diode-connecting a separately provided MOS type transistor.

[0010]

Since the voltage drop element is inserted between the connection between the power supply line and the MOS transistor, the transistor connected to the power supply line is dropped from the power supply voltage by the voltage between the terminals of the voltage drop element. Voltage will be applied. As a result, the high-level output voltage Vout generated at the output terminal becomes the lowered voltage (lower than the power supply voltage). Therefore, the variation range of the output voltage becomes narrow. Further, since the voltage thus lowered is applied, even a transistor having a small withstand voltage can be used stably.

Further, when a diode-connected transistor is used as the voltage drop element, if the temperature rises under the environment of use, the threshold voltage corresponding to the voltage drop from the power supply voltage drops, and the output The voltage range is about to widen. As a result, even if β of the transistor is lowered due to the temperature rise and a gate delay is caused, the effect of widening the output voltage range is offset and the temperature compensation is performed, so that the stabilization, that is, the temperature dependence is reduced.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor integrated circuit according to the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 shows a first embodiment of the present invention using an inverter circuit as an example. As shown in the figure, the basic configuration of the inverter circuit is the same as the conventional circuit. That is, a pair of MOS type transistors, that is, p-channel transistors (elements) 10,
The gate terminals of the n-channel transistor (amplifying element) 12 are connected to each other, and an input terminal is provided at the connecting portion. Further, the drain terminal of the element 10 and the drain terminal of the amplifying element 12 are connected, and an output terminal is provided at the connecting portion.

In the present invention, the transistor 16 which is a voltage drop element is provided between the source terminal of the element 10 and the power supply line 14. This transistor 16 has p
It is a channel MOS transistor, and is configured by connecting the gate terminal and the drain terminal thereof, that is, the diode connection.

Further, in this example, the diode-connected transistor 20 is arranged between the source terminal of the amplifying element 12 and the ground line 18 in the same manner as described above. However,
This transistor 20 is composed of an n-channel element.

Next, the operation of this circuit will be described.
First, when the input voltage Vin is high, the element 10 is turned off and the amplification element 12 is turned on, so that the current flows from the amplification element 12 through the transistor 20 to the ground line 18. Then, a voltage corresponding to the threshold voltage (V _TN ) appears between the terminals of the diode-connected transistor 20. Therefore, the output voltage Vout generated at the output terminal of the inverter circuit becomes the voltage _VTN .

On the other hand, when Vin decreases, each element 10, 12
However, since the output terminal becomes conductive with the power supply line 14, the voltage corresponding to the threshold voltage (V _TP ) appears between the terminals of the transistor 16, so that the element 10 eventually becomes A voltage lowered by the voltage (V _TP ) from the power supply voltage V _DD is applied. As a result, the output voltage Vout generated at the output terminal when the input voltage is low becomes V _DD -V _TP .

Therefore, the input / output voltage characteristics are as shown in FIG. 7B, and the output voltage range is (V _DD −
It is between V _TP ) and V _TN , which is narrower than the conventional range from V _DD to zero. As a result, power consumption can be reduced. Further, since the voltage is applied to each transistor in the state where V _DD is divided as described above, the voltage applied to each transistor is also reduced. Further, since the voltage applied to various elements connected to the output terminal is also small, even if the withstand voltage of the element is small, it is not destroyed. Further, in this embodiment, since the elements forming the inverter circuit and the voltage drop element are the same type of element, when the semiconductor integrated circuit is manufactured by the so-called master slice method, the wiring is simply adjusted. Since the circuit of the embodiment can be manufactured, there is also an advantage that the manufacturing process is simplified.

Next, considering the influence of the present circuit on the temperature change, β of the transistor decreases with an increase in temperature, and it tends to cause a gate delay. In addition, since the threshold voltages V _TP and V _TN of the transistors 16 and 20 serving as voltage drop elements decrease as the temperature rises as shown in FIG. 2, as indicated by the chain double-dashed line in FIG. ,
It works in the direction of widening the output voltage range. As a result, even if the temperature rises, the increase of the gate delay due to the decrease of β of the transistor and the decrease of the gate delay due to the expansion effect of the output voltage range are offset, and the temperature compensation is performed, so that the gate delay is stable. Turn into.

FIG. 3 shows a second embodiment of the present invention.
In the present embodiment, unlike the above-described first embodiment, the diodes 22 and 24 are used as voltage drop elements. still,
Since the basic circuit configuration is the same as that of the first embodiment,
By giving the same reference numerals, detailed description thereof will be omitted.
Further, the principle of operation and the action and effect are the same as those in the above embodiment. However, in the case of this embodiment, the first
It does not have the temperature compensation effect of the embodiment. Although not shown, a resistor may be arranged instead of this diode.

FIG. 4 shows a third embodiment of the present invention.
In this embodiment, unlike the above-described embodiments, a plurality of basic circuits 38 are provided for a pair of diodes 34 and 36 connected to the power supply line 30 and the ground line 32, respectively.
a, 38b, 38c ... Are connected in parallel. The basic circuit 38a is a 2-input NAND circuit, the basic circuit 38b is an inverter, and the basic circuit 38c is a 2-input NOR circuit. With such a configuration, the number of elements to be used can be reduced, and the size and shape of the final product can be reduced. The other configurations, operations, and effects are the same as those in the above-described embodiments. Further, the voltage drop element is not limited to the diode, and it goes without saying that a transistor or a resistor may be used as in the above-described embodiments. Further, a plurality of voltage drop elements may be inserted and arranged.

[0021]

As described above, in the semiconductor integrated circuit according to the present invention, the voltage drop element is inserted and arranged between the power supply line and one of the MOS type transistors constituting the basic circuit connected to the power supply line. To the transistor connected to the power supply line, a voltage dropped from the power supply voltage by the voltage between the terminals of the voltage drop element is applied.
As a result, the output voltage of the inverter circuit becomes such a lowered voltage, which is lower than the power supply voltage, and the fluctuation range can be narrowed. Therefore, low power consumption can be achieved.

Further, even if the breakdown voltage of each element (transistor) is reduced due to miniaturization, the power supply voltage is not directly applied as described above, so that there is no fear of destruction of the element and the breakdown voltage. Reliability is improved.

Furthermore, when a diode-connected transistor is used as the voltage drop element, the decrease of β due to the temperature rise and the expansion of the output voltage range due to the decrease of the threshold voltage corresponding to the voltage drop are offset. Thereby, the stability of the temperature characteristics can be achieved.

[Brief description of drawings]

FIG. 1A is a circuit diagram showing a first embodiment of a semiconductor integrated circuit according to the present invention. (B) is a graph showing the input / output voltage characteristics.

FIG. 2 is a graph showing temperature characteristics of a threshold voltage of a transistor.

FIG. 3 is a circuit diagram showing a second embodiment of the semiconductor integrated circuit according to the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the semiconductor integrated circuit according to the present invention.

FIG. 5A is a circuit diagram showing an example of a conventional semiconductor integrated circuit. (B) is a graph showing the input / output voltage characteristics.

[Explanation of symbols]

10 ... Transistor (one transistor) 12 ... Transistor (other transistor) 14 ... Power line 16 ... Transistor (voltage drop element)

Claims (2)

[Claims] 1. A basic circuit composed of a plurality of MOS transistors, a power supply line for supplying a driving current to the basic circuit, and a voltage drop element inserted between the power supply line and the basic circuit. A semiconductor integrated circuit characterized by the above. 2. The M provided with the voltage drop element separately.
The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit is configured by diode-connecting an OS transistor.