JPH0513726A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent degradation of element characteristics induced by the heat treatment under an environment including oxygen in a semiconductor memory where a capacitor which uses ferroelectrics is integrated on the same semiconductor board where active elements are formed. CONSTITUTION:A boron-phosphoric glass layer 108 is installed between a lower part electrode 109 of a capacitor which uses ferroelectrics and an oxygen non- penetration film 107 so as to serve a film capable of relaxing the stress of an oxygen non-penetration film.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device using a ferroelectric material.

[0002]

2. Description of the Related Art As a conventional semiconductor nonvolatile memory,
A MIS transistor, which uses a phenomenon in which a surface potential of a silicon substrate is modulated by injecting charges from the silicon substrate into a trap or a floating gate in an insulated gate, is generally used, and an EPROM (UV erasing type) is used. Non-volatile memory), EEPROM (electrically rewritable non-volatile memory) and the like have been put to practical use.

[0003]

However, in these nonvolatile memories, the rewriting voltage of information is usually as high as about 20V, and the rewriting time is very long (for example, EEPRO).
In the case of M, it has a defect such as several tens of msec). In addition, the number of times of rewriting information is about 10 ² times, which is very small, and there are many problems when repeatedly used.

For a non-volatile memory using a ferroelectric material whose polarization can be electrically inverted, write time and
In principle, the read times are almost the same, and the polarization is retained even when the power is turned off, so there is a possibility that it will be an ideal non-volatile memory. A nonvolatile memory using such a ferroelectric substance is disclosed in, for example, US Pat. No. 4,149,302.
As described above, a structure in which a capacitor made of a ferroelectric material is integrated on a silicon substrate, and a non-volatile memory in which a ferroelectric film is arranged in the gate portion of a MIS transistor as in US Pat. No. 3,832,700 have been proposed. . Also,
Recently, a non-volatile memory having a structure laminated on a MOS semiconductor device has been disclosed in IEDM'87 pp. 850-851.

FIG. 2 shows an example of a non-volatile memory having a structure in which a ferroelectric film is laminated on a MOS semiconductor device. In FIG. 2, 201 is a P-type Si substrate, 202 is a LOCOS oxide film for element isolation, 203 is an N-type diffusion layer serving as a source, and 204 is an N-type diffusion layer serving as a drain. Reference numeral 205 is a gate electrode, and 206 is an oxygen impermeable first interlayer insulating film containing silicon nitride as a main component. 20
A ferroelectric film 7 is sandwiched between electrodes 208 and 209 to form a capacitor. Reference numeral 210 is a second interlayer insulating film, and reference numeral 211 is aluminum serving as a wiring electrode.

In this way, the ferroelectric film is laminated on the upper part of the MOS type semiconductor device, and the oxygen impermeable interlayer insulating film containing silicon nitride as a main component is provided between the semiconductor substrate and the ferroelectric film. In the laminated structure, although it is possible to prevent the diffusion of oxygen into the semiconductor element during the heat treatment in an oxidizing atmosphere, the stress due to the oxygen-impermeable interlayer insulating film containing silicon nitride as the main component Therefore, there is a problem that element characteristics are deteriorated.

Therefore, the present invention solves such a problem, and an object of the present invention is to relieve stress in a film containing silicon nitride as a main component for preventing diffusion of oxygen into a semiconductor element. The object of the present invention is to provide an excellent semiconductor device by preventing the deterioration of element characteristics due to it.

[0008]

The semiconductor device of the present invention comprises:
In a semiconductor device in which a capacitor using a ferroelectric is integrated on the same semiconductor substrate on which an active element is formed, an oxygen impermeable film containing silicon nitride as a main component, between the semiconductor substrate and the capacitor, , Between the capacitor,
It is characterized by having a film whose main component is silicon dioxide containing impurities.

[0009]

1 is a main sectional view of an embodiment of a semiconductor device of the present invention. The semiconductor device of the present invention will be described below with reference to FIG. Here, for convenience of explanation, an example using an Si substrate and an N-channel transistor will be described.

Reference numeral 101 is a P-type Si substrate, for example, 20
A wafer having a specific resistance of Ω · cm is used. 102 is an insulating film for element isolation, for example, LOCOS which is a conventional technique.
An oxide film of 6000Å is formed by the method. Reference numeral 103 is an N-type diffusion layer which serves as a source, and is made of, for example, phosphorus of 80 keV5 ×
It is formed by implanting 10 ¹⁵ cm ⁻² ions. 1
Reference numeral 04 denotes an N-type diffusion layer which will be a drain and is formed simultaneously with 103. Reference numeral 105 denotes a gate electrode, which uses, for example, phosphorus-doped polycrystalline silicon. Reference numeral 106 denotes a first interlayer insulating film, which is formed by a chemical vapor deposition method to form 4000 Å of silicon dioxide.

Reference numeral 107 denotes an oxygen impermeable film, which is made of silicon nitride and has a thickness of 1000 liters formed by a chemical vapor deposition method. 108
Is a stress relaxation film according to the gist of the present invention, and forms boron phosphorus glass by 500∂ by chemical vapor deposition.

Numeral 109 is one electrode sandwiching the ferroelectric film, and for example, platinum is formed in a volume of 1000 Å by a sputtering method. Reference numeral 110 denotes a ferroelectric film, for example, lead titanate / zirconate titanate is formed by a sol-gel method to 2000 liters and then sintered in an oxygen atmosphere at 800 ° C. 111 is the other electrode sandwiching the ferroelectric film, and is formed in the same manner as 109. Reference numeral 112 denotes a second interlayer insulating film, which is formed by chemical vapor deposition, for example, to form phosphorous glass at 4000 Å.

Reference numeral 113 is a wiring electrode, for example, aluminum is formed by sputtering to a thickness of 5000 Å to form a predetermined pattern.

The structure of this embodiment is obtained as described above.

With such a structure, diffusion of oxygen to the substrate due to heat treatment in an oxygen atmosphere after the formation of the oxygen impermeable film 107 is prevented, and a film generated when the oxygen impermeable film 107 is formed. The stress is the stress relaxation film 108.
Is alleviated.

Now, in FIG. 1, in the case where the stress relaxation film 108 is not provided, when the titanate / lead zirconate is sintered, 800
When the heat treatment at ℃ is performed, the thermal expansion of the oxygen impermeable film 107
The film stress caused by heat shrinkage caused cracks and peeling of lead titanate / lead zirconate. However, in the case of the structure of this example, even if the similar heat treatment was applied, cracks or peeling did not occur in lead titanate / lead zirconate.

[0017]

According to the present invention, between the semiconductor substrate on which the active element is formed and the capacitor using the ferroelectric, and the oxygen impermeable film containing silicon nitride as a main component, and the capacitor. By laminating a silicon dioxide film containing impurities, the cracks and peeling that occur in the capacitor during the heat treatment in the subsequent steps can be prevented, and the deterioration of the device characteristics due to the effect can be prevented. Have.

[Brief description of drawings]

FIG. 1 is a main cross-sectional view of a semiconductor memory device according to an embodiment of the present invention.

FIG. 2 is a main cross-sectional view of a semiconductor memory device according to a conventional technique.

[Explanation of symbols]

101 Silicon substrate 102 element isolation film 103 source area 104 drain region 105 gate electrode 106 first interlayer insulating film 107 oxygen impermeable membrane 108 stress relaxation film 109 Lower electrode 110 Ferroelectric film 111 upper electrode 112 Second interlayer insulating film 113 wiring layer 201 Silicon substrate 202 element isolation film 203 Source area 204 drain region 205 gate electrode 206 First interlayer insulating film 207 Ferroelectric film 208 Lower electrode 209 upper electrode 210 second interlayer insulating film 211 wiring electrode

Claims (3)

[Claims] 1. A semiconductor device in which a capacitor using a ferroelectric material is integrated on the same semiconductor substrate on which an active element is formed, and silicon nitride is a main component between the semiconductor substrate and the capacitor. A semiconductor device comprising: a film containing silicon dioxide containing impurities as a main component between an oxygen impermeable film and the capacitor. 2. The semiconductor device according to claim 1, wherein the silicon dioxide containing impurities is silicon dioxide containing 1 mol% or more of phosphorus. 3. The semiconductor device according to claim 1, wherein the silicon dioxide containing impurities is silicon dioxide containing 1 mol% or more of phosphorus and boron, respectively.