JPH05134671A - Electronic musical instrument - Google Patents

Abstract

PURPOSE:To control a release musical tone waveform at the time of attenuating a generated musical tone in the same way as an actual natural musical instrument. CONSTITUTION:In the electronic musical instrument having a keyboard 1 for generating key operating information, a waveform storage circuit 10 in which waveform data corresponding to the key operation information is stored in advance, an address setting circuit 8 and an address generating circuit 9 for reading out the waveform data from the waveform storage circuit 10 in accordance with sound pitch information corresponding to the key operating information and outputting a musical tone signal, and an envelope generating circuit 13 for generating an envelope signal in accordance with the key operating information, a table in which first and second divided sound pitch information corresponding to the key operating information is stored in advance, and a CPU 2 for reading out firs and second divided sound pitch information in accordance with the key operating information and supplying it to the address setting circuit 8 and the address generating circuit 9 are provided, and the address setting circuit 8 and the address generating circuit 9 read out the waveform data from the waveform storage circuit 10 in accordance with first and second divided sound pitch information and output the musical tone signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic musical instrument that produces a musical tone whose volume, tone color and the like change in the same manner as a natural musical instrument tone.
In particular, the present invention relates to an electronic musical instrument capable of controlling a release musical tone waveform when a generated musical tone is attenuated, like an actual natural musical instrument.

[0002]

2. Description of the Related Art In a conventional electronic musical instrument, a PCM sound source for reading out waveform data stored as a PCM in a memory at a clock according to an operation of a keyboard by a performer and an amplitude of the waveform data are controlled. Some have been provided with an envelope generator (EG) that generates an envelope signal that controls the volume and tone of the waveform data.

[0003]

By the way, as is well known, many natural musical instruments include a mechanism for sounding and a damping mechanism for silencing (attenuating) the sounded musical sound. For example, in a piano or the like, a string is struck in response to a key press, and a damper corresponding to the above-described damping mechanism comes into contact with the vibrating string, whereby the vibration of the string is damped and vibrated. Is attenuated, and the damper itself is pressed against the string itself which is the vibrating body, so that the musical tone waveform itself is changed. A musical sound peculiar to the piano is formed by such a damping mechanism.

Further, not only in such a damping mechanism, but in a stringed instrument such as a guitar or a violin, for example, when the vibration applied to the string is large, the string hits the fingerboard or the fret beyond the normal amplitude range. , By this, a characteristic musical sound is formed. As described above, in an actual natural musical instrument, a musical tone peculiar to the musical instrument is often formed in the behavior after the pronunciation, that is, in the process from the musical tone generation to the attenuation.

However, in the above-mentioned conventional electronic musical instrument, although the overall shape of the envelope of the generated musical tone can be simulated by appropriately selecting each parameter, the release musical tone waveform when the generated musical tone is attenuated is EG. Most are controlled by
It simply controls the amplitude value of the tone waveform. Therefore, no consideration is given to changes in the musical tone waveform from the generation of the musical tone to the attenuation as in a natural musical instrument, and the attenuation of the musical tone waveform is unnatural and unsatisfactory as compared with the natural musical instrument. The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an electronic musical instrument capable of controlling a release musical tone waveform when a generated musical tone is attenuated in the same manner as an actual natural musical instrument.

[0006]

The invention according to claim 1 is
Key operation information generating means for generating key operation information, first storage means in which waveform data corresponding to the key operation information is stored in advance, and the waveform data is converted into the key operation information from the first storage means. In an electronic musical instrument having a tone generation means for reading out according to corresponding pitch information and outputting a tone signal, and an envelope signal generation means for generating an envelope signal for controlling an envelope shape of a generated tone according to the key operation information. , The first corresponding to the key operation information
And a second pre-stored second divided pitch information
And a control means for reading the first and second divided pitch information from the second storage means in accordance with the key operation information and supplying it to the musical tone generating means. The means is characterized in that the waveform data is read from the first storage means according to the first and second divided pitch information and a tone signal is output.

The invention according to claim 2 further comprises a key operation information generating means for generating key operation information, and a storage means for storing waveform data corresponding to the key operation information in advance.
Musical tone generating means for reading the waveform data from the storage means according to the key operation information and outputting a musical tone signal, and envelope signal generation for generating an envelope signal for controlling the envelope shape of the generated musical tone according to the key operation information. An electronic musical instrument having means for limiting the amplitude of the waveform of the musical tone signal to be input according to the envelope signal, and inputting the musical tone signal according to the difference between the musical tone signal and the amplitude-limited signal. And a modulation means for further limiting the amplitude of the waveform of the musical tone signal.

[0008]

According to the first aspect of the invention, when the key operation information generating means generates the key operation information, the musical tone generating means generates the first sound.
The waveform data is read from the storage means according to the pitch information corresponding to the key operation information, and a musical tone signal is output. On the other hand, the envelope signal generating means generates an envelope signal for controlling the envelope shape of the generated musical tone according to the key operation information. Then, the control means reads the first and second divided pitch information from the second storage means according to the key operation information and supplies it to the musical tone generating means. As a result, the musical tone generating means reads the waveform data from the first storage means in accordance with the first and second divided pitch information and newly outputs a musical tone signal.

According to the second aspect of the invention, when the key operation information generating means generates the key operation information, the musical tone generating means reads the waveform data from the storing means in accordance with the key operating information and outputs the musical tone signal. Output. On the other hand, the envelope signal generating means generates an envelope signal for controlling the envelope shape of the generated musical tone according to the key operation information. Then, the modulating means limits the amplitude of the waveform of the input musical tone signal according to the envelope signal, and, according to the difference between the musical tone signal and the amplitude-limited signal, the amplitude of the waveform of the input musical tone signal. Make more restrictions.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an electronic musical instrument according to a first embodiment of the present invention, in which 1 is a keyboard. The keyboard 1 has a mechanism for detecting the key release for each key and for detecting the key pressing speed and the key releasing speed, and generates a signal corresponding to the key pressing and the key releasing speed. .. A keyboard interface 1a generates pitch-related information, a key depression speed signal, and a key release speed signal based on various signals supplied from the keyboard 1. A CPU 2 controls each part of the electronic musical instrument, and its operation will be described later.

A ROM 3 stores various control programs loaded into the CPU 2 and various data used in these programs. A RAM 4 temporarily stores various calculation results of the CPU 2 and register values. 5
Is a pedal arranged in this electronic musical instrument, and acts in the same manner as a damper pedal (sustain pedal or sostenuto pedal) in an actual piano, and controls the attenuation of musical sound according to the operation amount. Also, pedal 5
Like the keyboard 1, is equipped with a mechanism for detecting its operation speed and generates a signal corresponding to the operation amount or a signal representing the operation speed. A pedal interface 5a outputs a pedal key release speed signal based on various signals supplied from the pedal 5.

Reference numeral 6 denotes a tone synthesis circuit which synthesizes a tone based on various signals supplied from the CPU 2 via the bus and outputs a tone signal W formed thereby, the structure of which will be described later. Reference numeral 7 denotes a sound system, which filters the musical tone signal W, removes unnecessary noise, or performs sound effect processing, and then amplifies and gives it to the speaker SP to produce a musical sound.

Next, the configuration of the musical tone synthesis circuit 6 will be described with reference to FIG. In the figure, reference numeral 8 denotes an address setting circuit, which is a key-on signal KONP, a key-off signal KOFFP, a key code KC and a key pressing speed information IT (key releasing speed information R supplied from an interface (not shown).
T and pedal key release speed information RP), the attack portion read start address START. AD and attack section read end address END. AD is generated, and this is supplied to the address generation circuit 9. The key-on signal K
The ONP / key-off signal KOFFP is a signal generated in response to a key pressing operation on the keyboard 1, and a key code KC.
Is information indicating a pitch corresponding to a key depression operation. Also,
In the address setting circuit 8, the waveform storage circuit 10
In order to read the attack waveform from, the signal MODE indicating the read mode is generated. The attack waveform does not need to be read repeatedly, so the signal MODE
Is output as "MODE = 0" for instructing one read.

Reference numeral 11 is a phase generating circuit, which generates phase information according to the key code KC when the above-mentioned key-on signal KONP is applied. This phase information gives the pitch of a musical tone and is composed of an integer part I and a decimal part F. The address generation circuit 9 includes a phase generation circuit 11
From the integer setting part I of the phase information supplied from the address setting circuit 8 and the attack part read start address STA supplied from the address setting circuit 8.
RT. AD is added to output the read address AD of the waveform information to be actually read.

Further, the address generation circuit 9 outputs the read address AD output from the end address END. When it becomes the same as AD, the loop waveform request signal LOO is sent to the address setting circuit 8 described above.
P. Output REQ. In this case, the address generation circuit 9
Is a reset request signal RESET. For resetting the generated phase information to the phase generation circuit 11. RE
Output Q. The correction value FINE. P will be described later.

The loop waveform request signal LOOP. R
The address setting circuit 8 to which the EQ is supplied receives from the waveform storage circuit 10 the loop portion waveform read start address START. A
D and the loop section waveform read end address END. AD and AD are read and given to the address generation circuit 9. In this case, since the loop waveform needs to be repeatedly read, the signal MODE indicates “MO” repeatedly.
It is output as "DE = 1". In this way, the read start address START. The address signal AD obtained by adding AD and the integer part I of the phase information is supplied to the waveform storage circuit 10. As a result, the waveform information stored in the waveform storage circuit 10 is read out and output as the waveform signal W1.

Reference numeral 12 is an interpolation circuit. This interpolation circuit 12
Performs an interpolation operation on the waveform signal W1 based on the fractional part F of the phase information described above, and outputs a waveform signal W2 obtained as a result. In the interpolation calculation performed here, between adjacent samples, that is, two pieces of waveform information may be linearly interpolated by the decimal part F, or two or more pieces of waveform information may be stored and higher-order interpolation may be performed. Good.

Reference numeral 13 denotes a key-on signal KONP and a key-off signal KOFF supplied from an interface (not shown).
An envelope signal ENV corresponding to P, the key code KC and the key pressing speed information IT is generated, and this is multiplied by the multiplication circuit 14
It is an envelope generation circuit that outputs to. In the envelope generation circuit 13, the maximum amplitude level of the envelope signal ENV is set based on the key pressing speed information IT, and the rising / falling speed of the envelope signal ENV is controlled according to the key code KC. It Key-on information KONP and key-off information KOFF
P is used for this rise / fall timing control.

The multiplication circuit 14 multiplies the waveform signal W2 output from the interpolation circuit 12 and the envelope signal ENV output from the envelope generation circuit 13, and outputs the multiplication result as the tone signal W described above. The musical tone signal W is given to the envelope detection circuit 15. The envelope detection circuit 15 is composed of a low-pass filter or the like, extracts the envelope waveform (envelope shape) of the musical tone signal W described above, and outputs an envelope signal ENV representing the maximum amplitude level at each time point. This envelope signal E
The NV is given to the CPU 2 via the bus. The envelope signal ENV is used for the tone generation channel assignment control performed by the CPU 2, and this assignment control will be described later.

Next, FIG. 3 shows the waveform storage circuit 10 shown in FIG.
It is a figure which shows the concept of the storage form of the waveform memory with which it is equipped. As shown in this figure, the waveform memory provided in the waveform storage circuit 10 stores an attack waveform portion used when a musical tone is generated and a loop waveform portion used to maintain the generated musical tone independently. ing. Since the attack waveform of a musical sound is a very characteristic waveform that determines the tone color peculiar to a musical instrument, it is difficult to compress the amount of information. On the other hand, the loop waveform, which is the stationary part, has little change and an envelope is added to the same waveform, and this is read repeatedly, so that the amount of information can be compressed.

FIG. 3 shows the concept of the storage form of the attack waveform portion among them. That is, in this waveform memory, the storage area of the attack waveform section is divided in correspondence with the key pressing speed and the key area in which the key is pressed, and different waveforms are obtained based on this. In addition,
WA (M, N) shown in this figure represents an array element of the storage area. Ideally, the memory area is divided at each key pressing speed and each pitch. However, in this case, the memory occupying area increases, so that each is provided with a typical waveform.

Next, FIG. 4 is a memory layout diagram showing a specific example of the layout on an actual memory based on the above-mentioned concept of the waveform memory. That is, FIG. 4A is a memory map showing the configuration of the entire waveform memory. Also,
FIG. 7B is a memory map showing the contents of the attack table. In this memory map, the IT range and the KC range are numerical values indicating how many times the key pressing speed and the key bank (pitch) shown in FIG. 3 are divided. Subsequent to these ranges, a read start address and a read end address of the waveform information for each divided area are registered.

Next, FIG. 7C is a memory map showing the contents of the loop part table, and its configuration is the same as that of the attack part described above. In this loop part table, the storage area is divided similarly to the attack part waveform, but each IT range and K
By changing the C range, the division form can be changed. Next, FIG. 6D is a memory map showing the contents of the waveform storage section. Here, each waveform information is stored in the address designated by the attack section table and the loop section table described above. It should be noted that the waveform information is 0 at the read end address in the attack waveform in order to facilitate the connection between the waveforms.
It is assumed that the phase is compensated, and that in the loop waveform, the 0 phase is compensated at both the read start address and the read end address.

The operation of the CPU 2 having such a configuration will be described with reference to the flow charts of FIGS. When the electronic musical instrument of FIG. 1 is powered on, the CPU 2
First, the process proceeds to step Sa1 of the main routine of FIG. 5 to initialize each part of the apparatus. This initialization includes zero reset of various registers and initialization of various variables that are initial settings of peripheral circuits. Then, the CPU 1 proceeds to step Sa2. Step S
At a2, the keyboard 1 is scanned to detect the pressed / released state of the keyboard 1, and then the process proceeds to step Sa3.

In step Sa3, it is determined whether or not there is a key event based on the key release state of the keyboard 1 detected in the key scanning process of step Sa2. This judgment result is "YE
In the case of "S", the process proceeds to step Sa4. On the other hand, when the determination result of step Sa3 is "NO", that is,
If no key event is detected, the process proceeds to step Sa8 described later. At step Sa4, a register KEV for temporarily storing a key event, a register KC for temporarily storing a key code KC, and a register IT for temporarily storing a key pressing speed.
And a value corresponding to the detection state are set in the register RT that temporarily stores the key release speed, and then, in step Sa5.
Go to.

In step Sa5, it is determined whether the content of the register KEV corresponds to the key-on event KON. If the result of this judgment is "YES",
Proceeding to step Sa6, key-on (pronunciation) processing is performed.
On the other hand, if the determination result of step Sa5 is "NO", that is, if the content of the register KEV is the key-off event KOFF, the process proceeds to step Sa7, and key-off (silence) processing is performed. The details of the key-on process and the key-off process will be described later. Then, when these sound generation processing or mute processing is completed,
The CPU 2 proceeds to step Sa8.

In step Sa8, a pedal scan for detecting the operation state of the pedal 5 is performed, and then the process proceeds to step Sa9. In step Sa9, the presence or absence of a pedal event is determined from the state of the pedal 5 detected in the pedal scanning process of step Sa8. If the result of this determination is "YES", then the operation proceeds to step Sa10. On the other hand, when the determination result of step Sa9 is "NO", that is, when the pedal event is not detected, the process proceeds to step Sa14 described later.

In step Sa10, the register PEV for temporarily storing the pedal event and the register RP for temporarily storing the pedal releasing speed are set to the values corresponding to the detected states, respectively, and then the process proceeds to step Sa11. Step Sa1
At 1, it is determined whether or not the content of the register PEV is a pedal-on event PON indicating that the pedal 5 has been operated. If the result of this determination is "YES", the flow proceeds to step Sa12, and pedal-on processing is performed. On the other hand, when the determination result of step Sa11 is "NO", that is, the content of the register KEV is the pedal off event POF.
If it is F, the process proceeds to step Sa13 and pedal off processing is performed. The details of these pedal-on processing and pedal-off processing will be described later. When the pedal-on process or the pedal-off process is completed, the CPU 2 proceeds to step Sa14.

In step Sa14, the end of the tone synthesis for each channel is detected, and the end detection process for setting the vacant channels for which sound generation has been completed is executed. After such process is completed, the process returns to step Sa2 described above, and the power is turned on. A series of processes in steps Sa2 to Sa14 are repeatedly executed until the disconnection. As described above, in the main routine, the CPU 2 operates so as to instruct to synthesize a musical sound according to various events, and this musical sound synthesis is realized by various processes described later.

Next, the key-on process of the CPU 2 will be described with reference to the flowchart of FIG. When the processing of the CPU 2 proceeds to step Sa6 of FIG. 5, the key-on processing routine shown in FIG. 6 is started. The CPU 2 first proceeds to the process of step Sb1, searches for an empty channel for detecting a channel that can be allocated, and then proceeds to step Sb2. Here, an empty channel means a state of waiting for sound generation.

In step Sb2, it is determined whether or not there is a currently empty channel based on the state of the channel detected in the empty channel search process of step Sb1. If the result of this determination is “NO”, that is, if all the sounding channels are sounding in some way,
It proceeds to step Sb3.

At step Sb3, a tone generation channel having the lowest amplitude level of the envelope waveform, that is, a channel having the most attenuation is selected, and the tone generation is forcibly stopped to perform a truncate process to make it an "empty channel". .. In this embodiment, a so-called last-arrival priority sounding assignment method is used, and even if all sounding channels are filled, if there is a new key depression, any sounding channel is forcibly muted and The process of assigning a new key depression sound is being performed. Then, the CPU 2 proceeds to step Sb4. On the other hand, if the result of the determination in step Sb2 is "YES", that is, if there is currently a free channel, the process proceeds to step Sb4.

At step Sb4, the obtained tone generation channel number is set in the register CH, and then at step Sb4.
Go to 5. In step Sb5, since the state of the channel corresponding to the tone generation channel number set in the register CH is represented as the tone generation continuation state, the register ST [CH]
After the value (state signal ST) of is set to "1", the process proceeds to step Sb6. Here, the correspondence between this register ST [CH] and each channel status is ST as shown in FIG.
[CH] = “0” indicates a channel standby state, and “1”
Represents a sound-on state by key-on, "2" represents a sound-on state by a damper, and "3" represents a release waveform sound-on state. In step Sb6, the register AKC in which the key code KC is stored corresponding to the channel
After setting the key code KC to be pronounced in [CH],
It proceeds to step Sb7.

In step Sb7, the tone synthesis circuit 6 corresponding to the tone generation channel number set in the register CH.
After the key code KC, the key pressing speed information IT, and the key-on information KONP are output to the vacant channel, the process returns to the main routine of FIG. 5 and proceeds to step Sa8. As a result, the tone synthesis circuit 6 generates a tone signal W based on these pieces of information.

Next, the key-off process of the CPU 2 will be described with reference to the flowchart of FIG. When the processing of the CPU 2 proceeds to step Sa7 of FIG. 5, the key-off processing routine shown in FIG. 8 is started. First, the CPU 2 proceeds to the process of step Sc1, and determines whether or not the channel of the key code KC corresponding to the key-off event KOFF set in the register KEV determined in the process of step Sa5 of FIG. 5 is currently sounding. to decide. If the result of this determination is "NO", that is, if the corresponding musical sound is no longer being pronounced, for example, when the key depression is continued and the pronunciation is completely attenuated, or during the key depression due to the truncation process. If the pronunciation is forcibly terminated regardless of the situation, do nothing and return to the main routine of FIG.
Go to step Sa8.

On the other hand, when the result of the determination in step Sc1 is "YES", that is, the corresponding key code KC
If the channel is currently sounding, step S
Proceed to c2. In step Sc2, the number of the corresponding tone generation channel is set in the register CH, and then step Sc
Go to 3.

At step Sc3, the register AKC [C
It is determined whether the key code KC stored in [H] is smaller than "102". In this embodiment, the key code table shown in FIG. 9 is used. And the key code KC
However, since the dampers are not provided for the keys of “102” and above, the dampers do not naturally perform the processing. That is,
In the process of step Sc3, it is determined whether or not the process by the damper is performed. When the result of the determination in step Sc3 is "NO", the process proceeds to step Sc4.

At step Sc4, the register ST [C
[H] is set to "3" to set the release waveform sounding state, and then the process returns to the main routine of FIG.
Go to. On the other hand, the judgment result of step Sc3 is "YE
If "S", that is, if the key code KC stored in the register AKC [CH] is smaller than "102", the process proceeds to step Sc5.

In step Sc5, it is determined whether or not the flag PONF, which is set to "1" when the damper pedal 5 shown in FIG. 1 is depressed, is reset to "0". Here, the reason for making this determination is that in a natural musical instrument piano, unless the sustain pedal or sostenuto pedal is depressed, the damper comes down when the key is released, and the vibration of the strings is damped. If the result of this determination is "YES", that is, if the flag PF has been reset to "0" and the pedal 5 has not been depressed, the following are the features of the first embodiment of the present invention. The processing of steps Sc7 to Sc15 is performed. However, the determination result of step Sc5 is "NO".
In the case of, it progresses to step Sc6. In step Sc6, "2" indicating the sounding continuation state by the damper 5 is set in the register ST [CH] that stores the above-mentioned state of each channel, and then the process returns to the main routine of FIG. 5 and proceeds to step Sa8.

On the other hand, if the determination result of step Sc5 is "YES", that is, if the flag PF is reset to "0" and the pedal 5 is not depressed, the process proceeds to step Sc7. In step Sc7, the register ST [CH] is set to "3" to set the release waveform sounding state, and then the process proceeds to step Sc8.

At step Sc8, the key release speed information RT and the key-off information KO for the channel of the tone synthesis circuit 6 corresponding to the channel number set in the register CH.
After outputting the FFP, the process proceeds to step Sc9. In step Sc9, an empty channel is searched to detect an allocatable channel, and then step Sc10 is performed.
Go to.

In step Sc10, step Sbc9
It is determined whether or not two or more empty channels are detected in the empty channel search process. If the result of this determination is “NO”, nothing is done and the process returns to the main routine of FIG. 5 and proceeds to step Sa8. This process is performed when two or more empty channels are not detected.
That is, when many keys are pronounced at one time,
This is because even if the damper sound generation processing described below is performed, the effect is not exerted so much. On the other hand, step Sc10
If the result of the determination is “YES”, that is, if two or more free channels are detected, then step Sc1
Go to 1.

At step Sc11, one number of the obtained free channels is set in the register CH1 and then the process proceeds to step Sc11. In step Sc11,
After setting another number of the obtained free channels in the register CH2, the process proceeds to step Sc12.

In step Sc12, damper sound generation processing is performed. The damper sound generation process will be described below. In the case of a natural instrument piano, the damper is pressed in the middle of the vibrating string, so the string has two types of divided vibrations from one end of the string to the damper and from the damper to the other end of the string. Occurs. Therefore, in the present invention,
When processing the release tone waveform when the generated tone is attenuated, by considering this divided vibration,
It is intended to achieve a natural release that is more like a natural instrument.

In the case of a piano of a natural musical instrument, the position where the damper is pressed on a certain string is a position which is approximately an integer fraction of the entire string length, and the shorter pitch from one end of the string to the damper is Even the shortest string is approximately equal to or slightly shorter than the string length of the shortest string. Therefore, two key codes KC1 and KC2 corresponding to the pitches of the two types of divided vibrations corresponding to the key code KC and the respective correction values FINE. P1 and FINE. The value of P2 is stored in advance in the ROM 3 or RAM 4 shown in FIG. 1 as a table, and at the time of release by the damper, the key codes KC1 and KC are referred to by referring to these tables.
2 and the correction value FINE. P1 and FINE. P2 is obtained, and these are subjected to sound generation processing using two empty channels. This is the damper sound generation process described in detail below.

The processing of the CPU 2 is step Sc13 in FIG.
Proceeding to, the damper sound generation processing routine shown in FIG. 10 is started. First, the CPU 2 proceeds to the processing of step Sd1 and the key code K corresponding to the key-off event KOFF.
The key code KC1 corresponding to the pitch of one divided vibration and its correction value FINE. After obtaining P1, the process proceeds to step Sd2.

At step Sd2, the key-off event K
According to the key code KC corresponding to OFF, the above-mentioned table is referred to, and the key code KC2 corresponding to the pitch of the other divided vibration and its correction value FINE. After obtaining P2, the process proceeds to step Sd3. In step Sd3, the key release speed information RT multiplied by a constant α (0 <α <1) is set in the register RT. This processing is performed because the sound is too loud if the key-release speed information RT of the key code KC corresponding to the key-off event KOFF is used as it is, and a constant α is applied. And CP
U2 progresses to step Sd4.

In step Sd4, the key code KC1 and the correction value FIN are applied to the channel of the tone synthesis circuit 6 corresponding to the channel number set in the register CH1.
E. P1, key release speed information RT, key-off information KOFFP
After outputting, the process proceeds to step Sd5. Step Sd5
Then, the key code KC2 and the correction value FINE. Are input to the channel of the tone synthesis circuit 6 corresponding to the channel number set in the register CH2. P2, key release speed information RT,
After outputting the key-off information KOFFP, the process returns to the key-off processing routine of FIG. 8 and proceeds to step Sc14.

At step Sc14, the register ST [C
[H1] is set to "3" to set the release waveform sounding state, and then the process proceeds to step Sc15. Step Sc15
Then, after setting the register ST [CH2] to "3" to set the release waveform sounding state, the process returns to the main routine of FIG. 5 and proceeds to step Sa8.

Next, the pedal-on process of the CPU 2 will be described with reference to the flowchart of FIG. CPU2
When the processing of step S12 proceeds to step Sa12 of FIG. 5, the pedal-on processing routine shown in FIG. 11 is started. CPU2 is
The process proceeds to step Se1 and the pedal ON flag PON
After setting “1” to F, the process returns to the main routine of FIG. 5 and proceeds to step Sa14.

Next, the pedal off process of the CPU 2 will be described with reference to the flowchart of FIG. CPU2
When the processing of step S13 proceeds to step Sa13 of FIG. 5, the pedal-off processing routine shown in FIG. 12 is started. In this pedal-off processing routine, of all sounding channels that are currently sounding, those that are not pressed are dumped according to the key release speed of the pedal 5. First, the CPU 2 proceeds to the process of step Sf1, sets the value of the register CH to "0" in order to search the state of all channels, and then proceeds to step Sf2.

In step Sf2, it is determined whether or not the value of the register ST [CH] indicating the state of the corresponding channel is "2", that is, whether the pedal 5 is in the sounding continuation state. If the result of this determination is "YES", then the operation proceeds to step Sf3. In step Sf3, the value of the register ST [CH] representing the state of the channel is set to "3" to set the release waveform sounding state, and then the process proceeds to step Sf4.

In step Sf4, the pedal key release speed information RP and the key-off information KOFFP are output to the channel of the tone synthesis circuit 6 corresponding to the channel number set in the register CH, and then the process proceeds to step Sf5. In step Sf5, the value of the register CH is incremented by 1 in order to search for the next channel, and then the process proceeds to step Sf6.

In step Sf6, it is determined whether or not the value of the incremented register CH is the total number of channels CHMAX. If the result of this determination is "NO", the flow returns to step Sf2 and the above-mentioned processing is repeated for all channels. On the other hand, if the result of the determination in step Sf6 is "YES", the process returns to the main routine of FIG.
It proceeds to step Sa14.

Next, the end detecting process of the CPU 2 will be described with reference to the flowchart of FIG. When the processing of the CPU 2 proceeds to step Sa14 of FIG. 5, the end detection processing routine shown in FIG. 13 is started. In this end detection processing routine, processing is performed to regard the channel as an empty channel when the envelope waveform of the corresponding channel is attenuated based on the value of the envelope signal ENV during key depression. First, the CPU 2 proceeds to the process of step Sg1, sets the value of the register CH to "0" in order to search all channel states, and then proceeds to step Sg2.

In step Sg2, it is determined whether or not the register ST [CH] indicating the state of each channel is "0", that is, whether or not it is an empty channel. If the determination result is “NO”, the process proceeds to step Sg3. On the other hand, if the determination result in step Sg2 is “YES”, that is, if the channel is an empty channel, the channel is in the sound generation standby state. , Step Sg7 described later
Go to.

In step Sg3, the envelope value of the channel of the tone synthesis circuit 6 corresponding to the channel number set in the register CH is set in the register ENV. This envelope value is a numerical value that takes a continuous value from 0 to 511, for example, and 0 corresponds to the amplitude level “0”. Then, the CPU 2 proceeds to step Sg4. At step Sg4, the value of the register ENV is "0".
Or not. If the result of this determination is "YES", then the operation proceeds to step Sg5.

In step Sg5, the register ST [C
After the value of [H] is set to "0" to indicate that the tone generation is on standby, the process proceeds to step Sg6. At step Sg6, "0" is set in the register AKC which stores the key code KC.
To set. As a result, no key code is assigned to the channel. And
The CPU 2 proceeds to step Sg7.

On the other hand, if the result of the determination in step Sg4 is "NO", that is, if the value of the register ENV is not "0", the process proceeds to step Sg7. In step Sg7, the value of the register CH is incremented by 1 to search for the next channel, and then step Sg is performed.
Go to 8. In step Sg8, it is determined whether or not the value of the incremented register CH is the total channel number CHMAX. If the result of this determination is "NO", the flow returns to step Sf2 and the above-mentioned processing is repeated for all channels. On the other hand, if the determination result in step Sg8 is "YES", the process returns to the main routine of FIG.
Return to step Sa2.

Next, a second embodiment of the present invention will be described. The present applicant has previously not only controlled the amplitude of the release tone waveform when the generated tone is attenuated by EG, but also clipped it by using the clip circuit having the input / output characteristics shown in FIGS. 14 to 16. , Proposed an electronic musical instrument that can bring the released sound closer to the natural musical instrument sound.

FIG. 17 shows an example of the musical tone waveform clipped by the clipping circuit having the input / output characteristic shown in FIG. 14, and FIG. 18 shows an example of the musical tone waveform clipped by the clipping circuit having the input / output characteristic shown in FIG. .. In these figures, a curve a shows a musical tone waveform whose amplitude is controlled only by the EG, and a curve b shows a musical tone waveform whose amplitude is controlled by the EG and the clipping circuit.

Then, in the second embodiment, the concept of the divided vibration explained in the first embodiment is adopted in the control of the envelope of the release waveform by the above-mentioned clip circuit. That is, the energy (maximum amplitude amount) of the two types of divided vibrations generated when the damper is pressed against the string in the vibrating state is attributed to the power of the musical tone waveform portion cut off by the clip circuit described above. Think It is also considered that if the amount of musical sound waveform clipping (see FIG. 19) is increased with time, the divided vibration also increases with time, but is also attenuated by EG.
Specifically, three tone generation channels are used and a musical tone waveform controlled only by the EG and two musical tone waveforms controlled by variables generated from the musical tone waveform portion cut by the EG and the clip circuit. Is accumulated in time division and output.

The second embodiment of the present invention which realizes the above concept will be described below. First, the overall configuration of the electronic musical instrument is similar to that shown in FIG. FIG. 20 is a block diagram showing the configuration of the tone synthesis circuit 6 of the electronic musical instrument according to the second embodiment of the present invention. In this figure, parts corresponding to the parts in FIG. 2 are assigned the same reference numerals and explanations thereof are omitted. Figure 2
0, the envelope generator circuit 16 differs from the envelope generator circuit 13 of FIG. 2 in that the envelope signal E
In addition to generating and outputting NV, in addition to the key-on signal KONP, the key-off signal KOFFP, the key code KC, and the key pressing speed information IT supplied from an interface not shown, The point is that the state signal ST (see FIG. 7) indicating the state is generated and is output to the release waveform modulation circuit 18 described later.

Reference numeral 17 denotes a multiplication circuit, which is a waveform signal W2 output from the interpolation circuit 12 and an envelope generation circuit 13
It is multiplied by the envelope signal ENV output from the output terminal, and the multiplication result is output as the waveform signal W3. Reference numeral 18 denotes a release waveform modulating circuit, which refers to the state signal ST and only when the current envelope state is the release waveform sounding state, that is, only when the state signal ST is "3", the tone waveform envelope signal ENV. The waveform signal W3 is modulated based on the above, and is output as the waveform signal W4. Reference numeral 19 denotes an accumulator circuit which accumulates the waveform signal W4 and outputs it as a musical tone signal W.

FIG. 21 is a block diagram showing an example of the structure of the multiplication circuit 17. In this figure, 20 is a multiplier, which multiplies the waveform signal W2 input from the A input terminal by the signal input from the B input terminal. Reference numeral 21 denotes a selector, which receives an envelope signal ENV from an A input terminal, a variable K described later from a B input terminal, and outputs a first timing signal TIM (1/3) output from a timing generation circuit (not shown). Thus, the envelope signal ENV input from the A input terminal is selected and output.

Next, FIG. 22 shows the release waveform modulation circuit 18
The block diagram of an example of the structure of is shown. In this figure, 2
Reference numeral 2 denotes a clipping circuit having any of the input / output characteristics shown in FIGS. 14 to 16, which clips a waveform according to a value obtained by multiplying the envelope signal ENV by a predetermined constant CL (clip level). 23 is a subtracter for subtracting the output signal of the clipping circuit 22 from the waveform signal W3, 24 is a conversion circuit for taking the absolute value of the output signal of the subtractor 23 and multiplying the absolute value by a coefficient, and 25 is a latch, First timing signal TIM output from a timing generation circuit (not shown)
The output signal of the conversion circuit 24 is held at the timing obtained by delaying (1/3) by the high-speed delay 26. The output signal of the latch 25 is used as the variable K in FIG.
Is input to the B input terminal of the selector 21.

Reference numeral 27 denotes a selector, which receives the waveform signal W3 from the A input terminal, the output signal of the clip circuit 22 from the B input terminal, and the first timing signal TIM (1 / 3) is output and the output signal of the determination circuit 28 that outputs “1” when the state signal ST is “3” selects the output signal of the clip circuit 22 input from the B input terminal. Output.

In such a configuration, the operation is the first
The operation of the multiplying circuit 17, the release waveform modulating circuit 18, and the accumulating circuit 19, which are the features of this embodiment, will be described. First timing signal T
In the case of IM (1/3), the selector 21 of the multiplication circuit 17
Selects and outputs the envelope signal ENV,
The multiplier 20 receives the waveform signal W2 and the envelope signal EN.
It is multiplied by V and output as a waveform signal W3.

Next, in the release waveform modulation circuit 18, the waveform signal W3 is input to the + input end of the subtractor 23 and the A input end of the selector 27, and the clip circuit 22 outputs a predetermined constant to the envelope signal ENV. The waveform is clipped and output according to a value obtained by multiplying CL (clip level), and input to the-input end of the subtractor 23 and the B input end of the selector 27.

And now, the first timing signal TIM
Since it is (1/3), when the state signal ST is “3”, the determination circuit 28 outputs “1”, so the selector 27 selects the output signal of the clip circuit 22 and selects the waveform signal. Output as W4. This waveform signal W4 is input to the accumulation circuit 19. On the other hand, after the output signal of the clipping circuit 22 is subtracted from the waveform signal W3 in the subtractor 23, the output signal of the subtractor 23 is output in the conversion circuit 24 after being multiplied by a coefficient having its absolute value. Then, the output signal of the conversion circuit 24 is held in the latch 25 by the output signal of the delay 26, and then input to the B input terminal of the selector 21 of the multiplication circuit 17 as the variable K.

Next, the second timing signal TIM (2 /
In the case of 3), the selector 21 of the multiplication circuit 17 selects and outputs the variable K, so that the multiplier 20 outputs the waveform signal W2.
And a variable K are multiplied and output as a waveform signal W3.
Next, in the release waveform modulation circuit 18, the waveform signal W
3 is input to the + input terminal of the subtractor 23 and the A input terminal of the selector 27, and its waveform is changed according to the value obtained by multiplying the envelope signal ENV by a predetermined constant CL (clip level) in the clip circuit 22. Clipped and output, the minus input terminal of the subtractor 23 and the selector 2
7 is input to the B input terminal.

Now, the second timing signal TIM (2 /
Since it is the time of 3), since the determination circuit 28 does not output "1", the selector 27 selects the waveform signal W3 and outputs it as the waveform signal W4. This waveform signal W4 is input to the accumulation circuit 19. On the other hand, after the output signal of the clipping circuit 22 is subtracted from the waveform signal W3 in the subtractor 23, the output signal of the subtractor 23 is output in the conversion circuit 24 after being multiplied by a coefficient having its absolute value. Then, the output signal of the conversion circuit 24 is held in the latch 25 by the output signal of the delay 26, and then input to the B input terminal of the selector 21 of the multiplication circuit 17 as the variable K.

Next, the third timing signal TIM (3 /
3) is similar to the case of the second timing signal TIM (2/3), and the output signal of the selector 27 is the waveform signal W.
4 is input to the accumulator circuit 19. First explained above
To third timing signals TIM (1/3) to TIM
By (3/3), the three waveform signals W4 are added to the accumulation circuit 19
Are accumulated and output as one tone signal W.

[0074]

As described above, according to the present invention,
There is an effect that the release tone waveform when the generated tone is attenuated can be controlled like an actual natural musical instrument.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an electronic musical instrument according to first and second embodiments of the present invention.

FIG. 2 is a block diagram showing the configuration of a musical sound synthesis circuit 6 in the first embodiment of the present invention.

FIG. 3 is a diagram for explaining a storage mode of a waveform memory according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a memory map of the waveform memory according to the first embodiment of the present invention.

FIG. 5 is a flow chart showing an operation of a main routine of the CPU 2 in the first embodiment of the present invention.

FIG. 6 is a flowchart showing an operation of a key-on processing routine of the CPU 2 in the first embodiment of the present invention.

FIG. 7 is a register ST in the first embodiment of the present invention.
It is a figure for demonstrating correspondence with a channel state.

FIG. 8 is a flowchart showing an operation of a key-off processing routine of the CPU 2 in the first embodiment of the present invention.

FIG. 9 is a diagram showing an example of a key code table according to the first embodiment of the present invention.

FIG. 10 is a flowchart showing an operation of a damper sound generation processing routine of the CPU 2 in the first embodiment of the present invention.

FIG. 11 is a flowchart showing an operation of a pedal-on processing routine of the CPU 2 in the first embodiment of the present invention.

FIG. 12 is a flow chart showing an operation of a pedal-off processing routine of the CPU 2 in the first embodiment of the present invention.

FIG. 13 is a flowchart showing an operation of an end detection processing routine of the CPU 2 according to the first embodiment of the present invention.

FIG. 14 is a diagram showing an example of input / output characteristics of a conventional clip circuit for clipping a musical tone waveform.

FIG. 15 is a diagram showing an example of input / output characteristics of a conventional clipping circuit for clipping a musical tone waveform.

FIG. 16 is a diagram showing an example of input / output characteristics of a conventional clipping circuit for clipping a musical tone waveform.

FIG. 17 is a diagram showing an example of a musical tone waveform clipped by a clipping circuit having the input / output characteristic shown in FIG.

18 is a diagram showing an example of a musical tone waveform clipped by the clipping circuit having the input / output characteristic shown in FIG.

FIG. 19 is a diagram for explaining a clip amount of a musical tone waveform.

FIG. 20 is a block diagram showing the configuration of a musical tone synthesis circuit 6 in the second embodiment of the present invention.

FIG. 21 is a multiplication circuit 1 according to the second embodiment of the present invention.
7 is a block diagram showing the configuration of No. 7.

FIG. 22 is a block diagram showing a configuration of a release waveform modulation circuit 18 according to a second embodiment of the present invention.

[Explanation of symbols]

1 ... keyboard, 1a ... keyboard interface, 2 ... C
PU, 3 ... ROM, 4 ... RAM, 5 ... pedal, 5
a ... Pedal interface, 6 ... Music synthesis circuit,
7 ... Sound system, 8 ... Address setting circuit, 9
... Address generation circuit, 10 ... Waveform storage circuit, 11 ...
... Phase generation circuit, 12 ... Interpolation circuit, 13, 16 ... Envelope generation circuit, 14, 17 ... Multiplication circuit, 15 ...
... Envelope detection circuit, 18 ... Release waveform modulation circuit, 19 ... Accumulation circuit, 20 ... Multiplier, 21,27 ...
… Selector, 22 …… Clip circuit, 23 …… Subtractor,
24 ... conversion circuit, 25 ... latch, 26 ... delay, 28 ... decision circuit.

Claims (2)

[Claims] 1. Key operation information generating means for generating key operation information, first storage means in which waveform data corresponding to the key operation information is previously stored, and the waveform data from the first storage means. Musical tone generating means for reading out and outputting a musical tone signal according to pitch information corresponding to the key operation information, and envelope signal generating means for generating an envelope signal for controlling the envelope shape of the generated musical tone according to the key operation information. In an electronic musical instrument having: a second storage means in which first and second divided pitch information corresponding to the key operation information is stored in advance; and the first and second division means from the second storage means. Control means for reading pitch information according to the key operation information and supplying it to the musical tone generating means, wherein the musical tone generating means stores the waveform data from the first storing means. Is read out according to the first and second divided pitch information to output a musical tone signal. 2. Key operation information generating means for generating key operation information, storage means in which waveform data corresponding to the key operation information is stored in advance, and the waveform data is stored in the storage means in accordance with the key operation information. In the electronic musical instrument, the electronic musical instrument has a musical tone generating means for reading out and outputting a musical tone signal, and an envelope signal generating means for generating an envelope signal for controlling the envelope shape of the generated musical tone according to the key operation information. Modulating means for limiting the amplitude of the waveform of the input musical tone signal and further limiting the amplitude of the waveform of the input musical tone signal according to the difference between the musical tone signal and the signal whose amplitude is limited. An electronic musical instrument characterized by being provided.