JPH05134272A - Semiconductor device for driving of active matrix type liquid crystal display element and production therefor - Google Patents

Abstract

PURPOSE:To enable high-speed driving by simultaneously and monolithically forming the switching TFTs of picture element parts of polycrystalline silicon TFTs and forming peripheral driving circuits of single crystal silicon TFTs. CONSTITUTION:Recessed parts 202, 202' are provided on an insulating substrate 101. After a silicon nitride film is deposited over the entire surface, the silicon nitride film is etched away in such a manner that the film remains over the entire part of the bases 203 of the recessed parts 202 and leaves dots 203' at nearly the center of the bases thereof of the recessed parts 202'. The polycrystalline silicon 204 is grown in the recessed parts 202 and the single crystal silicon 204' in the recessed parts 202' by using a vacuum epitaxial growth device. The picture element switches 103 are formed of the polycrystalline silicon TFTs on the polycrystalline silicon 204. The peripheral driving circuits (horizontal shift registers 104, buffers 105, vertical shift registers 106) are formed of the single crystal silicon TFTs on the single crystal silicon 204'.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which constitutes a drive circuit of an active matrix type liquid crystal display device, which is used in a high quality television and the like, and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, a liquid crystal display device provided with an active matrix device has been commercialized as a flat panel display or a projection television.

FIG. 4 is a schematic perspective view of a conventional active matrix type liquid crystal panel. In the figure, 401 is a pixel switch, 402 is a buffer section, 403 is a horizontal shift register section, and 404 is a vertical shift register section. The brightness signal and the audio signal of the television are compressed into a certain band and have a driving capability capable of following the frequency.
3 is sent to the buffer unit 402 which is driven. Next, the vertical shift register 404 causes the pixel switch 4
A signal is transferred to the liquid crystal while 01 is on.

The performance required for each circuit is such that the HDTV (high-definition television) is taken into consideration and the frame frequency is 60H.
z, the number of scanning lines is about 1000, and the horizontal scanning period is about 30.
Assuming that μsec (effective scanning period is 27 μsec) and the number of horizontal pixels are about 1500, the television signal is transferred to the buffer unit at a frequency of about 45 MHz. Also, scan line 1
The period allowed for signal transfer per book is 1 to 2 μsec.
Becomes Therefore, as the performance required for each element circuit, a transfer switch for driving a horizontal shift register with a driving capacity of 45 MHz or more and a vertical shift register with a driving capacity of 500 kHz or more for driving a horizontal shift register to transfer a television signal to a buffer unit. Drive capability of 45 MHz or more, and the drive capability of the pixel switch is 500 kHz or more.

The driving capability here means the voltage that gives the maximum or minimum transmittance of the liquid crystal when the number of gradations N in the liquid crystal pixel is to be output, Vm, VT (voltage-transmittance) curve. If the threshold voltage of the liquid crystal obtained from the above is set to Vt, the signal should be transmitted to all the pixels driven by the scanning line within the period per scanning line, and the signal of the same level should be transmitted. The signal voltage difference between pixels is (Vm-Vt)
/ N [V] or less means a signal transfer capability.

As is apparent from this, the pixel switch,
Also, the vertical shift register may have a relatively small driving capability, but the horizontal shift register and the buffer section are required to drive at high speed. Therefore, in the current liquid crystal display element, the pixel switch and the vertical shift register are
It is formed monolithically with the liquid crystal by polycrystalline silicon or amorphous silicon TFT, and other peripheral circuits are supported by mounting the IC chip from the outside.

[0007]

Problem to be Solved by the Invention Polycrystalline silicon TFT
Although an attempt has been made to monolithically form the peripheral circuit, the driving capacity of each TFT is small, so that it is necessary to increase the transistor size or to make a complicated device in the circuit. Attempts have also been made to form peripheral drive circuits, including pixel switches, on the wafer.
This method cannot be used for a large-screen display because the area and shape of the display element are limited by the wafer size.

In recent years, the SOI type single crystal thin film transistor has attracted attention as a constituent element of a three-dimensional integrated circuit, a contact sensor and a flat display device. In particular, silicon thin film transistors have characteristics such as smaller parasitic capacitance, latch-up-free dielectric isolation, and excellent radiation resistance, compared with conventional transistors formed on a wafer, and have undergone numerous research and development. Has been done. In recent years, the SOI layer has been made sufficiently thin (ultra thin film).
The formation of a transistor therein has been actively researched because it has an inherent mechanism to obtain high carrier mobility and improve subthreshold characteristics, which leads to improvement in transistor characteristics.

However, these super thin film transistors also have a problem. That is, the gate voltage Vg = 0
The drain breakdown voltage of [V] (when off) rapidly deteriorates as the film thickness decreases. It is obvious that this problem will be a major obstacle in the application and development of the transistor, especially in the field where a high breakdown voltage is required in the design such as a contact sensor and a flat panel display.

The cause of the above-mentioned problems is basically due to the floating structure which is a structure peculiar to SOI. This will be described for the N-ch MOSFET.

When a bias is applied between the gate and drain of the transistor, the lines of electric force extend from the end of the gate electrode to the end of the drain electrode, and at this time, a region where the electric field is very dense at the drain-channel junction. Will be formed. This electric field particularly concentrates on the interface between the junction and the gate insulating film. When the electrons supplied from the source reach the end of the drain, they are further accelerated by this electric field, and IMPACT occurs in the depletion layer of the drain-channel junction.
IONIZATION is caused to generate holes. The generated holes move to the source end and are extracted from the source electrode, but when the degree increases, the holes are not extracted from the source portion and accumulate in the channel region. The holes accumulated in the channel region lower the potential of the channel, and more electrons are supplied to the drain end. The supplied electrons are further IMPACT
IONIZATION is caused to accumulate holes in the channel portion. In this way, electric field concentration → IMPACT
Positive feedback is applied to a series of operations of IONIZATION → hole accumulation, and in that process, the breakdown voltage of the transistor deteriorates. When the transistor is off, in the above process, the supply of electrons which causes IMPACT IONIZATION is supplied by the generation of the reverse current of the drain junction.

The P-ch MOSFET is different only in that the majority carrier is a hole. In this case, the IMPACT IONZATION ratio of the hole is smaller than that of the electron, and the influence thereof is eased to some extent. , Basically, it seems that there are similar problems.

As one way of thinking for solving the problems that occur in the above process, carriers to be accumulated in the channel (holes in the case of N-CH MOSFET, electrons in the case of P-CH MOSFET). Can be considered from the viewpoint of how quickly it is extracted from the channel region. As a means for this, it can be considered to fix the potential of the channel (hereinafter referred to as SUB potential) to a certain potential as seen in a normal IC structure.

However, according to the conventional method, the SU
A region for extracting the B potential is necessary, and therefore,
The element area increases. This not only hinders the integration of the device, but also reduces the aperture ratio of the pixel when it is applied as a switching transistor of a liquid crystal device, for example.

In view of the above problems of the prior art, it is an object of the present invention to provide, by an easy method, a semiconductor device for driving an active matrix element which can be driven at high speed so as to be compatible with high definition televisions and the like. It is in.

[0016]

In order to achieve the above object, according to the present invention, a switching TFT of a pixel portion and a peripheral driving circuit are monolithically formed on the same substrate at the same time.
The switching TFT in the pixel portion is formed on polycrystalline silicon, and the peripheral drive circuit is formed on single crystal silicon.

The polycrystalline and single crystal silicon layers are formed on the deposited film having a higher nucleation density than the substrate surface, for example, by a thermal CVD method or by solid phase growth from an amorphous silicon layer, or amorphous. It is formed by controlling the frequency of nucleation in the silicon layer.

[0018]

The problem with the above-mentioned single crystal thin film transistor is that
It is considered that this occurs because the crystallinity of the active layer forming the transistor is good and the lifetime of the minority carriers to be accumulated is long. For example, polycrystalline silicon TFT
Then, the above-mentioned problems occur when driven at a sufficiently high voltage, but a voltage of a level normally used (eg ± 10
At about [V], it hardly occurs.

Furthermore, the driving speed of the liquid crystal pixel switch may be relatively slow, and high speed driving is required for the peripheral driving circuits.

From such a point of view, in the pixel switch, we have proposed a polycrystalline TFT in which the driving speed is relatively slow in order to increase the aperture ratio, but the lifetime of minority carriers is short.
The peripheral drive circuit uses a single crystal TF with high drive capability.
We came to the conclusion that we should use T.

However, in the conventional technique, the process for producing both crystals is at least the mask 2.
2 sheets, two deposition steps are required, and on the insulating substrate,
It is clear that irradiation with an energy beam such as an electron beam is necessary to form the single crystal silicon layer, and it is not possible to make a compromise in terms of cost.

Therefore, we have further realized to form polycrystalline silicon and single crystal silicon on an insulating substrate by a simple process, and to manufacture an active matrix substrate using it is industrially applicable. The present invention has been completed from the viewpoint of being very meaningful.

In the present invention, since the switching TFT of the pixel portion and the peripheral drive circuit are formed monolithically on the same substrate at the same time, the device can be easily formed. Further, since the switching TFT of the pixel portion is manufactured on the polycrystalline silicon and the peripheral driving circuit is manufactured on the single crystalline silicon, for the above reason, the driving capability is kept high and the problem in the single crystal thin film transistor is avoided. To be done.

[0024]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a schematic view of an active matrix type liquid crystal panel according to an embodiment of the present invention. 10 in the figure
1 is an insulating substrate such as quartz, 102 is a liquid crystal cell, 103 is a pixel switch, 104 is a horizontal shift register, 105 is a buffer, 106 is a vertical shift register, 107 is a scanning line, and 108 is a signal line.

In this embodiment, the pixel switch 103 is composed of a polycrystalline silicon TFT, and the other peripheral drive circuits (horizontal shift register 104, buffer 105, vertical shift register 106) are composed of a single crystal silicon TFT. ..

In the active matrix type liquid crystal panel having the structure according to the present embodiment, the problem of withstand voltage of the TFT can be avoided by forming the pixel switch having the largest voltage difference between the TFTs by the polycrystalline silicon TFT. is there. In addition, peripheral circuits that require drive speed,
In particular, when the shift register is composed of a single crystal silicon TFT, it can handle a signal with a very high frequency, for example, a signal compatible with a high-definition television.

Further, in this embodiment, the polycrystalline silicon layer forming the pixel switch 103 and the single crystal silicon layer forming the peripheral drive circuit are formed at the same time. As a result, it becomes possible to form an element by a process exactly the same as the manufacturing process of an active matrix device with a conventional structure of only polycrystalline silicon (only the pixel switch is monolithically configured). It is possible to form things that are comparable to things.

Next, this manufacturing process will be described. As described above, the polycrystalline silicon layer and the single crystal silicon layer are simultaneously formed on the insulating substrate 101, and a transistor according to the application is formed in each of them.

Therefore, first, a method for simultaneously forming a polycrystalline silicon layer and a single crystal silicon layer at desired locations on the insulating substrate 101 will be described.

2A to 2D show the TF according to this embodiment.
The manufacturing process of T is shown. As shown in FIG. 3A, first, in the main surface of the quartz substrate 101, the concave portion 2 is formed only in a region where a transistor will be formed later by a normal photolithography process.
02, 202 'are provided. The size of these recesses is determined by the shape of the transistor to be formed later. For example, the recess 202 in which the pixel switch is formed has a size of 3 μm.
× 15 μm depth 0.5 μm. In addition, the recess 202 ′ in which the transistor forming the peripheral drive circuit is formed is
The size is determined so that each transistor forming the circuit is formed in one recess.

Next, as shown in FIG. 2B, after a silicon nitride film is deposited on the entire surface by a normal low pressure CVD method, the concave portion 202 for forming a pixel switch remains on the entire bottom surface 203 thereof. As for the concave portion 202 'forming the peripheral circuit, the central portion of the concave portion is about 1
The silicon nitride film in the other portion is removed by etching while leaving the dot 203 ′ of μm × 1 μm.

Next, as shown in FIG. 2C, silicon is grown in a SiH ₂ Cl ₂ / HCl / H ₂ gas at a pressure of 150 Torr and a temperature of 960 ° C. using a low pressure epitaxial growth apparatus. When the growth is performed under this condition, polycrystalline silicon 204 is formed in the recess 202 forming the pixel switch in which the silicon nitride film remains on the entire bottom surface of the recess, and a silicon nitride film dot is formed substantially in the center of the bottom surface of the recess. Single crystal silicon 204 'grows in the remaining recesses 202' of the peripheral drive circuit. Regarding the occurrence of such selective growth, Japanese Patent Application Laid-Open No. 62-8171
No. 1 and Japanese Patent Laid-Open No. 63-107016 and “Solid Material Device Conference (SSDM) Extended Abstr”
cts of the 19th SSDM, 191 ”. The grain size of the grown polycrystalline silicon is about 1 μm, and the film thickness of the polycrystalline silicon and the single crystal silicon is grown to about 10 μm. Then, the silicon layer protruding from the surface of the quartz substrate 101 is polished by ordinary mechanochemical polishing until it becomes the same plane as the surface of the quartz substrate 101 to flatten the substrate surface.

Then, as shown in FIG. 2D, a circuit is formed on the substrate thus formed by using an ordinary MOSFET manufacturing process.

In this way, polycrystalline silicon and single crystal silicon can be simultaneously formed in a desired region on the quartz substrate 101.

According to this, for example, the step formed by the transistor in the pixel portion can be made extremely small, so that the imbalance of the liquid crystal cell molecules can be prevented at the same time.

Further, in the present embodiment, the method of forming the concave portion in the quartz substrate and forming the silicon layer therein is described, but the concave portion on the substrate is not the essence of the present invention. In particular, there is no particular problem even if the recess is not provided and the process of FIG. In this case, since a step is formed on the entire substrate due to the formation of the transistor, the problem of irregularization of the liquid crystal cell molecules remains, but the step amount is about 1 micron at most, and there was no problem in practical use.

Further, since the influence of the step difference is remarkable especially in the pixel portion where the liquid crystal exists above it, it is sufficiently conceivable to provide the concave portion only in the region where the pixel switch is formed. In this case, only the recess 202 of FIG. 2 (A) is formed.

FIG. 3 shows a method according to another embodiment of the present invention, in which polycrystalline silicon and single crystal silicon are monolithically and simultaneously formed. In this method, first, as shown in FIG. 2A, a quartz substrate 101 is formed by a low pressure CVD method under a deposition temperature of 550 ° C.
An amorphous silicon film is deposited in a volume of 1000 Å, and after that, the other amorphous silicon films are removed by etching, leaving the regions 302 and 302 'for forming the transistors. Then, Si + ions 305 are applied to the regions 302 and 302 ′ by a normal ion implantation method at 70 keV and 4E14 cm−.
Inject under the condition of 2. Under this implantation condition, the implantation range peaks near the interface between the amorphous silicon film and the quartz substrate.

Next, as shown in FIG. 3B, the region 302 where the polycrystalline silicon film is formed is entirely covered with a resist, and the region 302 ′ where the single crystal silicon film is formed is almost in the center of the film. After forming a resist mask in a dot shape of about 1 μm × 1 μm, Si + ions 306 are 70 ke
Implant under the conditions of V, 2E15 cm-2.

Next, after removing the resist, 600 ° C.
Anneal for 50 hours in N ₂ atmosphere. As a result, in the region 302, a polycrystalline silicon film having a grain size of several thousand Å grows in the region 302 ′ near the resist mask left in the dot shape, and finally, the single crystal silicon film grows. To do.

[0041]

According to the present invention, in the active layer of the transistor of the active matrix type liquid crystal display element in which the peripheral driving circuit is formed monolithically, the driving speed is not required unlike the switching TFT of the pixel portion.
Use polycrystalline silicon for devices that require finer cell size and higher breakdown voltage, and use single crystal silicon for peripheral drive circuits that require high-speed driving such as shift registers. Therefore, it is possible to configure a driving semiconductor device of an active matrix type liquid crystal display device which can be driven at high speed and can be applied to a high definition television or the like.

Further, since the polycrystal silicon and the monocrystal silicon are formed at the same time, it is possible to easily and monolithically form the driving semiconductor device of the active matrix type liquid crystal display device compatible with the high quality television. it can.

[Brief description of drawings]

FIG. 1 is a schematic perspective view of an active matrix liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a sectional process flow for forming a drive circuit of an active matrix type liquid crystal display element according to an embodiment of the present invention.

FIG. 3 is a sectional process flow for forming a drive circuit of an active matrix type liquid crystal display device according to another embodiment of the present invention.

FIG. 4 is a schematic perspective view of an active matrix type liquid crystal panel according to a conventional example.

[Explanation of symbols]

101: insulating substrate such as quartz, 102: liquid crystal cell, 10
3: Pixel switch, 104: Horizontal shift register, 10
5: buffer, 106: vertical shift register, 107:
Scan lines, 108: signal lines, 204: polycrystalline silicon, 2
04 ': Single crystal silicon

Claims (6)

[Claims] 1. A switching TFT of a pixel portion and other peripheral drive circuits are provided, which are monolithically formed on the same substrate, and the switching TFT of the pixel portion is formed on polycrystalline silicon, and A semiconductor device for driving an active matrix liquid crystal display element, characterized in that the driving circuit is formed on single crystal silicon. 2. Polycrystalline silicon in which a switching TFT of a pixel portion is formed and monocrystalline silicon in which a peripheral driving circuit is formed are monolithically formed on the same substrate at the same time, and the pixel portion is formed on the polycrystalline silicon. Forming a switching TFT, and forming a peripheral drive circuit on single crystal silicon. A method of manufacturing a semiconductor device for driving an active matrix type liquid crystal display element. 3. The polycrystalline and single crystal silicon layers are
It forms by thermal CVD method, It is characterized by the above-mentioned.
A method for manufacturing a semiconductor device for driving an active matrix liquid crystal display element as described above. 4. The polycrystalline and single crystal silicon layers are
The method for manufacturing a semiconductor device for driving an active matrix type liquid crystal display element according to claim 2, wherein the method is formed by solid phase growth from an amorphous silicon layer. 5. The polycrystalline and single crystal silicon layers are
The method for manufacturing a semiconductor device for driving an active matrix type liquid crystal display element according to claim 2, wherein the method is formed on a deposited film having a higher nucleation density than the surface of the substrate. 6. The polycrystalline and single crystal silicon layers are
5. The method for manufacturing a semiconductor device for driving an active matrix liquid crystal display element according to claim 2, wherein the method is formed by controlling the frequency of nucleation in the amorphous silicon layer.