JPH05129864A - Limiter amplifier - Google Patents

Abstract

PURPOSE:To reduce the phase deviation at a high frequency by adopting the configuration such that a gain frequency band at which the amplification is implemented is limited and a harmonic component with respect to an input signal frequency is suppressed. CONSTITUTION:Two-stages of transistors(TRs) 11, 12 of common emitter form a direct coupling amplifier circuit. A collector output of the TR 12 of the 2nd- stage of the directly coupled amplifier circuit is fed back to a base of the 2nd stage TR 12 in an opposite phase via a feedback TR 13. A parallel resonance circuit comprising an inductor 14 and a capacitor 15 is placed at a location of a load resistor of the 1st stage TR 11 in place of the said load resistor to be used for a component of a tuning type limiter amplifier. The parallel resonance frequency depending on the inductor 14 and the capacitor 15 is adjusted to be equal to an input signal frequency, then the amplification operation of the ring amplifier is acted for a fundamental wave only thereby suppressing the harmonic component with respect to the input signal frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a limiter amplifier used in a timing recovery circuit for extracting a clock signal required for pulse identification recovery from a received signal in a regenerative repeater of a digital transmission system, for example.

A clock signal extracted by a timing reproduction circuit is necessary for pulse identification reproduction for identifying the presence or absence (level) of a pulse from the equalized waveform of a received signal and reproducing the correct pulse. In this timing recovery circuit,
The equalized waveform is rectified (clip) or differentiated to generate a clock frequency component, and the signal is passed through a narrow band filter (resonator, tank circuit) and a limiter amplifier that suppresses fluctuations in its output level. The configuration is such that a pulsed clock signal is generated by removing unnecessary noise components.

[0003]

2. Description of the Related Art FIG. 9 is a diagram showing a relationship between an output signal power and an output signal phase with respect to an input signal power of a conventional limiter amplifier. In the figure, the horizontal axis is the input signal power (dB
m) and the vertical axis is the output signal power (dBm) or the output signal phase (degrees). Shows the output signal power with respect to the input signal power, and shows the output signal phase with respect to the input signal power. Pi1 is the input signal power at which the output signal power is saturated, and Posat is the output signal saturation power.

In the limiter amplifier, when the input signal power becomes large, a signal with a large amplitude is applied to the transistor to saturate the collector current, thereby limiting the output signal power and suppressing its fluctuation.

On the other hand, as shown in FIG. 9, the phase of the output signal of the limiter amplifier with respect to the input signal takes a substantially constant value without depending on the input signal power when the input signal power is small. However, in the region where the input signal power is large and the output signal power is saturated, a signal with a large amplitude is applied to the transistor, so the effect of the nonlinearity of the transistor appears, and the phase of the output signal with respect to the input signal depends on the input signal power. And change. This change in phase is called a phase deviation. In the example shown in FIG. 8, the phase deviation between the input signal power Pi1 at which the output signal power is saturated and the input signal power Pi2 is θ.

Further, this phase deviation is affected by the bias dependence of the capacitance of the transistor in proportion to the input signal frequency. That is, the nonlinearity of the transistor causes harmonic distortion in the output signal, and the phase difference between the harmonic and the fundamental wave becomes the phase deviation. Therefore, the phase deviation also increases as the input signal frequency increases.

[0007]

As described above, the limiter amplifier has a problem that its phase characteristic deteriorates depending on the input signal power, particularly when a high frequency signal is handled. On the other hand, in the prior art, a configuration is adopted in which the amplification characteristic of a sufficiently wide band is provided for the input signal frequency so that the input capacitance of the transistor becomes equivalently small, and the influence of the capacitance of the transistor on the phase deviation is reduced. Used to be
The effect of reducing the phase deviation was insufficient.

An object of the present invention is to provide a limiter amplifier capable of reducing phase deviation at high frequencies.

[0009]

According to a first aspect of the present invention, in a limiter amplifier having a limiter characteristic, a gain frequency band in which an amplification operation is performed is limited and a harmonic component with respect to an input signal frequency is suppressed. It is characterized by being.

According to a second aspect of the present invention, the grounded-emitter amplifier circuit is directly connected in two stages, and the collector output of the transistor in the second stage is reverse-phased to the base of the transistor in the second stage via the third transistor. In the limiter amplifier that feeds back, the load resistance of the first stage of the grounded-emitter amplifier circuit is replaced with a resonance circuit whose resonance frequency is adjusted to the input signal frequency.

According to a third aspect of the present invention, in a limiter amplifier in which an impedance matching circuit having a band pass characteristic at a predetermined center frequency and a bandwidth is connected to an input / output stage, the gain matching frequency with respect to the impedance matching circuit. It is characterized by setting a center frequency and a bandwidth for limiting the upper limit of the band to the input signal frequency.

According to a fourth aspect of the present invention, in a limiter amplifier in which a series feedback resistor and a peaking capacitance are connected to an emitter terminal of a grounded-emitter amplifier circuit, an upper limit of a gain frequency band with respect to the series feedback resistor and the peaking capacitance is provided. Is set to a value that limits the input signal frequency.

According to a fifth aspect of the present invention, in a limiter amplifier having a limiter characteristic, a high frequency suppression filter for suppressing a harmonic component of an output signal with respect to an input signal frequency is provided.

[0014]

In the limiter amplifier, the harmonics generated in the output signal due to the non-linearity of the transistor cause a phase difference with the fundamental wave, which causes a phase deviation. FIG. 10 shows the result of an experiment conducted on the relationship between the second harmonic and the phase deviation when the dynamic range for calculating the phase deviation is set to 20 dB. The horizontal axis is the second harmonic power (dB) for the fundamental wave,
The vertical axis is the phase deviation (degree). However, conventionally, the gain frequency band has been widened with respect to the input signal frequency in an attempt to equivalently reduce the input capacitance of the transistor, but rather, it increases the harmonic power and increases the phase deviation. Was acting on.

Therefore, the limiter amplifier according to the first aspect of the present invention has a structure for limiting the gain frequency band in which the amplifying action is performed with respect to the input signal frequency. As a result, the harmonic component with respect to the input signal frequency can be suppressed, and the phase deviation can be reduced.

In the limiter amplifier according to the second aspect, the gain frequency band is limited by adjusting the resonance frequency of the resonance circuit replaced by the load resistance to the input signal frequency. In the limiter amplifier described in claim 3, the impedance matching circuit limits the gain frequency band by adjusting the center frequency and the bandwidth so that the upper limit of the gain frequency band becomes the input signal frequency. In the limiter amplifier according to the fourth aspect, the gain frequency band is limited by adjusting the peaking amount and the fundamental frequency to be amplified so that the upper limit of the gain frequency band becomes the input signal frequency. With such a configuration, the amplification action works only for the input signal frequency (fundamental wave), and the out-of-band harmonic components can be suppressed. Therefore,
Phase deviations caused by harmonics can be reduced.

Further, the limiter amplifier of the invention described in claim 5 has a structure in which a harmonic component with respect to an input signal frequency is suppressed from an output signal similar to the conventional one, and thereby a phase deviation included in the harmonic. The components can be reduced.

[0018]

1 is a circuit diagram showing the configuration of an embodiment of the invention described in claim 2. In FIG. The limiter amplifier in this embodiment is a tuning type limiter amplifier having a resonance circuit used for limiting the gain frequency band.

In the figure, the transistors 11 and 12 of the two-stage grounded emitter form a direct connection amplifier circuit. The collector output of the transistor 12 in the second stage of this direct connection amplifier circuit is fed through the feedback transistor 13 to the transistor 12 in the second stage.
Return to the base of the opposite phase. The parallel resonance circuit composed of the inductor 14 and the capacitor 15 is replaced with the load resistance of the transistor 11 in the first stage being connected to form a tuning type limiter amplifier. Here, a complementary structure is shown, and a transistor, a resistor, and a load resistor that form the current source circuit are shown.

Here, the inductor 14 and the capacitor 15
By adjusting the parallel resonance frequency determined by the input signal frequency to the input signal frequency, the limiter amplifier acts only on the fundamental wave to suppress the harmonic component with respect to the input signal frequency.

FIG. 2 is a diagram showing an example of frequency characteristics of gain of the tuning type limiter amplifier of this embodiment. In the figure, reference numeral 21 is the frequency characteristic of gain in the conventional limiter amplifier, and reference numeral 22 is the degree of suppression of the second harmonic. Reference numeral 23 is the frequency characteristic of gain in the present embodiment, and reference numeral 24 is the degree of suppression of the second harmonic. As shown in the figure, since the second harmonic component can be largely suppressed in the configuration of this embodiment, the phase deviation can be greatly reduced.

In order to suppress the spurious mode which is a problem in the tank circuit used for tuning the clock signal in the timing recovery circuit, a narrow band filter is inserted between the limiter amplifier and frequency components other than the clock are removed. However, since the limiter amplifier is of the tuning type according to the present embodiment, the narrow band filter can be omitted. That is, in the tuning type limiter amplifier of the present embodiment, the tuning function and the limiter function can be realized by a single circuit, so that downsizing and high reliability can be realized.

FIG. 3 is a circuit diagram showing a configuration of an embodiment of the invention described in claim 3. The limiter amplifier in this embodiment is an input / output matching type limiter amplifier that uses an impedance matching circuit for limiting the gain frequency band.

In the figure, an impedance matching circuit having a bandpass function, which is connected to the input terminal of the transistor 31, comprises a capacitor 32, inductors 33 and 34, and a resistor 35. The same applies to the impedance matching circuit connected to the output terminal of the transistor 31.

The center frequency and bandwidth of the pass band of the input / output matching type limiter amplifier are determined by the input / output equalization capacitance of each element of the impedance matching circuit and the transistor 31. Therefore, the capacitor 32 and the inductors 33 and 34 that form the impedance matching circuit.
The center frequency can be set by adjusting
The bandwidth can be set by adjusting. Here, by adjusting each element so that the upper limit of the gain frequency band becomes the input signal frequency, the limiter amplifier acts to amplify only the fundamental wave, and the harmonic component with respect to the input signal frequency can be suppressed.

FIG. 4 is a diagram showing an example of frequency characteristics of gain of the input / output matching type limiter amplifier of this embodiment. In the figure, reference numeral 41 is the frequency characteristic of gain in the conventional limiter amplifier, and reference numeral 42 is the degree of suppression of the second harmonic. Reference numeral 43 is the frequency characteristic of gain in this embodiment, and reference numeral 44 is the degree of suppression of the second harmonic. As shown in the figure, since the second harmonic component can be largely suppressed in the configuration of this embodiment, the phase deviation can be greatly reduced.

FIG. 5 is a circuit diagram showing a configuration of an embodiment of the invention described in claim 4. The limiter amplifier in this embodiment is a peaking type limiter amplifier that limits the gain frequency band by adjusting the amount of peaking.

In the figure, peaking capacitors 53 and 54 and series feedback resistors 55 and 56 are connected to the emitter terminals of transistors 51 and 52 that form a grounded-emitter amplifier circuit. Here, a complementary structure is shown, and in addition, a transistor and a resistor that configure a current source circuit, a load resistor, and a transistor and a resistor that configure an emitter follower in the output stage are shown.

By adjusting the peaking capacitances 53 and 54 and the series feedback resistors 55 and 56 to adjust the peaking amount and the fundamental wave frequency to be amplified to the input signal frequency, the limiter amplifier has an amplifying action only for the fundamental wave. It works and can suppress the harmonic component with respect to the input signal frequency.

By increasing the values of the peaking capacitors 53 and 54 and the series feedback resistors 55 and 56, the peaking amount can be increased, the upper limit of the gain frequency band can be increased, and the out-of-band harmonic component suppression degree can be increased. Can be increased, but if they are taken too large, excessive peaking will occur, so it is necessary to make appropriate adjustments within the range where stable operation of the circuit is not impaired.

FIG. 6 is a diagram showing an example of frequency characteristics of the gain of the peaking type limiter amplifier of this embodiment. In the figure, reference numeral 61 is the frequency characteristic of gain in the conventional limiter amplifier, and reference numeral 62 is the degree of suppression of the second harmonic. Reference numeral 63 is the frequency characteristic of gain in this embodiment, and reference numeral 64 is the degree of suppression of the second harmonic. As shown in the figure, since the second harmonic component can be largely suppressed in the configuration of this embodiment, the phase deviation can be greatly reduced.

FIG. 7 is a diagram showing the configuration of an embodiment of the invention described in claim 5. In FIG. In the figure, the limiter amplifier of the present embodiment has a configuration in which a high frequency suppression filter 72 for suppressing a harmonic component with respect to an input signal frequency is connected to the output stage of a conventional limiter amplifier 71. The output of the limiter amplifier 71 has a phase deviation as in the conventional case, which is due to the harmonic distortion as described above. Therefore, it is possible to reduce the phase deviation component together by suppressing the second or higher harmonic component from the output signal of the conventional limiter amplifier 71 via the high frequency suppression filter 72.

FIG. 8 is a diagram showing the relationship between the output signal power and the phase deviation with respect to the input signal power of the limiter amplifier with a filter of this embodiment. In the figure, reference numerals 81 and 8
Reference numeral 2 represents the output signal power and the phase deviation when the conventional limiter amplifier 71 is used alone. In the configuration of this embodiment,
Although the output signal power hardly changes, the phase deviation becomes almost constant with respect to the change of the input signal power as indicated by reference numeral 83, and it can be seen that the phase deviation is reduced.

[0034]

As described above, the limiter amplifier of the present invention limits the gain frequency band to suppress the harmonic component with respect to the input signal frequency, or suppresses the harmonic component from the output signal including the phase deviation. As a result, the phase deviation can be reduced. Therefore, in the timing recovery circuit using the limiter amplifier of the present invention,
It is possible to reproduce a high-speed clock signal with high accuracy, and it is possible to cope with an increase in the speed of a transmission signal.

Further, in the case where the tuning type limiter amplifier is constructed, the filter circuit which has been incorporated in the conventional timing reproduction circuit for reducing the noise can be integrated, so that the size and the reliability are improved. Is effective for.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of the invention described in claim 2.

FIG. 2 is a diagram showing an example of frequency characteristics of a gain of a tuning type limiter amplifier.

FIG. 3 is a circuit diagram showing a configuration of an embodiment of the invention described in claim 3.

FIG. 4 is a diagram showing an example of frequency characteristics of gain of an input / output matching type limiter amplifier.

FIG. 5 is a circuit diagram showing a configuration of an embodiment of the invention described in claim 4.

FIG. 6 is a diagram showing an example of frequency characteristics of a gain of a peaking type limiter amplifier.

FIG. 7 is a diagram showing a configuration of an embodiment of the invention described in claim 5;

FIG. 8 is a diagram showing a relationship between an output signal power and a phase deviation with respect to an input signal power of a limiter amplifier with a filter.

FIG. 9 is a diagram showing the relationship between the output signal power and the output signal phase with respect to the input signal power of the conventional limiter amplifier.

FIG. 10 is a diagram showing experimental results on the relationship between the second harmonic and the phase deviation.

[Explanation of symbols]

11, 12 Transistor 13 Feedback Transistor 14 Resistor 15 Capacitor 21, 41, 61 Frequency characteristics of gain in conventional limiter amplifier 22, 42, 62 Suppression degree of second harmonic in conventional limiter amplifier 23, 43, 63 Frequency characteristics of gain 24, 44, 64 Suppression degree of second harmonic in the embodiment 31 Transistor 32 Capacitor 33, 34 Inductor 35 Resistor 51, 52 Transistor 53, 54 Peaking capacitance 55, 56 Series feedback resistor 71 Conventional limiter amplifier 72 High frequency suppression filter 81 Output signal power when the conventional limiter amplifier 71 is used alone 82 Phase deviation when the conventional limiter amplifier 71 is used alone 83 Phase deviation in the embodiment

Claims (5)

[Claims] 1. A limiter amplifier having limiter characteristics, wherein the limiter amplifier is configured to limit a gain frequency band in which amplification is performed and suppress a harmonic component with respect to an input signal frequency. 2. A limiter amplifier in which a grounded-emitter amplifier circuit is directly connected in two stages and the collector output of the transistor in the second stage is fed back to the base of the transistor in the second stage in reverse phase via a third transistor. A limiter amplifier characterized in that the load resistance of the first stage of the grounded-emitter amplifier circuit is replaced with a resonance circuit whose resonance frequency is adjusted to the input signal frequency. 3. A limiter amplifier in which an impedance matching circuit having a bandpass characteristic at a predetermined center frequency and bandwidth is connected to an input / output stage, wherein an upper limit of a gain frequency band is set to an input signal frequency with respect to the impedance matching circuit. A limiter amplifier characterized by setting a center frequency and a bandwidth to be limited to. 4. A limiter amplifier in which a series feedback resistor and a peaking capacitor are connected to the emitter terminal of a grounded-emitter amplifier circuit, wherein the upper limit of the gain frequency band is limited to the input signal frequency with respect to the series feedback resistor and the peaking capacitor. A limiter amplifier characterized by setting a value. 5. A limiter amplifier having limiter characteristics, comprising a high frequency suppression filter for suppressing a harmonic component of an output signal with respect to an input signal frequency.