JPS6051804B2 - amplifier circuit - Google Patents

amplifier circuit

Info

Publication number
JPS6051804B2
JPS6051804B2 JP5070877A JP5070877A JPS6051804B2 JP S6051804 B2 JPS6051804 B2 JP S6051804B2 JP 5070877 A JP5070877 A JP 5070877A JP 5070877 A JP5070877 A JP 5070877A JP S6051804 B2 JPS6051804 B2 JP S6051804B2
Authority
JP
Japan
Prior art keywords
stage transistor
emitter
circuit
transistor
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5070877A
Other languages
Japanese (ja)
Other versions
JPS53136463A (en
Inventor
夫 秋武勇
茂樹 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5070877A priority Critical patent/JPS6051804B2/en
Priority to US05/900,592 priority patent/US4139825A/en
Priority to CA302,473A priority patent/CA1086385A/en
Priority to GB17286/78A priority patent/GB1603777A/en
Publication of JPS53136463A publication Critical patent/JPS53136463A/en
Publication of JPS6051804B2 publication Critical patent/JPS6051804B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26Modifications of amplifiers to reduce influence of noise generated by amplifying elements

Description

【発明の詳細な説明】 本発明はオーディオ用前置増幅器のイコライザ回路にお
ける、妨害信号の除去を改善した回路に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit that improves interference signal removal in an equalizer circuit for an audio preamplifier.

従来のイコライザ回路を第1図に示す。A conventional equalizer circuit is shown in FIG.

第1図において入力信号は入力端子1より容量A [3
・、・IJ−^ −、ι・ Λ を、・・、一・一率、
一『、に−n警 一 、ノ 、05・−;−れl−−ノ
′、゛、、−・、に印加される。
In Fig. 1, the input signal is transferred from input terminal 1 to capacitance A [3
・、・IJ−^ −、ι・Λ、・・・、1・1 rate、
It is applied to 1', ni-n 1, ノ, 05.-;-rel--ノ', ゛,,-.

ここでトランジスタ6のベースは容量4、抵抗5によつ
て接地され、エミッタは抵抗7を介して正の電源14に
接続され、またコレクタは負荷抵抗8を介して負の電源
15に接続され、第1の増幅回路を構成し、その出力は
トランジスタ10と負荷抵抗9で構成された第2の増幅
回路のベースに接続されている。第2の増幅回路の出力
はトランジスタ11、抵抗12で構成されたエミッタホ
ロワ回路に供給され、トランジスタ11のエミッタは容
量13を介して出力端子22に接続されている。
Here, the base of the transistor 6 is grounded through a capacitor 4 and a resistor 5, the emitter is connected to a positive power supply 14 through a resistor 7, and the collector is connected to a negative power supply 15 through a load resistor 8. A first amplifier circuit is constituted, and its output is connected to the base of a second amplifier circuit constituted by a transistor 10 and a load resistor 9. The output of the second amplifier circuit is supplied to an emitter follower circuit composed of a transistor 11 and a resistor 12, and the emitter of the transistor 11 is connected to an output terminal 22 via a capacitor 13.

トランジスタ11の出力は容量18、19、抵抗20、
21および抵抗16、容量17で構成されたRIAA特
性を決定する帰還回路によつてトランジスタ6のエミツ
タヘ帰還がかけられている。
The output of the transistor 11 is capacitance 18, 19, resistance 20,
21, a resistor 16, and a capacitor 17, a feedback circuit for determining the RIAA characteristics provides feedback to the emitter of the transistor 6.

このようなイコライザ回路で信号対雑音比(以後S/N
と呼ふ)を改善するためには初段トランジスタ6に低雑
音素子を用いるのは当然のことであるが発振防止等の目
的て挿入されているベースJ抵抗3の熱雑音を小さくす
る必要がある。しかし入力端子1にトランシーバ−、ア
マチュア無線、ポケットベル等の不要な高い周波数の妨
害信号が供給されると抵抗3の値が小さい場合ベース抵
抗3と容量4で構成される低域漏波器の力ワットオフ周
波数が高くなり不要信号は減衰されずに初段トランジス
タ6に供給されこの初段トランジスタのP−N接合でピ
ーク検波し、増幅されて出力端子22に出力されてしま
う。従来は抵抗3が大きいため並列容量4とで構成され
る低域漏波器のカットオフ周波数が低かつたため、この
種の妨害に対しては許容されるレベルであつた。
In such an equalizer circuit, the signal-to-noise ratio (hereinafter S/N
In order to improve this, it is natural to use a low-noise element for the first stage transistor 6, but it is also necessary to reduce the thermal noise of the base J resistor 3 inserted for the purpose of preventing oscillation. . However, if an unnecessary high-frequency interference signal from a transceiver, amateur radio, pager, etc. is supplied to input terminal 1, and the value of resistor 3 is small, the low-frequency leaker consisting of base resistor 3 and capacitor 4 will As the output power off frequency becomes higher, the unnecessary signal is supplied to the first stage transistor 6 without being attenuated, the peak is detected at the P-N junction of this first stage transistor, and the signal is amplified and outputted to the output terminal 22. Conventionally, since the resistor 3 was large and the cutoff frequency of the low frequency leaker constituted by the parallel capacitor 4 was low, it was at an acceptable level against this type of interference.

しかし従来回路からS/Nを改善しようとすると抵抗3
の値を小さくせねばならず不要信号除去率が悪くなる問
題を生ずる。
However, when trying to improve the S/N from the conventional circuit, the resistor 3
The value of must be made small, resulting in a problem of poor unnecessary signal removal rate.

本発明は初段トランジスタのエミッタとRIAA特性を
決定する帰還回路との間にインダクタンスを入れ、高周
波妨害信号に対しては高インピーダンスとし、初段トラ
ンジスタの増幅度を非常に小さくして不要信号を減衰さ
せ、また入力にインダクタンスを入れることにより、S
/Nを劣化させることなくインダクタンスと、入力の並
列容量とで低域漏波器を構成し、不要妨害信号を減衰さ
せる増幅回路を得るものである。
In the present invention, an inductance is inserted between the emitter of the first stage transistor and the feedback circuit that determines the RIAA characteristics, and the impedance is high against high frequency interference signals, and the amplification degree of the first stage transistor is extremely small to attenuate unnecessary signals. , and by adding an inductance to the input, S
The present invention provides an amplifier circuit that forms a low-frequency leaker with an inductance and an input parallel capacitance without degrading /N, and attenuates unnecessary interference signals.

以下本発明になる増幅回路を図に示す実施例によつて説
明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An amplifier circuit according to the present invention will be explained below with reference to embodiments shown in the drawings.

本発明の実施例を第2図、第3図、第4図、第5図に示
す。
Examples of the present invention are shown in FIGS. 2, 3, 4, and 5.

第2図において、入力信号は入力端子1より容量2、抵
抗3を介して初段トランジスタ6のベースへ印加される
。ここでトランジスタ6はそのベースが容量牡抵抗5に
よつて接地され、エミッタは抵抗7を介して正の電源1
4に接続され、コレクタは負荷抵抗8を介して負の電源
15に接続されて第1の増幅回路を構成し、その出力は
トランジスタ10と負荷抵抗9で構成され.た第2の増
幅回路のベースに供給されている。第2の増幅回路の出
力はトランジスタ11、抵抗12で構成されたエミッタ
ホロワ回路に供給され、トランジスタ11のエミッタは
容量13を介して出力端子22に接続されている。トラ
ンジスタ11の出力は容量18,19、抵抗20,21
および抵抗16、容量17で構成されたRIAA特性を
決定する帰還回路とこれに直列に接続されたインダクタ
ンス23を通してトランジスタ6のエミッタへ供給され
負帰還をかけている。第2図におい・ては入力端子1に
不要な高周波妨害信号が入力されると、従来回路で述べ
た様に高S/N化のためベース抵抗3の値は小さいため
ベース抵抗3、容量4で構成される低域漏波器では不要
信号は減衰されずに初段トランジスタ6に入力される。
しかし、初段トランジスタ6のエミッタにはインダクタ
ンス23が入つているためトランジスタ6の利得は高い
周波数に対しては、インダクタンス23のインピーダン
スが非常に大きくなり極端に減衰し、不要な高周波妨害
信号は増幅されず出力端子22に表われる不要出力は減
少する。第3図はトランジスタ6に入力される妨害信号
レベルを下げる目的で第2図の抵抗3の代りにイ)ンダ
クタンス25を入れたものである。この回路において入
力端子1に入つた不要な高周波妨害信号はインダクタン
ス25と容量4とで構成される低域漏波器で減衰されて
トランジスタ6に入力される。
In FIG. 2, an input signal is applied from an input terminal 1 to the base of a first stage transistor 6 via a capacitor 2 and a resistor 3. Here, the base of the transistor 6 is grounded through a capacitive male resistor 5, and the emitter is connected to the positive power supply 1 through a resistor 7.
4, and its collector is connected to a negative power supply 15 via a load resistor 8 to constitute a first amplifier circuit, the output of which is composed of a transistor 10 and a load resistor 9. is supplied to the base of the second amplifier circuit. The output of the second amplifier circuit is supplied to an emitter follower circuit composed of a transistor 11 and a resistor 12, and the emitter of the transistor 11 is connected to an output terminal 22 via a capacitor 13. The output of transistor 11 is capacitance 18, 19, resistance 20, 21
It is supplied to the emitter of the transistor 6 through a feedback circuit that determines the RIAA characteristics, which is composed of a resistor 16 and a capacitor 17, and an inductance 23 connected in series with the feedback circuit to provide negative feedback. In Fig. 2, when an unnecessary high-frequency interference signal is input to the input terminal 1, the base resistor 3 and the capacitor 4 are In the low-frequency leaker composed of the above, unnecessary signals are input to the first stage transistor 6 without being attenuated.
However, since the inductance 23 is included in the emitter of the first-stage transistor 6, the gain of the transistor 6 becomes extremely large for high frequencies, and the impedance of the inductance 23 becomes extremely large, resulting in extreme attenuation, and unnecessary high-frequency interference signals are not amplified. First, the unnecessary output appearing at the output terminal 22 is reduced. In FIG. 3, a) inductance 25 is inserted in place of the resistor 3 in FIG. 2 for the purpose of lowering the level of the interference signal input to the transistor 6. In this circuit, an unnecessary high-frequency interference signal that enters the input terminal 1 is attenuated by a low-frequency leaker composed of an inductance 25 and a capacitor 4, and is input to the transistor 6.

その上第2図の実施例で説明したようにトランジスタ6
のエミッタにはインダクタンス23が入つているため、
高い周波数の増幅度は極端に減少する。このように高い
周波数の妨害信号に対して2重の対策を施したものであ
る。しかし上述の第2図、第3図に示す実施例では、入
力端子1を短絡した場合、インダクタンスと入力容量で
共振回路を構成し、インダクタンスの性能指数Qが高い
場合には発振する問題が生じる。第4図、第5図の実施
例はかかる問題を解決したものである。第4図、第5図
はそれぞれ第2図、第3図の実施例と構成、動作および
効果は同一であるが異なる点はインダクタンス23,2
5に並列に当該妨害周波数帯においてインダクタンスの
効果を失なわない程度の値の抵抗24,26をそれぞれ
付加し、該インダクタンス23,25の性能指数Qをダ
ンプ化て安定度を増した回路である。本発明の説明に際
してはトランジスタを用いた3段構成の増幅器で行なつ
たがFET等でもよく、又増幅器の段数に制約されない
ことは言うまでもない。
Furthermore, as explained in the embodiment of FIG.
Since the emitter of has an inductance 23,
The amplification of high frequencies is extremely reduced. In this way, two-fold countermeasures are taken against interference signals of high frequencies. However, in the embodiments shown in Figures 2 and 3 above, if the input terminal 1 is short-circuited, the inductance and input capacitance form a resonant circuit, and if the figure of merit Q of the inductance is high, oscillation occurs. . The embodiments shown in FIGS. 4 and 5 solve this problem. 4 and 5 have the same structure, operation, and effect as the embodiments in FIGS. 2 and 3, respectively, but the difference is that the inductances 23 and 2 are the same.
In this circuit, resistances 24 and 26 are added in parallel to 5, each having a value that does not lose the effect of the inductance in the relevant interference frequency band, and the figure of merit Q of the inductances 23 and 25 is dumped to increase stability. . Although the present invention has been described using a three-stage amplifier using transistors, FETs or the like may also be used, and it goes without saying that the number of stages of the amplifier is not limited.

本発明の効果を第6図に示す。The effects of the present invention are shown in FIG.

第6図は周波数10MHz、変調度30%変調周波数1
KHz(7),AM信号を不要妨害信号として入力端子
1に入力した時の出力端子22に現われる検波出力レベ
ルを測定したもので曲線30は従来の増幅回路の特性、
曲線31は本発明になる増幅回路の特性である。測定結
果かられかる様に従来のものに比べて本発明による増幅
回路では約20c1B以上改善され非常に効果が大きい
ことがわかる。
Figure 6 shows a frequency of 10 MHz, a modulation depth of 30%, and a modulation frequency of 1.
KHz (7), the detection output level appearing at the output terminal 22 when an AM signal is input to the input terminal 1 as an unnecessary interference signal is measured, and the curve 30 shows the characteristics of the conventional amplifier circuit.
Curve 31 is the characteristic of the amplifier circuit according to the present invention. As can be seen from the measurement results, the amplifier circuit according to the present invention has an improvement of about 20 c1B or more compared to the conventional one, and is therefore very effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の増幅回路の回路図、第2図、第3図、第
4図、第5図は本発明の増幅回路の回路図、第6図は本
発明による増幅回路の入出力特性図である。 1・・・入力端子、6・・・初段トランジスタ、20,
21・・・帰還抵抗、19,18・・・帰還容量、23
・インダクタンス。
Figure 1 is a circuit diagram of a conventional amplifier circuit, Figures 2, 3, 4, and 5 are circuit diagrams of an amplifier circuit according to the present invention, and Figure 6 is an input/output characteristic of an amplifier circuit according to the present invention. It is a diagram. 1... Input terminal, 6... First stage transistor, 20,
21... Feedback resistance, 19, 18... Feedback capacitance, 23
・Inductance.

Claims (1)

【特許請求の範囲】[Claims] 1 ベースに入力信号が供給され、コレクタから出力信
号が取出されるエミッタ接地型の初段トランジスタと、
前記初段トランジスタに縦続接続されたエミツタホロア
型の終段トランジスタと、前記終段トランジスタのエミ
ッタから前記初段トランジスタのエミッタにRIAA特
性を呈する帰還回路を通して負帰還信号を供給する負帰
還回路とを備えた増幅回路において、前記初段トランジ
スタのベースと入力端子との間に直列に接続された抵抗
の値をその熱雑音が無視できる大きさとし、前記負帰還
回路と前記初段トランジスタのエミッタとの間に前記負
帰還回路の振幅周波数特性が及ほす周波数帯域の信号に
対しては無視できるインピーダンスを持ち前記周波数帯
域より高い周波数の信号に対しては大きなインピーダン
スを持つインダクタンスを接続することを特徴とするイ
コライザー増幅回路。
1. An emitter-grounded first-stage transistor to which an input signal is supplied to the base and an output signal is taken out from the collector;
An amplifier comprising: an emitter follower type final stage transistor connected in cascade to the first stage transistor; and a negative feedback circuit that supplies a negative feedback signal from the emitter of the final stage transistor to the emitter of the first stage transistor through a feedback circuit exhibiting RIAA characteristics. In the circuit, the value of the resistor connected in series between the base of the first stage transistor and the input terminal is set to such a value that its thermal noise can be ignored, and the negative feedback circuit is connected between the negative feedback circuit and the emitter of the first stage transistor. An equalizer amplifier circuit characterized in that an inductance is connected that has negligible impedance for signals in a frequency band affected by the amplitude frequency characteristics of the circuit and has a large impedance for signals of frequencies higher than the frequency band.
JP5070877A 1977-05-04 1977-05-04 amplifier circuit Expired JPS6051804B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP5070877A JPS6051804B2 (en) 1977-05-04 1977-05-04 amplifier circuit
US05/900,592 US4139825A (en) 1977-05-04 1978-04-27 Audio frequency amplifier
CA302,473A CA1086385A (en) 1977-05-04 1978-05-02 Audio frequency amplifiers
GB17286/78A GB1603777A (en) 1977-05-04 1978-05-02 Audio frequency amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5070877A JPS6051804B2 (en) 1977-05-04 1977-05-04 amplifier circuit

Publications (2)

Publication Number Publication Date
JPS53136463A JPS53136463A (en) 1978-11-29
JPS6051804B2 true JPS6051804B2 (en) 1985-11-15

Family

ID=12866390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5070877A Expired JPS6051804B2 (en) 1977-05-04 1977-05-04 amplifier circuit

Country Status (1)

Country Link
JP (1) JPS6051804B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0257503U (en) * 1988-10-19 1990-04-25

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2653495B2 (en) * 1988-10-03 1997-09-17 株式会社東芝 Feedback control amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0257503U (en) * 1988-10-19 1990-04-25

Also Published As

Publication number Publication date
JPS53136463A (en) 1978-11-29

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