JPH05128253A - Two-dimensional sequence filter circuit - Google Patents

Abstract

PURPOSE:To exactly extract desired picture data by a small scale circuit constitution by arranging the picture data in each partial area in the order of a picture value by a one-dimensional sorter circuit, and comparing the maximum values or the minimum values in the plural partial areas by a prescribed number of times. CONSTITUTION:The picture data having a central value are selected from an area 20 constituted of total 9 picture elements of three picture elements in the direction and three picture elements in the column direction. The three picture data are arranged in the order of the picture value by a one dimensional sorter circuit 11, and latched by a latch circuit. The maximum values of the picture data latched by the three latch circuits 12, 13, and 14 are detected by a maximum value detecting circuit 15. Then, while the maximum values are counted by a counter 16, they are pushed out only by the necessary number of times by a shift circuit. Therefore, for example, the desired data such as the some number-th data from the maximum value can be exactly detected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-dimensional image composed of a large number of pixels arranged in a row direction and a large number of pixels arranged in a column direction in an area composed of a plurality of pixels arranged in each of the row direction and the column direction. The operation of selecting the pixel data in a predetermined order from the maximum value side or the minimum value side when arranging each pixel data corresponding to each pixel in the order of pixel value The present invention relates to a two-dimensional order filter circuit that is performed over the entire area above.

[0002]

2. Description of the Related Art For example, a so-called median filter for picking up pixel data having a median value from a plurality of pixel data in a predetermined area on a two-dimensional image, pixel data in a predetermined area on a two-dimensional image, etc. A two-dimensional ordered filter that needs to be lined up is frequently used in the field of image processing, and various algorithms for realizing a two-dimensional ordered filter suitable for hardware have been proposed.

FIG. 3 is an example of an algorithm for realizing a two-dimensional ordered filter, so-called odd-even-type.
It is an explanatory view of sort (Odd-Even-Sort).
Implementation of a General-Purpose Median FilterU
nit in CMOS VLSI '' MUSTA FA KARAMAN, LEVENT ONURAL,
ABDULLAH ATALAR, GOURNAL OF SOLID-STATECIRCUITS,
VOL.25, NO.2. APRIL 1990, P505 to P513). Here, a case where 9 pieces of data are arranged in the order of their values will be described.

A large number of blocks 10 shown in the figure compare the values of two data respectively inputted, and output the data having a large value from the output terminal on the left side and the data having a small value from the output terminal on the right side. The circuit block is composed of, for example, a combination of a comparator and a multiplexer.
For example, if this algorithm is adopted and the fifth data from the maximum value side is selected, a medial filter is realized.

[0005]

However, if the two-dimensional order filter using the above algorithm is implemented in hardware, nine pieces of data are rearranged in the order of their values.
It is necessary to provide as many as 36 circuits corresponding to the respective blocks 10 shown in (1), which causes a problem that the circuit scale becomes large.

The following algorithms are known as algorithms for realizing a median filter having a small circuit scale (see Japanese Patent Laid-Open No. 1-116887). FIG. 4 is an explanatory diagram of an algorithm that realizes this median filter. In this figure, it is assumed that each square shown in the figure corresponds to each pixel, and the number written therein is the pixel value of the pixel data of that pixel.

A total of 9 pixels each including 3 pixels vertically and horizontally as shown in FIG.
The pixels are divided into columns as shown in FIG. 4B, and the median value (the number circled in FIG. 3B) of each of the three pixel data in each column is detected. Next, a median value is further detected from the three median values thus detected. In this case, two comparators are required to detect each median value of the three pixel data in each column, and two comparators are required to detect the median value from among the three median values. And therefore a total of 8
It is possible to detect the median value of the nine pixel data only by providing the number of comparators.

However, there are cases where the correct median value cannot be detected by this algorithm.
In the example shown in, the result is that although the true median value is "5", "4" is detected. In view of the above circumstances, it is an object of the present invention to provide a two-dimensional order filter circuit which can be realized with a small circuit scale and can correctly detect desired data.

[0009]

A first two-dimensional order filter circuit of the present invention for achieving the above object is provided on a two-dimensional image composed of a large number of pixels arranged in the row direction and the column direction. , When the pixel data corresponding to each pixel in an area formed by N1 × N2 pixels arranged in the row direction and N2 arranged in the column direction are arranged in the pixel value order from the maximum value side, the maximum value In a two-dimensional order filter circuit that performs the operation of selecting pixel data in a predetermined order from the whole area on a two-dimensional image while sequentially moving the area, (1) 1 in the row direction in the area A one-dimensional sorter circuit for sequentially performing, for each of the partial regions, an operation of rearranging each pixel data corresponding to each pixel in the partial region consisting of N2 pixels arranged in the column direction and N2 in the column direction (2) For one-dimensional sorter circuit N1 provided for each of the partial areas, in which N2 pieces of pixel data corresponding to the partial areas arranged in the order of pixel values are stored in the pixel value order.
Latch circuits (3) The maximum value of the pixel data stored in the N1 latch circuits is compared with the maximum value of each of the latch circuits to detect the maximum value among these N1 maximum values. Value detection circuit (4) N2 stored in the latch circuit in which the pixel data having the maximum value detected by the maximum value detection circuit is stored
This pixel data is shifted to the pixel data side having a large pixel value one by one, and the pixel data having the minimum value in the pixel data stored in the latch circuit is followed by the data having the minimum value in the pixel data. Alternatively, N1 shift circuits provided in association with each of the N1 latch circuits for storing data having a value different from the pixel data (5) detect the maximum value in the maximum value detection circuit, and In the shift circuit, each element of a counter for counting the number of routines for shifting pixel data is provided.

The second two-dimensional order filter circuit according to the present invention has N1 in the row direction and N2 in the column direction on a two-dimensional image composed of a large number of pixels arranged in the row direction and the column direction. An operation of selecting pixel data in a predetermined order from the minimum value when the pixel data corresponding to each pixel in the area formed by N1 × N2 pixels arranged in order is arranged from the minimum value side in the pixel value order. In a two-dimensional order filter circuit for performing the entire area on a two-dimensional image while sequentially moving the area, (6) N2 pixels arranged in the row direction and one in the row direction and N2 in the column direction. A one-dimensional sorter circuit for sequentially performing an operation of rearranging each pixel data corresponding to each pixel in the partial area consisting of the pixel values in order of the pixel values. (7) The one-dimensional sorter circuit arranged in the order of pixel values. Each section N1 provided for each of the partial areas, in which N2 pieces of pixel data corresponding to the areas are stored in the order of pixel values.
Latch circuits (8) The minimum value of the pixel data stored in the N1 latch circuits is compared with the minimum value of each latch circuit to detect the minimum value among these N1 minimum values. Value detection circuit (9) N2 stored in the latch circuit in which the pixel data having the minimum value detected by the minimum value detection circuit is stored
Data having the maximum value in the pixel data is provided after the pixel data having the maximum value in the pixel data stored in the latch circuit by shifting the pixel data one by one to the pixel data side having the small pixel value. Alternatively, N1 shift circuits provided in association with each of the N1 latch circuits for storing data having a value different from the pixel data (10) detect the minimum value in the minimum value detection circuit, and In the shift circuit, each element of a counter for counting the number of routines for shifting pixel data is provided.

Here, the above "row direction" and "column direction"
Is, of course, just a matter of how the images are arranged, and thus it goes without saying that either direction may be considered as the row direction or the column direction. Further, the shift circuit physically stores data stored in the latch circuit,
The circuit need not be an electrically shifting circuit, and may be, for example, a circuit that instructs a read pointer or a write pointer of a memory circuit. When the data stored in the latch circuit is actually shifted by the shift circuit and the first data is lost due to this shift, the first data stored in the latch circuit output from the one-dimensional sorter circuit is first stored. It is preferable to store the pixel data to be stored.

[0012]

In the two-dimensional order filter of the present invention, each pixel data is rearranged in the order of pixel value by the one-dimensional sorter circuit ((1), (6)) and latched ((2), (7)). Every time, the maximum value detection circuit (above (3)) or the minimum value detection circuit (above (7)) detects the maximum value or minimum value, and the maximum value or minimum value is counted by the counter (above (5),
Since the shift circuit ((4), (9) above) is configured to push out the necessary number of times while counting in (10), the circuit size is small, for example, the third data from the median value and the maximum value. It is possible to correctly detect desired data.

Incidentally, N1 =
3, N2 = 3, that is, when the median value (pixel data having the fifth value from the maximum value or the minimum value) is extracted from 9 pixels as an example, the number of times of determining the magnitude of two data is A one-dimensional comparator requires two comparisons, a maximum value detection circuit or a minimum value detection circuit performs two times × 5 times, a total of 12 times, which is 1/3 of the 36 times of odd-even sort shown in FIG. It will be. In addition, an accurate median value can be obtained as compared with the algorithm described with reference to FIG.

[0014]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is a diagram showing an algorithm of a circuit configured to select a median value from 3 × 3 = 9 pixels, which is an embodiment of the first two-dimensional ordered filter circuit of the present invention.
FIG. 3 is a schematic diagram showing the movement of data in FIG. 1.

On a two-dimensional image composed of a large number of pixels P arranged in a row direction A and a large number of pixels P in a column direction B, a region 20 consisting of a total of nine pixels arranged in the row direction and three in the column direction is arranged. It is assumed that the pixel data having pixel values as shown in FIG. Here, pixel data having a median value is selected from these nine pieces of pixel data.

"25", "6", which are input to the one-dimensional sorter 11 two times before and are arranged one in the row direction and three in the column direction.
Regarding the pixel data of the partial area 20a composed of three pixels having each pixel value of "1", the magnitude of the pixel value of these pixel data is determined, and the maximum value "25" is sequentially given to the latch circuit 12 from the bottom of the figure. , The median value "6" and the minimum value "1" are latched. Similarly, the pixel data of the partial area 20b consisting of three pixels having the subsequent pixel values of "31", "5", and "7", which were input to the one-dimensional sorter 11 last time, are latched by the latch circuit 13. Is latched to.

In this state, this time, similarly, the data of the partial area 20c consisting of three pixels having the pixel values of "2", "3", and "9" is input to the one-dimensional sorter, and the size of the data is changed. Is determined and latched in the latch circuit 14. When the pixel data of the partial regions 20a, 20b, 20c are latched in the latch circuits 12, 13, 14 in this manner, the maximum values' 9 ',' 31 ',' of the latch circuits 12, 13, 14 are latched. The size of 25 'is compared and judged.
Here, since "31" latched by the latch circuit 13 is the maximum, as shown in FIG.
Pixel data having a pixel value 31 is pushed out from 3, and at the top of the latch circuit 13 in FIG.
Is latched. The detection of the maximum value by the maximum value detection circuit 15 and the movement of the data by the latch circuit 13 cause the counter 16 to count up by one.

Next, the maximum value detection circuit 15 compares the maximum values of the latch circuits 12, 13, 14 with each other, that is, "9", "7", and "25" this time, and the maximum value among them is compared. When "25" is detected, the data latched in the latch circuit 12 is moved this time, and the counter 16 counts up to 2 as shown in FIG. The above operation is repeated and the pixel data '6' pushed out when the counter 16 reaches 5 becomes the median value corresponding to this area 20.

Next, in order to detect the median of the area 21, three pixel data of the partial area 21c are input to the one-dimensional sorter 11. For example, each partial area belongs to three areas such that the partial area 20c belongs to three areas 20, 21 and 22. Therefore, the data passed through the one-dimensional sorter 11 is stored so as not to be erased by the above data movement. If so, it can be used to detect the median value of the three regions. Therefore, the number of comparisons of the two data for detecting the median value in one area is 2 times with the one-dimensional sorter and 2 times with the maximum value detection circuit 15 × 5 times in total, which is a total of 12 times. The value can be detected accurately.

The above embodiment is one embodiment of the first two-dimensional order filter circuit of the present invention, but the three latch circuits 12, 13, 14 are provided with pixel data having a small value on the lower side of the figure. Are arranged so that the maximum value detection circuit 15 is replaced by a minimum value detection circuit, and each latch circuit 12, 1
The second and third aspects of the present invention are configured by inputting the maximum value or the like that can be handled by this two-dimensional order filter circuit in place of the value "0" input from the upper part of the figure of 3,14. An embodiment of a dimensional ordered filter circuit is constructed. The operation in this embodiment is almost the same as that described above, and therefore its illustration and description are omitted here.

Further, the above embodiment is a circuit for detecting the median value in an area consisting of a total of 9 pixels in which 3 pixels are arranged in each of the row direction and the column direction. However, the present invention is an arbitrary number N in the row direction.
This can be adopted when detecting pixel data in an arbitrary order from the maximum value or the minimum value in an area of N1 × N2 pixels in which one N2 arranged in an arbitrary number N2 in the column direction.

[0022]

As described above, the two-dimensional order filter circuit of the present invention arranges the pixel data in each partial area in the order of the pixel value by the one-dimensional sorter circuit to set the maximum value in the plurality of partial areas. However, since the minimum value is compared with a predetermined number of times, the desired pixel data can be accurately extracted with a small-scale circuit configuration.

[Brief description of drawings]

FIG. 1 is an embodiment of a first two-dimensional order filter circuit of the present invention.

FIG. 2 is a schematic diagram showing the movement of data in FIG.

FIG. 3 is an explanatory diagram of so-called odd-even sorting, which is an example of an algorithm that realizes a two-dimensional ordered filter.

FIG. 4 is an explanatory diagram of an algorithm that realizes a conventional median filter.

[Explanation of symbols]

 11 1-dimensional sorter 12, 13, 14 Latch circuit 15 Maximum value detection circuit 16 Counter

Claims (2)

[Claims] 1. An N in the row direction on a two-dimensional image composed of a large number of pixels arranged in the row direction and the column direction.
When each pixel data corresponding to each pixel in the area composed of one pixel and N2 pixels arranged in the column direction is arranged from the maximum value side in the pixel value order, the predetermined order is given from the maximum value. In a two-dimensional order filter circuit that performs the operation of selecting the pixel data in the area over the entire area of the two-dimensional image while sequentially moving the area, one in the row direction and N2 in the column direction in the area. N2 lined up
A one-dimensional sorter circuit for sequentially performing an operation for rearranging each pixel data corresponding to each pixel in a partial region consisting of a plurality of pixels in the order of pixel value; and a one-dimensional sorter circuit for rearranging the pixel data in order of pixel value. Further, N1 latch circuits provided for each of the partial regions and N2 pixel data stored in the N1 latch circuits for storing N2 pixel data corresponding to each of the partial regions in order of pixel value. A maximum value detection circuit for detecting the maximum value among these N1 maximum values by comparing the maximum values of the respective latch circuits, and a pixel having the maximum value detected by the maximum value detection circuit. The pixel having the minimum value in the pixel data stored in the latch circuit by shifting the N2 pixel data stored in the latch circuit storing the data one by one to the pixel data side having the large pixel value Of data N1 shift circuits provided in association with each of the N1 latch circuits for storing data having a minimum value in the pixel data or data having a value distinguished from the pixel data, and the maximum A two-dimensional order filter circuit comprising: a counter that counts the number of routines for detecting the maximum value in the value detection circuit and for shifting the pixel data in the shift circuit. 2. N in the row direction on a two-dimensional image composed of a large number of pixels arranged in the row direction and the column direction.
When each pixel data corresponding to each pixel in the area composed of N1 pixels and N2 pixels arranged in the column direction is arranged from the minimum value side in the pixel value order, the predetermined order is given from the minimum value. In a two-dimensional order filter circuit that performs the operation of selecting the pixel data in the area over the entire area of the two-dimensional image while sequentially moving the area, one in the row direction and N2 in the column direction in the area. N2 lined up
A one-dimensional sorter circuit for sequentially performing an operation for rearranging each pixel data corresponding to each pixel in a partial region consisting of a plurality of pixels in the order of pixel value; and a one-dimensional sorter circuit for rearranging the pixel data in order of pixel value. Further, N1 latch circuits provided for each of the partial regions and N2 pixel data stored in the N1 latch circuits for storing N2 pixel data corresponding to each of the partial regions in order of pixel value. , A minimum value detection circuit for comparing the minimum values of the respective latch circuits to detect the minimum value among these N1 minimum values, and a pixel having the minimum value detected by the minimum value detection circuit. The pixel having the maximum value among the pixel data stored in the latch circuit by shifting the N2 pixel data stored in the latch circuit storing the data one by one to the pixel data side having the small pixel value Of data N1 shift circuits provided in association with each of the N1 latch circuits for storing the data having the maximum value in the pixel data or the data having a value distinguished from the pixel data in the stage; A two-dimensional order filter circuit, comprising: a counter that counts the number of routines for detecting the minimum value in the value detection circuit and shifting the pixel data in the shift circuit.