JPH05127628A - Active matrix liquid crystal device and its driving method - Google Patents

Abstract

PURPOSE:To apply the active matrix liquid crystal device and its driving method to equipment which requires high definition and faster driving such as a high- vision TV by enabling high-speed driving. CONSTITUTION:External signals which determine the optical state of liquid crystal are temporarily stored in buffers 108 and 109 and supplied to picture elements, line by line, through amplifiers 104 and 105 and an active matrix element to drive the active matrix liquid crystal device which is driven by interlacing. At this time, the external signals of even lines are stored in the 2nd buffer 109 in the period of signal supply from the 1st buffer 108 to the picture elements of odd lines, and the external signals of odd lines are stored in the 1st buffer 108 in the period of signal supply from the 2nd buffer 109 to the picture elements of even lines.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal device which is driven by an active matrix element and has a liquid crystal display element having a memory property, and a driving method thereof.

[0002]

2. Description of the Related Art Conventionally, a liquid crystal display device provided with an active matrix device has been widely applied when a TN liquid crystal is used, and has been commercialized as a flat panel display or a projection television.
The active matrix element represented by a thin film transistor (TFT), a diode element, and an MIM (metal insulator metal) element has a switching characteristic that makes the TN liquid crystal having a relatively slow response more than a substantial line selection period. By maintaining the voltage application state for a long time, it helps the optical switch response of the liquid crystal, and also has a memory property (self-holding property) like the above TN liquid crystal.
By maintaining the voltage applied state, a liquid crystal having no light is brought into a substantial memory state for one frame. Alternatively, in principle, there is a feature that crosstalk is not given between lines and between pixels and good display characteristics are given.
FIG. 4 shows a structure of an active matrix liquid crystal element which is a liquid crystal display element provided with such an active matrix element.

In recent years, with respect to the above-mentioned TN liquid crystal, the development of a ferroelectric liquid crystal (FLC) which has a response speed several orders of magnitude faster,
Display panels and light valves using this have been announced. Here, there is a possibility that a better display element can be obtained by driving the FLC with the active matrix element. Examples of a combination of FLC and the TFT are USP 4,840,462 and "Proceeding of the SID,
vol. 30, 1989 "Ferroelectvic Liquid-Crystal Video
Display "", etc. FLC is, for example,
It is a liquid crystal that takes either a first optical stable state or a second optical stable state according to an applied electric field, that is, a liquid crystal having a bistable state with respect to an electric field.

When a liquid crystal having such a memory property is used in a display device, one of the two optically stable states is black and the other is white, for example, the optical axis of the liquid crystal and the deflecting plate. Consists of the optical axis. The voltage at which the display element becomes white is called an optical information recording signal, and the voltage at which the display element becomes black is called a reset signal. F with a bistable state
When driving the LC, it is necessary to input the black (reset) signal to each pixel before each recording signal access to reset the recording at the previous access.

FIG. 3 shows a conventional basic driving circuit in such a liquid crystal device. This drive circuit is a liquid crystal cell 3
01 and TFT 302, pixel section, amplifier section 30
3, a buffer unit 304, a horizontal shift register 305, and a vertical shift register 306 are provided. The recording signal and the reset signal are sequentially transferred from the signal input terminal 307 to each pixel or each line with a timing shift. It has become.

[0006]

However, the following problems occur in such a conventional configuration. That is, in the period for transferring the video signal Video to the buffer unit 304 and then transferring the signal to the pixel unit through the amplifier unit 303, all signal transfer must be performed within the blanking period within one horizontal period. Therefore, for example, an HD compatible television has only 3 μsec. Also,
In a liquid crystal display element such as FLC that must be reset within the blanking period, the period actually allowed for signal transfer is only 1 μsec.

In addition, when a signal is transferred to the pixel section through the amplifier section 303, in reality, the parasitic capacitance 309 existing in the signal wiring 308 also needs to be charged at the same time.
The speed required for the drive circuit becomes even more severe. Furthermore, in the capacity of the buffer unit 304, signal charges are accumulated during each horizontal scanning period despite the interlace drive, and unless complete transfer is performed, a part of the signal information of the previous line is stored. Remains in the buffer capacity. Therefore, in practice, it is necessary to reset the charge of the buffer capacitance before transferring the charge of each pixel.
The time allowed for signal transfer becomes severe.

As a liquid crystal drive circuit, attempts have been widely made to form a drive circuit monolithically in order to avoid mounting problems. In that case, polycrystalline silicon is used to increase the drive speed. Are often used in the active layer. However, even if polycrystalline silicon is used, it is difficult to satisfy the above access time in reality, and various circuit devices have been devised.

In view of the above-mentioned problems of the prior art, an object of the present invention is to enable higher speed driving in an active matrix liquid crystal device using a liquid crystal element as a display element, and to realize high definition and high speed driving of a high-definition TV or the like. It's about being able to handle what you need.

[0010]

In order to achieve the above object, according to the present invention, an external signal that determines the optical state of liquid crystal is temporarily stored in a buffer, and this signal is supplied to each pixel for each line by an amplifier and an amplifier. In an active matrix liquid crystal device in which interlace driving is performed by supplying via an active matrix element, an even line signal from the outside is accumulated in a second buffer during a signal supply period from the first buffer to pixels on an odd line. However, during the signal supply period from the second buffer to the even line pixels, the odd line signal from the outside is stored in the first buffer.

As the liquid crystal, for example, a TN type liquid crystal or a liquid crystal exhibiting ferroelectricity (FLC) can be used. Among the FLCs, the liquid crystal applicable to the present invention is an optical modulation substance having at least two stable states. In particular, it is composed of a substance that has one of a first optical stable state and a second optical stable state depending on an applied electric field, that is, a substance that has a bistable state with respect to an electric field. It is a liquid crystal having.

As such a liquid crystal, a chiral smectic liquid crystal exhibiting ferroelectricity is preferable, and a chiral smectic C phase (SmC *) or H phase (SmH *), and further chiral chiral compounds such as SmI *, SmF * and SmG *. Smectic liquid crystals are suitable. Of course, even when another liquid crystal having a memory property is used, a sufficient effect described later can be obtained.

[0013]

In this structure, when the signal is transferred to each line, the signal charge of the even field is transferred during the display of the odd field, and conversely, the signal charge of the odd field is transferred to the pixel during the display of the even field. .. Therefore, the access time for transferring the signal charges from the first and second buffers only needs to be within one horizontal scanning period, and there is a margin in the speed of the driving circuit which is 10 times lower than in the conventional method.

Further, by separately driving the odd field and the even field in this way, the signal charges of both fields do not affect the signal of the next field. Even if some of the charges accumulated in the buffer remain without being completely transferred, the charges in the buffer can be reset sufficiently.

[0015]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a circuit diagram of a drive circuit of an active matrix liquid crystal device according to an embodiment of the present invention, and FIG. 2 is a timing chart of signals in respective parts thereof. In the figure, 101 is a capacitance by a liquid crystal cell, 102 is a switching TFT provided in each pixel portion for applying a signal voltage to the liquid crystal cell, 103 is a wiring for transmitting an optical information signal applied to the liquid crystal cell of each pixel, 115 is a switching TF
Wiring for transmitting a gate signal to T102, 104 and 105 are amplifiers, 106 and 107 are first transfer gates, 108 and 109 are buffer capacitors, 11
0 and 111 are second transfer gates, 112 is an image signal input switching TFT, 113 and 114
Are horizontal and vertical shift registers, respectively.

Next, the transfer of signals to the odd (ODD) field and the even (EVEN) field will be described. Video signal V of odd field from input terminal 116
_{When IN} is input, a signal synchronized with that signal is sent from the horizontal shift register 113 to the gate of the TFT 112 and the signal Ψ _ODD is sent to the second transfer gate 110. As a result, both gates are turned on at the same time, and the video signal V _IN is transferred to the buffer capacitor 108. Then, the TFT 112 and the transfer gate 110
Is turned off, and the signal charge E _{ODD of the} transferred odd field is
Are held in the buffer capacity 108.

On the other hand, during this period, the signal Φ _EVEN is input to the first transfer gate 107, and a signal in synchronization with this is sent from the vertical shift register 114 to the pixel switching TFT 102 of the corresponding line, whereby the buffer capacitance. The even field signal charges already stored in 109 are transferred to the liquid crystal capacitor 101, and the even field signals are recorded in the liquid crystal of each pixel of the line.

Next, the signal Φ _ODD is input to the first transfer gate 106, and a signal in synchronization with this is sent from the vertical shift register 114 to the pixel switching TFT 102 of the corresponding line, whereby the buffer capacitance 108 of the buffer capacitor 108. The signal charge E _ODD is transferred to the liquid crystal capacitor 101, and the signal of the odd field is recorded in the liquid crystal of each pixel of that line.

On the other hand, during this period, the next even field video signal V _IN is input, and a signal in synchronization with it is sent from the horizontal shift register 113 to the gate of the TFT 112 and the second transfer gate 111.
Signal [psi _EVEN is sent to, thereby, the signal V _IN of the even field are transferred to the buffer capacitor 109. And T
The FT 112 and the transfer gate 111 are turned off, and the transferred signal charge E _EVEN is held in the buffer capacitor 109.

By repeating the above operation, signal transfer in the odd field and the even field is carried out through mutually different buffers.

According to such a driving method, when signals are transferred to each line, signal charges of even fields can be transferred during display of odd fields, and conversely, signal charges of odd fields can be displayed during display of even fields. The signal charge can be transferred. Therefore, the access time for transferring the video input signal V _IN to the buffer capacity has only to be within one horizontal scanning period, and the speed of the driving circuit 10 times lower than that of the conventional method can be afforded.

Further, by separately driving the odd field and the even field in this way, the signal charges of both fields do not affect the signal of the next field. Even if some of the charges accumulated in the buffer capacitor are not completely transferred and remain, the charges in the buffer can be reset sufficiently. Even in an HD-compatible television, all signals need only be exchanged within 30 μsec of one horizontal scanning period, and a 10-fold speed margin is provided in the drive circuit as compared with the conventional one.

[0023]

As described above, according to the present invention, the signal of the even line from the outside is accumulated in the second buffer during the signal supply period from the first buffer to the pixels of the odd line, and the second buffer is stored. Since the odd-numbered line signal from the outside is stored in the first buffer during the signal supply period from the buffer of No. 2 to the pixel of the even-numbered line, a margin is given to the speed of the low-degree drive circuit 10 times as compared with the conventional one. be able to. Further, it is possible to prevent the signal charges in both fields from affecting the signal in the next field. Therefore, even if polycrystalline silicon is used for the active layer, high-speed driving compatible with high-definition can be performed without requiring special measures for the active layer of the TFT. Further, by applying the present invention, a high-definition direct-view flat display or projection display can be formed. Of course, by providing a color filter for each pixel, or by using a plurality of liquid crystal elements according to the present invention and performing color light projection on each of them, a transmissive or reflective high-definition flat color television or A projection color television can also be constructed.

[Brief description of drawings]

FIG. 1 is a drive circuit diagram of an apparatus according to an embodiment of the present invention.

FIG. 2 is a drive timing chart in the device of FIG.

FIG. 3 is a circuit diagram of a drive circuit according to a conventional example.

FIG. 4 is a structural diagram of an active matrix device.

[Explanation of symbols]

101: capacitance by liquid crystal cell, 102: switching T
FT, 103, 115: wiring, 104, 105: amplifier, 106, 107: first transfer gate, 10
8, 109: buffer capacity, 110, 111: second transfer gate, 112: switching TFT, 11
3: horizontal shift register, 114: vertical shift register

Claims (2)

[Claims] 1. Interlace driving is performed by temporarily storing a signal from the outside that determines the optical state of liquid crystal in a buffer and supplying it to each pixel for each line via an amplifier and an active matrix element. A driving method of an active matrix liquid crystal device, wherein an even line signal from the outside is accumulated in a second buffer during a signal supply period from the first buffer to pixels of the odd line,
A method for driving an active matrix liquid crystal device, wherein an odd line signal from the outside is stored in the first buffer during a signal supply period from the buffer to the even line pixels. 2. An interlace drive is performed by temporarily storing a signal from the outside that determines the optical state of the liquid crystal in a buffer and supplying it to each pixel for each line via an amplifier and an active matrix element. In the active matrix liquid crystal device, the buffer includes first and second buffers, and an even line signal from the outside is supplied to the second buffer during a signal supply period from the first buffer to the pixels of the odd line. Active means characterized by comprising switch means for accumulating and controlling so as to accumulate an odd line signal from the outside in the first buffer during a signal supply period from the second buffer to the even line pixels Matrix liquid crystal device.