JPH05119738A - Driving method of plasma display panel - Google Patents

Abstract

PURPOSE:To provide operation for clearing all picture elements, which are controlled by an erasure pulse applied to one electrode, at a time more securely, by specifying the relation between the erasure pulse and a maintaining pulse. CONSTITUTION:The erasure pulse is superposed on part of the maintaining pulse right before the erasure pulse so that the time T1 of a part where the maintaining pulse right before the erasure pulse and the erasure pulse do not overlap with each other is 0.1-1.5sigmaec. Consequently, the substantial pulse width of the maintaining pulse right before the erasure pulse, i.e., the width of a pulse A is 0.1-1.5musec. This value is narrower than the original pulse width of the maintaining pulse B, e.g. 2musec. Consequently, the pulse A operates as an erasure pulse. The discharge of a pulse B as the substantial discharge of the erasure pulse is substantially 2nd erasure discharge. Consequently, the erasing ability of the past pulse can be made larger than conventional are without making the circuit complex.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called dot matrix type memory type AC plasma display panel for use in personal computers, office workstations, wall-mounted televisions, etc., which have been expected to develop in recent years. It relates to a driving method. More specifically, it relates to a driving method for enabling stable erase discharge in display light emission.

[0002]

2. Description of the Related Art A conventional AC plasma display panel has a structure shown in FIG. In FIG.
(A) is a plan view and (B) is a sectional view taken along the line aa ′ of (A).

In this plasma display panel, a first insulating substrate 11 made of glass, a second insulating substrate 12 made of glass, a row electrode 13, a column electrode 14, and a discharge gas space 15 filled with discharge gas such as He and Xe are provided. A partition 16 for securing a discharge gas space 15 and partitioning pixels, a phosphor 17 for converting ultraviolet light generated by discharge of the discharge gas into visible light, an insulator 18 for covering row electrodes, and an insulator 18 for protection from discharge. It is composed of a protective film 19 made of MgO or the like and an insulator 20 covering the row electrodes. Note that in FIG. 6A, reference numeral 21 indicates a pixel.

In the plasma display panel having such a structure, once a pulse voltage is applied between the column electrode 14 and the row electrode 13 to cause discharge, thereafter, a sustain pulse is generated between the adjacent row electrodes 13. The discharge is maintained between the row electrodes 13 by continuing to apply an alternating pulse voltage called ". Such a function is called a memory function. A pulse having a higher voltage than the sustain pulse may be applied between the row electrodes 13 to cause the discharge. Further, when a low voltage pulse called an erase pulse is applied to the row electrode 13, the discharge can be stopped.

Therefore, a dot matrix display can be obtained by forming the row electrodes 13 and the column electrodes 14 in stripes as shown in FIG. 6 and arranging them so as to be orthogonal to each other. Further, if the phosphors 17 are separately coated in three colors, a plasma display capable of color display can be obtained.

FIG. 7 is a block diagram focusing on the electrode arrangement of the plasma display panel shown in FIG. In FIG. 7, reference numeral 22 denotes a plasma display panel, S ₁ , S ₂ ,
, S _{m are} row electrodes, and D ₁ , D ₂ , ..., D _n are column electrodes.

FIG. 8 is a diagram showing an example of drive voltage waveforms and light emission waveforms of the plasma display panel shown in FIGS. 6 to 7. The waveform 8a shows the row electrodes S ₁ , S ₃ ,
, S _m−2 , S _m , the voltage waveform applied to the row electrode S ₂ , the waveform 8 b is the voltage waveform applied to the row electrode S ₂ , and the waveform 8 c is the row electrode S ₄
, A waveform 8d is a voltage waveform applied to the row electrode S ₆ , a waveform 8e is a voltage waveform applied to the column electrode D _j , and a waveform 8f is a light emission waveform of the pixel a _2j . Only the common sustain pulse B is applied to the odd-numbered row electrodes S ₁ , S ₃ , ..., S _m-2 , S _m . In addition, an even number of row electrodes S
_In addition to the common sustain pulse A, a scan pulse and an erase pulse are line-sequentially applied to the electrodes ₂ , ₂ , S ₄ , ..., S _m-3 , S _m-1 at independent timings. The erase pulse is positioned so as not to overlap the sustain pulse B after the sustain pulse B falls.

Conventionally, two types of erase pulse have been used: a line width and a wide range (for example, Kenichi Ohwaki and Yoshinori Yoshida, "Plasma Display", 1983, Kyoritsu Publishing Co., p. 90). . In the discharge by the sustain pulse, the time from the rise of the voltage to the completion of the discharge is 1 to 4
It's microseconds. When the erase pulse width is relatively shorter than this time, it is called narrow pulse erase, and when it is longer, it is called thick pulse erase. As shown in FIG. 9, in the narrow pulse erasing, the pulse width is about 0.5 to 1 microsecond (FIG. 9A), and in the wide pulse erasing, the pulse width is about 5 to 10 microsecond. Pulse (Fig. 9
(B)) erases. Generally, narrow pulse erasing is often used because the range of erasable voltage is wider.

[0009]

However, as the number of pixels of the plasma display panel increases, the variation in the discharge characteristics of each pixel increases. Therefore, in the conventional erase pulse erase, narrow pulse erase, Whichever method of wide pulse erasure is used, it is difficult to collectively erase all the pixels controlled by the erase pulse applied to one row electrode.

An object of the present invention is to provide a plasma display panel having a large number of pixels, which can realize an operation of more surely collectively erasing all the pixels controlled by an erase pulse applied to one row electrode. It is to provide a driving method of a panel.

[0011]

According to the present invention, in a driving method of a dot matrix type AC plasma display panel having a memory function, an erase pulse is superposed on a part of a sustain pulse immediately before an erase pulse, A plasma display panel characterized in that the length of a portion where the last sustain pulse and the erase pulse do not overlap is 0.1 μsec or more and 1.5 μsec or less, and two or more erase pulses are used. A driving method is obtained.

[0012]

The present invention has solved the conventional problems by adopting the above configuration. This will be described with reference to FIG. In FIG. 2, the waveform 2a has an odd number of row electrodes S ₁ , S ₃ , ..., S.
voltage waveform of sustain pulse B applied to _m, the waveform 2b is row electrode _{S 2, S 4, ...,} S m-3, S sustain pulse A and the voltage waveform of the erase pulse is applied to the _m-1, waveform 2c is , The voltage difference applied to the pixel, that is, the voltage difference between the waveform 2a and the waveform 2b. Since the erase pulse that is superimposed on the sustain pulse immediately before the erase pulse is used as the erase pulse, in the waveform 2c, due to the difference between the sustain pulse B and the erase pulse, the sustain pulse B is substantially the pulse A having the width T ₁ . , The erase pulse is substantially a pulse B having a width T ₂ .

In this state, the time T _{1 of the} non-overlapping portion of the sustain pulse and the erase pulse immediately before the erase pulse is 0.
It is set to 1 μsec or more and 1.5 μsec or less. As a result, the substantial pulse width of the sustain pulse immediately before the erase pulse, that is, the width of the pulse A is 0.1 μsec or more or 1.5 μsec.
It will be less than a second. This value is narrower than the original pulse width of the sustain pulse B, for example, 2 μsec. For this,
The pulse A comes to act as an erase pulse. As a result, the sustain discharge becomes an erase discharge, and the discharge intensity of the pulse A is reduced. The discharge of pulse B, which is the effective discharge of the erase pulse, is substantially the second erase discharge. Therefore, as a result, the pulse A and the pulse B, which are erase discharge pulses having different polarities, were applied in series. As a result, the conventional erase pulse generating circuit can be used as it is, and the erasing ability of the past pulse can be greatly increased as compared with the conventional one without complicating the circuit. As a result, all the pixels to be erased by the erase pulse applied to one row electrode can be erased collectively more reliably than ever before.

Further, it has been found that the erasing power can be further increased by applying a plurality of erasing pulses, which are superposed with the sustain pulse just before the erasing pulse described above, in plural. This is because the weakened discharge, which is not completely erased by the first erase pulse, is erased by subsequent erase pulses, so that reliable erase is possible.

In the plasma display panel,
It is desirable that the erase ability of the erase pulse is as large as possible. That is, when the plasma display panel becomes large and the number of pixels per row increases, the variation in the erase characteristic of each cell increases. In the case of completely erasing the element group having the increased variation, the effect is particularly large even if the erasing capacity is slightly increased.

[0016]

EXAMPLE An example of the present invention will be described using the panel shown in FIGS. 6 to 7 in which m = 241, n = 480, and a diagonal of 10 inches.

FIG. 1 is a voltage waveform according to the first embodiment of the present invention. In FIG. 1, the waveform 1a is an odd number of row electrodes S.
_The voltage waveform applied to ₁ , S ₃ , ..., S _m , waveform 1b is
The voltage waveform applied to the row electrode S ₂ , the waveform 1c, is
_The voltage waveform applied to ₄ and the waveform 1d are examples of the voltage waveform applied to the row electrode S ₆ , and the waveform 1e is an example of the voltage waveform applied to the column electrode D _j . The frequency of sustain pulses A to B is 60
kHz, the pulse width is 2 microseconds, and the pulse width of the scanning pulse is 5 microseconds.

FIG. 2 is an enlarged view of the erase pulse portion of the first embodiment of the present invention. The description of FIG. 2 will be omitted because it has already been described in the section of the operation. The erase pulse is in a position overlapping the sustain pulse B. The time T ₁ and the time T ₂ are set as shown in FIG. 2, and comparison is made between the case where the sustain pulse B and the erase pulse are not superposed and the case where they are superposed. As a result, when T ₁ is set between 0.1 μs and 1.5 μs, the range of the voltage of the erase pulse that can erase the pixel that is emitting light, that is, the erase voltage margin is 30% or more compared to the conventional case. It turns out to grow. The reason for this is that, as described in the section of the action, by superimposing the erase pulse on the sustain pulse B, the effective pulse width of the sustain pulse B is reduced and there is virtually no difference from the erase discharge. Further, subsequently, the erase discharge by the erase pulse occurs with the opposite polarity, so that the erase pulses having different polarities are applied twice in the end, and thus the sustain discharge is efficiently erased. It is due to the fact.

FIG. 3 is a voltage waveform of the second embodiment of the present invention. In FIG. 3, the waveform 3a is an odd number of row electrodes S ₁ , S.
_3, application ..., the voltage waveform applied to S _m, the waveform 3b, the voltage waveform applied to the row electrode S _2, waveform 3c, the voltage waveform applied to the row electrodes S _4, waveform 3d is the row electrodes S ₆ The voltage waveform to be applied, waveform 3e, is an example of the voltage waveform applied to the column electrode D _j . The frequency of sustain pulse A or B is 60 kHz
z, the pulse width is 2 microseconds, and the pulse width of the scanning pulse is 5 microseconds.

As can be seen from FIG. 3, here, two erase pulses are applied to each even row electrode. As a result, the sustain discharge, which could not be erased only by the first erase pulse, can be reliably erased by the second erase pulse. This effect is because the sustain discharge is weakened by the first erase pulse, and the sustain discharge is easily erased by the second erase pulse.

FIG. 4 is a voltage waveform of the third embodiment based on the second embodiment of the present invention. The overall voltage waveform is similar to that of FIG. 3, and the portions of the first erase pulse and the second erase pulse are enlarged. In FIG. 4, the waveform 4a is the sustain pulse B applied to the odd-numbered row electrodes S ₁ , S ₃ , ..., S _m.
Of the row electrodes S ₂ , S ₄ , ..., S
₃ is a voltage waveform of a sustain pulse A, a first erase pulse, and a second erase pulse applied to _m-3 and _Sm-1 . here,
Unlike the second embodiment, the voltage of the second erase pulse is set to the first
It is set lower than the erase pulse voltage. As a result, the weak light emission of the pixels that could not be erased completely by the first erase pulse and could be erased efficiently with a larger erase voltage margin than in the second embodiment. Although only the voltage is changed here, it goes without saying that the pulse width may be changed, or both the voltage and the pulse width may be changed at the same time.

FIG. 5 is a voltage waveform diagram in the case where three erase pulses are used, which is the fourth embodiment and corresponds to the case where the erasing characteristic of each pixel has a large variation in a larger area. In FIG. 5, the waveform 5a is an odd number of row electrodes S ₁ ,
S _3, ..., the voltage waveform applied to S _m, waveform 5b is a voltage waveform applied to the row electrode S _2, waveform 5c is the voltage waveform applied to the row electrodes S _4, waveform 5d is the row electrodes S ₆ The applied voltage waveform, waveform 5e, is an example of the voltage waveform applied to the row electrode D _j . The frequency of sustain pulse A or B is 60 kHz
z, the pulse width is 2 microseconds, and the pulse width of the scanning pulse is 5 microseconds. In this way, by increasing the number of erase pulses, the width of the set value of the erase voltage, that is, the erase voltage margin further expands, and all the pixels connected to one row electrode can be erased collectively with a margin. It was

In the above description, the plasma display panel shown in FIGS. 6 and 7 is taken as an example, but the present invention is not limited to the plasma display panel shown in FIGS. It goes without saying that it can also be applied to a memory type plasma display panel.

[0024]

As is apparent from what has been described above,
By using the erase pulse superposed on the sustain pulse and two or more erase pulses of the present invention, the erase ability of the sustain discharge for display emission is significantly higher than that of the conventional erase pulse erase method. A driving method is obtained. Therefore, the erase operation of the display light emission in the plasma display panel having a large area, high definition and a large number of pixels becomes more reliable, which is very useful industrially.

[Brief description of drawings]

FIG. 1 is a diagram showing a voltage waveform according to a first embodiment of the present invention.

FIG. 2 is a partially enlarged view of FIG.

FIG. 3 is a diagram showing voltage waveforms according to a second embodiment of the present invention.

FIG. 4 is a diagram showing voltage waveforms according to a third embodiment of the present invention.

FIG. 5 is a diagram showing voltage waveforms according to a fourth embodiment of the present invention.

FIG. 6 is a plan view and a sectional view of a plasma display panel.

FIG. 7 is a configuration diagram of a plasma display panel focusing attention on electrode arrangement.

FIG. 8 is a diagram showing a conventional drive waveform of a plasma display panel.

FIG. 9 is an explanatory diagram of a conventional narrow and wide erase pulse.

[Explanation of symbols]

1a, 2a, 3a, 4a, 5a, 8a Voltage waveform of sustain pulse B applied to odd-numbered row electrodes S ₁ , S ₃ , ..., S _m 1b, 3b, 5b, 8b Voltage waveform applied to row electrode S ₂ 1c, 3c, 5c, 8c Voltage waveform applied to row electrode S ₄ 1d, 3d, 5d, 8d Voltage waveform applied to row electrode S ₆ 1e, 3e, 5e, 8e Example of voltage waveform applied to row electrode D _j 2b, 4b voltage waveforms of sustain pulse A and erase pulse applied to row electrodes S ₂ , S ₄ , ..., S _m-3 , S _m-1 2c applied to odd and even row electrodes applied to each pixel Waveform of applied voltage difference 8f Light emission waveform 11 First insulating substrate 12 Second insulating substrate 13, S _{1 to} S _m row electrode 14, D _{1 to} D _n column electrode 15 Discharge gas space 16 Partition walls 17, 20 Phosphor 18 Insulator 19 Protective film 21 Pixel 22 Plasma display panel T _1, T ₂ the set time of the erase pulse width

Claims (2)

[Claims] 1. A method for driving a dot-matrix AC plasma display panel having a memory function, wherein an erasing pulse for erasing display light emission is superposed on a part of a sustain pulse immediately before the erasing pulse, A method of driving a plasma display panel, wherein a length of a portion where the sustain pulse and the erase pulse do not overlap is 0.1 μsec or more and 1.5 μsec or less. 2. The driving method of a dot matrix AC plasma display panel having a memory function according to claim 1, wherein a plurality of erasing pulses are used.