JPH05115019A - Video signal processor - Google Patents

Abstract

PURPOSE:To attain stable color reproduction with an excellent operation at all times by monitoring the fluctuation of the entire processing system with respect to a video signal processor in a color television receiver. CONSTITUTION:A superimposing section 10 superimposes a test signal for gain control and a test signal fro DC recovery control for a blanking period of a video signal. A 1st feedback control loop detects the test signal for DC recovery control from a cathode current to control the DC recovery of the video signal, a 2nd feedback control loop detects the test signal for gain control from an output of an amplifier circuit 13 to control the gain of the entire processing system and a 3d feedback control loop controls an optimum bias of the amplifier circuit 13. Thus, the fluctuation of each of GBR signals is suppressed and the stable color reproduction is realized with an excellent operation at all times while keeping the balance. Furthermore, the detection accuracy is improved by operating plural sample-and-hold circuits with sampling pulse not overlapped with each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing device for processing a video signal of a color television receiver or the like.

[0002]

2. Description of the Related Art As a conventional video signal processing device, there is, for example, a structure shown in FIG. In FIG. 15, reference numeral 21 is a contrast / brightness control unit, 22 is a superimposing unit that superimposes a test signal in a blanking period of a video signal, and 2
3 is an output circuit for controlling the amplitude of the video signal and reproducing the direct current to output a CRT drive signal, 24 is a detector for detecting the test signal in the blanking period from the CRT drive signal, and 25 is an output from the detected test signal It is a control signal generator that generates a signal for controlling the gain of the circuit 23 and the direct current reproduction.

The operation of the conventional video signal processing apparatus configured as described above will be described. In the contrast / brightness control unit 21, as shown in FIG. 10, contrast control is performed by amplifying the amplitude of the AC component of the video signal, and brightness control is the DC component with respect to the pedestal level of the video signal. It is done as an increase or decrease of. These two types of control are performed for each of the G, B, and R video signals to perform uniform amplitude amplification and increase / decrease of the DC component to control the contrast and brightness. In the superimposing unit 22, for example, as shown in FIG. 16, a black level test signal having an amplitude of 25% of the maximum output amplitude and an amplitude of 75% of the maximum output amplitude during the blanking period of each of the G, B, and R video signals. The white level test signal of is superimposed. The output circuit 23 amplifies the amplitude of the video signal according to the gain control signal from the control signal generator 25, receives the DC reproduction control signal from the control signal generator 25, and clamps the black level test signal.

The detector 24 detects the black level test signal and the white level test signal from the blanking period of the CRT drive signal. The control signal generator 25 compares the black level detected by the detector 24 with the bias voltage of the reference level, and outputs the difference voltage to the output circuit 23 as a DC reproduction control signal. Further, the control signal generator 25 compares the white level detected by the detector 24 with the drive voltage of the reference level, and generates a gain control signal so that the gain of the output circuit 23 becomes a specified value. That is, the detection unit 2
When the white level detected by 4 is higher than the drive voltage, a signal for lowering the gain of the output circuit 23 is generated, and when the white level detected by the detection section 24 is lower than the drive voltage, a signal for increasing the gain of the output circuit 23 is generated. is doing.

As described above, by constructing a feedback loop so that the black level and white level test signals superposed during the blanking period coincide with the reference signal, the fluctuation of the CRT drive signal is suppressed and a stable image is obtained. It is a signal processing circuit.

[0006]

However, in the above-mentioned configuration, the contrast / brightness control section 21 for tracking the G, B, and R signals is
Amplification of the AC component and increase / decrease of the DC component must be performed accurately for G, B, and R. If the amplification of the AC component and the increase / decrease of the DC component are not performed at the same ratio with respect to G, B, and R, the brightness ratio of G, B, and R changes, and the display image is adjusted by adjusting the contrast and brightness. There was a problem that the chromaticity of the would change.

In view of the above points, it is an object of the present invention to provide a video signal processing device which enables tracking of G, B and R signals accurately and easily and which always has stable chromaticity of a display image. And

[0008]

SUMMARY OF THE INVENTION The present invention is directed to generating means for generating first and second test signals for controlling the brightness and contrast of a display image, and first and second tests from the generating means. A superimposing means for superimposing the signal in the blanking period of the video signal, and a feedback type for controlling the amplitude of the video signal by controlling the amplitude of the second test signal output from the superimposing means to control the contrast of the display image. Of the first DC regenerating means and the feedback type first DC regenerating means for controlling the gain controlling means of the above and the direct current regenerating of the output of the gain controlling means during the retrace period other than the superimposing period. A second direct current regeneration means coupled to the output to control direct current regeneration during the period of the first test signal, and an output of the second direct current regeneration means is supplied to a load, and a first load current induced by a video signal is applied to the first direct current regeneration means. Detect the test signal of It is composed of a current detecting means for feeding back to the reproducing means.

[0009]

According to the present invention, due to the above-mentioned constitution, the contrast,
By adjusting the brightness as a test signal during the blanking period of each video signal of the GBR, and detecting the rate of change of this test signal and monitoring it with a feedback control loop, tracking of the GBR signal can be accurately controlled, and the cathode current Since the change is detected, it is possible to automatically cope with a change in the characteristics of the CRT.

In addition, in front of the amplifying means, the pedestal level of the video signal is clamped so that the bias becomes optimum for the operation of the amplifying means to perform DC reproduction, and in the latter stage of the amplifying means, the test signal by brightness adjustment is clamped. By performing the direct current reproduction, the dynamic range of the amplifying means can be reduced, and as a result, it is possible to reduce the power consumption, and as the drive output of the CRT, a video signal processing device having a good frequency characteristic and a wide brightness adjustment range can be provided. realizable.

Further, in a plurality of sample-hold circuits, the sampling pulses of the other sample-hold circuits do not overlap each other, so that the influence of noise components due to the sampling pulses of the other sample-hold circuits is reduced and the detection accuracy of each sample-hold circuit is improved. Can be improved.

[0012]

1 is a block diagram of a video signal processing device according to a first embodiment of the present invention. In FIG. 1, 10 is the first and second in the blanking period of the video signal.
Superimposing section for superimposing the test signal, 11 a gain control section for controlling the amplitude of the video signal, 12 a first direct current reproducing section, 13 an amplifier circuit for generating a CRT drive signal, and 14 a first 2 direct current regeneration unit, 15 current detection unit, 16
Is a first signal generator that detects the second test signal from the output of the amplifier circuit 12, 17 is a second signal generator that detects the pedestal level of the video signal from the output of the amplifier circuit 12,
Reference numeral 18 denotes a generator that generates the first and second test signals that the superimposing unit 10 superimposes.

In FIG. 1, a loop formed by the second DC regenerator 14 and the current detector 15 is a first feedback control loop, and a gain controller 11 and a first DC regenerator 12 and an amplifier circuit. 12 and the first signal generating unit 16 as a second feedback control loop, and the first DC regenerating unit 12, the amplifier circuit 13 and the second signal generating unit 17 as a third loop. Use as a feedback control loop. The operation of the video signal processing apparatus of this embodiment having the above-described configuration will be described below.

The generator 18 generates a test signal whose amplitude changes by adjusting the contrast volume and a test signal whose amplitude changes by adjusting the brightness volume. The former is a test signal for monitoring the amplitude of the video signal, and the latter is a test signal for monitoring the direct current reproduction of the video signal. Thereafter the two test signals, respectively CTP (C ONTRAS T P ULSE) , BRP (BR IGHTNESS
P ULSE). The generator 18 also generates a clamp pulse and a sampling pulse for detecting changes in CTP and BRP.

Next, the operation of the superposing section 10 will be described in detail with reference to FIG. In FIG. 2, 101 is a video signal clamp circuit, 102 is a switch circuit, and 103 is a test signal clamp circuit.

The pedestal level of the video signal is clamped by the video signal clamp circuit 101, and the test signal CTP,
The BRP is clamped by the test signal clamp circuit 103, and its output becomes the input of the switch circuit 102. The switch circuit 102 switches and outputs a video signal and a test signal according to a switch control signal. As a result, the output of the switch circuit 102 becomes a signal in which the test signal is superimposed during the blanking period of the video signal. This CTP
The BRP test signal and the BRP test signal are superimposed equally in amplitude and phase during the blanking period of each of the G, B, and R video signals.

Next, the operation of the third feedback control loop will be described with reference to FIG. The third feedback control loop is a feedback clamp loop that controls the DC reproduction of the pedestal level of the video signal in the first DC reproduction unit 12. In FIG. 3, 12 is a first DC regenerating unit. Further, 170 is a level shift circuit, 171 is a sample hold circuit, and 172 is a comparator.

The output of the amplifier circuit 13 is adjusted to an appropriate amplitude by the level shift circuit 170, and the sample hold circuit 17 is provided.
Input to 1. The sample hold circuit 171 detects the pedestal level from the output of the amplifier circuit 13 every horizontal blanking period. The comparator 172 is the sample hold circuit 1
The pedestal level detected at 71 is compared with the reference voltage VP, and a control voltage is output to the first DC regenerating unit 12 so that the output of the amplifier circuit 13 is always a constant DC regenerating. At this time, the reference voltage VP is selected so that the frequency characteristics and linearity of the amplifier circuit 13 are always in the optimum operating state. As a result, the output of the amplifier circuit 13 becomes a video signal which is pedestal clamped every horizontal period by the third feedback control loop.

Next, the operation of the second feedback control loop will be described with reference to FIG. The second feedback control loop is
This is a loop for controlling the gain of the gain control unit 11. In FIG. 4, 160 is a level shift circuit, 161, 1
62 is a sample hold circuit, 163 is a subtractor, 164
Is a comparator.

The output of the amplifier circuit 13 is the level shift circuit 1.
At 60, it is converted to an appropriate level as an input to the sample and hold circuits 161, 162. Level shift circuit 160
Is input to the sample and hold circuits 161, 162, where the pedestal level of the video signal and the peak value level of CTP are detected and held. The subtractor 163 calculates the output difference between the sample hold circuits 161 and 162. Since this output is the difference between the pedestal level and the peak value level of CTP, that is, the amplitude voltage V1 of CTP after passing through the amplifier circuit 13 and the level shift circuit 160.
Becomes V1 is compared with a reference signal for gain control (hereinafter referred to as VD) by a comparator 164.

The comparator 164 compares V1 and VD and outputs V1
If> VD, a signal for lowering the gain of the gain control circuit 111 is output and the output of the amplifier circuit 13 is reduced. If V1 <VD, the comparator 164 outputs a signal for increasing the gain of the gain control circuit 111 and increases the output of the amplifier circuit 13. As a result, the total gain of the control unit 11 and the amplifier circuit 13 is
The comparator 164 is controlled so that V1 = VD.

Next, the first feedback control loop will be described with reference to FIG. The first feedback control loop is also a feedback clamp loop. In FIG. 5, 1
Reference numeral 4 denotes a second DC regenerating unit, 150 a current detector, 151 a current-voltage converter (hereinafter referred to as an IV converter), 152
Is a sample hold circuit, and 153 is a comparator.

The current detector 150 includes the second DC regenerator 1
The output of No. 4 is supplied to the cathode, and the cathode current induced by the video signal is detected. The current signal detected by the current detector 150 is converted from the current signal to a voltage signal by the IV converter 151. In addition, the sample hold circuit 1
At 52, a signal by BRP is detected from the output of the IV converter 151 and held. Further, the comparator 153 compares the output V2 of the sample hold circuit 152 with the reference signal VB and generates a signal for controlling the second DC regenerator 14 so that V2 = VB is always maintained. The second DC regenerator 14 receives the BR signal according to the control signal from the comparator 153.
The peak value level of P is clamped and DC reproduction of the video signal is performed. As a result, the video signal input to the cathode is
The cathode current induced by BRP is controlled so that it is always constant.

As described above, the video signal is clamped at every horizontal period by the third feedback control loop, so that horizontal sag due to APL (Average Picture Level) change or the like is removed and the amplifier circuit operates optimally. Be held in a bias that can. Further, the amplitude of the video signal is controlled by the second feedback control loop, and the B signal is controlled by the first feedback control loop.
Brightness is adjusted by performing direct current regeneration of RP. Brightness adjustment will be described later.

Further, since the third feedback control loop is clamped at a constant potential so that the amplifier circuit 13 operates best, the dynamic range of the amplifier circuit 13 can be designed narrow and the power consumption of the circuit can be reduced. Further, since the control of the first feedback control loop monitors the variation of the cathode current, it automatically responds to the variation of the cathode current due to the change with time of the CRT characteristic and suppresses the variation. ..

Next, a method of adjusting the drive and bias will be described. The characteristics of the CRT are generally not uniform for G, B, and R, and the relationship between the input signal and the brightness of the output screen is different as shown in (FIG. 6). The brightness is different for G, B, and R. Therefore, in order to make the brightness of the display image uniform, it is necessary to adjust the gain of the video signal system and the direct current reproduction to be different for G, B, and R, as shown in FIG. This adjustment is drive and bias adjustment.

Next, a drive adjusting method will be described first. A gain G obtained by combining the gain control unit 11 and the amplifier circuit 13
When the CTP amplitude at the time of input to the control unit 11 is VC and the reference voltage is VD, the following equation (1) is obtained. G = (1 / K)  (VD / VC) (1) where K is the step-down ratio in the level shift circuit 160.

That is, in order to change the amplitude of the video signal,
It is sufficient to change VC or VD. For drive adjustment, the amplitudes of G, B, and R video signals must be set individually. If VC is used for drive adjustment, the generator 18 generates a test signal CTP for superimposing G,
Since three types must be prepared for B and R, the circuit scale becomes large and complicated. On the other hand, VD is simply a DC voltage, and it is easy to prepare three types for G, B, and R. Therefore, VD may be used as the drive adjustment voltage. The same applies to bias adjustment. Bias adjustment is also G, B, R
However, the reference voltage VB is set to 3 as the bias voltage by setting the peak value (amplitude) of BRP to different values for G, B, and R.
The circuit can be simplified by preparing different types.

Adjustment of the drive and bias is as follows.
Since G, B, and R are different adjustments, G, B, and R
Even if there is a variation in circuit characteristics between the two, it can be absorbed.

Next, the principle of adjusting contrast and brightness will be described. First, the principle of contrast adjustment will be described. For contrast, it is necessary to similarly change the amplitudes of G, B, and R video signals. The amplitude of the video signal that drives the CRT is controlled by the gain G of (Equation 1),
Even if the drive voltage VD is different for G, B, and R, G,
It is obvious from the equation (1) that the rate of change in gain due to a uniform change in VC in B and R is the same in G, B and R. Therefore, by changing the amplitude VC of the CTP that is equally superimposed on the G, B, and R video signals, the amplitude of each of the G, B, and R video signals can be changed in the same manner, and the contrast can be adjusted. Becomes

Next, the adjustment of brightness will be described. As shown in FIG. 8, the brightness of the image is proportional to about the cube of the voltage V _CRT from the cutoff level of the CRT drive signal. The wave height level of BRP of G, B, and R matches the cutoff level by the bias adjustment.
As shown in FIG. 9, when the amplitude of BRP is changed, the voltage with the cutoff level relatively changes, and the brightness changes. In FIG. 9, the voltages from the cutoff levels of the G, B, and R CRT drive signals before and after increasing the brightness are VbG, VbB, VbR, and Vb, respectively.
Assuming G ′, VbB ′, and VbR ′, since BRP is superimposed on G, B, and R with the same amplitude, VbG′−VbG = VbB′−VbB =
It becomes VbR'-VbR, and the change in brightness becomes uniform among G, B, and R, and the brightness can be adjusted.

Here, the brightness / bias adjustment reference is not the pedestal level or the like but the voltage of the peak value of BRP. When the contrast amount changes, the change information is not transmitted to the brightness / bias adjustment reference. In this case, the hue changes depending on the gradation. The description will be described in detail with reference to (FIG. 10), (FIG. 11) and (FIG. 12).

When the pedestal level is used as the bias adjustment reference without superimposing BRP, the contrast and brightness are adjusted as shown in (FIG. 10) (a) (b) (c). (FIG. 11) shows that when the contrast is changed and the pedestal level is set to the reference potential when the contrast is changed, the hue changes at the final gradation of the staircase wave, as shown in FIG. 11A to FIG. It is a representation. The hue is determined by the brightness ratio of GBR, and the brightness ratio is proportional to the voltage ratio from the reference potential. (FIG. 11) In the upper stage, the voltage ratio from the clamp level, which is the reference potential, to the final stage of the staircase wave is, for example, VBG: VBB: VBR = 33: 2.
While it is 3:13, in the lower stage, the voltage ratio becomes, for example, VBG ′: VBB ′: VBR ′ = 18: 13: 8, and the hue changes. (FIG. 12) is a superposition of BRP pulses,
The case where the amplitude of the BRP pulse also changes with the change in the contrast amount is shown. Unlike (Fig. 11) (Fig. 12)
Then, even if the contrast changes from the upper stage to the lower stage, the voltage ratio between the reference potential of each GBR and the final stage of the staircase wave is, for example, VBG: VBB: VBR = VBG ': VBB': V
BR '= 13: 8: 3 does not change, and therefore hue does not change.

As described above, the two pulses of CTP and BRP are equally superposed on the blanking period of each of the G, B, and R video signals, and the pulses are detected from the video signal at the appropriate time.
By controlling the drive voltage and bias voltage of each R, the contrast, brightness, drive, and bias are controlled, and good white balance can be obtained without being influenced by the gradation of the image.

Next, the phase of the sampling pulse of the sample hold circuit will be described. In the configuration of this embodiment, there are a plurality of sample and hold circuits for monitoring the gain of the video signal and the fluctuation of the DC reproduction. Among them, the sample hold circuits 161 and 171 are sample hold circuits that detect the pedestal level of the video signal. Two sample hold circuits 16 for detecting this same level
The sampling pulses of 1,171 are shown in (FIG. 13).

FIG. 13A shows CTP, and FIG. 13B shows CTP when the video signal is viewed in the horizontal period.
13C is a sampling pulse of the sample hold circuit 161, and FIG. 13D is a sample hold circuit 1.
71 sampling pulses. (Fig. 13 (c)),
As shown in FIG. 13D, the sampling pulse timings of the sample hold circuit 161 and the sample hold circuit 171 for detecting the pedestal level of the same video signal are different.

The reason will be described with reference to FIG.
With an ideal sample-hold circuit or DC reproducing circuit, noise due to sampling pulses does not occur in the video signal as shown in FIG. 14A. Therefore, even if there are a plurality of sample and hold circuits that detect the same level, the timing of each sampling pulse does not matter. However, in the actual circuit (Fig.
(B)) and (FIG. 14 (c)), the video signal includes
Noise due to sampling pulses will be superimposed. Furthermore, if the timings of the two pedestal sample pulses are the same as in (FIG. 14B), the noise component superimposed at that position is further increased.

The sample / hold circuit 161 detects the amplitude of CTP together with the sample / hold circuit 162, and the control unit 11 controls the gain of the video signal based on the detected CTP amplitude. The larger the noise component, the larger the error that occurs in this gain control, resulting in a variation in chromaticity of the display image. Further, even if the characteristics of the sample hold circuit 171 unrelated to the gain control change and the noise component increases or decreases, the detected value of the sample hold circuit 161 changes, and the gain control also changes at this time, and the display image Changes in chromaticity.

Therefore, if the timings of the two sampling pulses are changed so that the sample pulses do not overlap each other as shown in FIG. 14 (c), the noise component is reduced, and the sample and hold circuits of each other are reduced. The influence from can be eliminated. As a result, it is possible to improve the detection accuracy of the sample hold circuit and reduce the chromaticity fluctuation of the display image.

As described above, in this embodiment, two direct current feedback control loops and one gain control feedback loop are used to monitor two test signals CTP and BRP to suppress fluctuations. GBR tracking can always be kept good. Further, by the two direct current reproduction feedback control loops, both fluctuations of the black level due to the change of the signal level of APL and the like and the fluctuations of the black level due to the change of the CRT characteristic can be suppressed, and a good black level can be reproduced.

Note that this embodiment is an example of a television receiver and does not limit the equipment in which this device is incorporated.
Also, the operation of the third feedback control loop has been described as clamping the pedestal level of the video signal, but another level may be set as the reference level of the video signal and the level may be clamped. .. Further, assuming that there is no gain fluctuation of the amplifier circuit 13, the same effect can be obtained even if the second feedback control loop is configured not by the output of the amplifier circuit 13 but by the output of the first DC regenerating unit 12. Is obtained.

Further, the operation of the superposing section 10 is controlled by the switch circuit 1
Although the superimposing method by switching the video signal and the test signal using 02 has been described, it goes without saying that the test signal may be superimposed on the video signal by, for example, a method of adding the test signal to the video signal or another method. .. Further, in the description of the operation of the first signal generator 16, the method of detecting the amplitude of CTP by using two sample hold circuits and one subtractor has been described, but the amplitude of CTP can be detected by any other method. Needless to say, may be detected.

[0043]

As described above, according to the present invention, two test signals for gain and direct current reproduction are superposed in the blanking period and compared with the reference signal to automatically perform contrast,
By controlling the drive, brightness, and bias to stabilize the video signal processing system, the white balance for each gradation can always be correct.

Further, in the present invention, the total frequency characteristics and dynamics of the system are improved by the two DC reproducing circuits, that is, the feedback clamp for holding the optimum bias of the operation of the amplifier circuit and the feedback clamp for adjusting the brightness of the video signal. The range can be improved. Further, in the present invention, since the cathode current is detected and controlled, it is possible to detect the characteristic change on the CRT side and automatically suppress the variation.

Further, in the present invention, the detection accuracy of each sample and hold circuit can be improved by preventing the timings of the sampling pulses of the plurality of sample and hold circuits from overlapping. Further, according to the present invention, the contrast relating to the gain of the video signal and the control of the drive are simultaneously performed to simplify the circuit configuration, so that the practical effect thereof is great.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of a video signal processing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a detailed configuration of a superimposing unit of the embodiment.

FIG. 3 is a block diagram showing a detailed configuration of a third feedback control loop of the embodiment.

FIG. 4 is a block diagram showing a detailed configuration of a second feedback control loop of the same embodiment.

FIG. 5 is a block diagram showing a detailed configuration of a first feedback control loop of the same embodiment.

FIG. 6 is an explanatory diagram showing the relationship between the input signal and the brightness of the output screen for explaining the operation of the embodiment.

FIG. 7 is an explanatory diagram of a drive and a bias for explaining the operation of the embodiment.

FIG. 8 is a waveform diagram of a video signal for explaining the operation of the embodiment.

FIG. 9A is a waveform diagram of each GBR of the CRT drive signal according to the same embodiment. FIG. 9B is a C diagram when the brightness is increased from the state of FIG. 9A.
Waveform chart of GBR of RT drive signal

10A is a waveform diagram of a video signal. FIG. 10B is a waveform diagram when the contrast of the video signal is increased from the state of FIG. Waveform diagram when raised

11A is a waveform diagram of a video signal based on a pedestal level, and FIG. 11B is a waveform diagram when the contrast is lower than that in the state of FIG.

FIG. 12A is a waveform diagram of a video signal based on the level of the peak value of BRP, and FIG. 12B is a waveform diagram when the contrast is lower than that in the state of FIG.

FIG. 13 is a timing chart of each pulse in the horizontal blanking period of the sample hold circuit.

FIG. 14A is an explanatory diagram of a sample timing in the sample hold circuit of the present invention. FIG. 14B is an explanatory diagram of the same sample timing. FIG. 14C is an explanatory diagram of the same sample timing.

FIG. 15 is a block diagram showing a configuration of a conventional video signal processing device.

FIG. 16 is a waveform diagram showing a video signal after the test signal is superimposed in the conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Superimposition part (superimposition means) 11 Gain control part (gain control means) 12 1st direct current reproduction | regeneration part (1st direct current reproduction | regeneration means) 13 Amplifier circuit 14 2nd direct current reproduction | regeneration part (2nd direct current reproduction | regeneration means) 15 Current detection unit (current detection unit) 16 First signal generation unit 17 Second signal generation unit 18 Generation unit (generation unit)

Claims (2)

[Claims] 1. A generating means for generating a first test signal for controlling the brightness of a display image and a second test signal for controlling the contrast of the display image, and the second means from the generating means. A superimposing means for superimposing two test signals in the blanking period of the video signal, and the amplitude of the second test signal output from the superimposing means is kept constant to control the amplitude of the video signal, thereby displaying a display image. , A feedback-type gain control means for controlling the contrast, a feedback-type first direct current regeneration means for performing direct current regeneration in a blanking period other than the two test signal superposition periods of the output of the gain control means, and the first A second direct current regenerating unit coupled to the output of the first direct current regenerating unit for performing direct current regeneration in a period in which the first test signal is superimposed; and an output from the second direct current regenerating unit is supplied to a load, Load current induced in the load Detects et the first test signal,
A video signal processing device, comprising: a current detecting means for returning to the second direct current reproducing means. 2. The gain control means, the first DC regenerating means and the current detecting means each have a plurality of sample and hold circuits, and the timings of the sampling pulses for controlling the respective sample and hold circuits do not overlap each other. The video signal processing device according to claim 1.