JPH0511271A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce wiring defects by suppressing defect generation due to a short circuit between electric conductors and also reducing the step disconnection of a source electric conductor and a drain electric conductor. CONSTITUTION:A picture element 12 and an electric conductor 7 for a holding capacitance are interposed between 1st and 2nd protection films 6, 13 and thus put in different level with a gate electrode 5 and the source and drain electric conductors 11, 10, and an insulating film 8 for the holding capacitance and the 2nd protection film 13 are left at the intersection part of the source electric conductor 11 and a gate electric conductor 5a, but the part on a TFT 15 is removed. At this time, at least the part at the position of a contact hole on the TFT 15 of the 1st protection film 5 covering a polycrystalline Si film 2 directly is removed shifting from the contact hole to prevent the short-circuiting and step disconnection of the electric conductors.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which constitutes an active matrix liquid crystal display element using a polycrystalline Si thin film transistor (hereinafter referred to as TFT) as a switching element for each pixel.

[0002]

2. Description of the Related Art FIG. 2 shows a sectional structure of a TFT used in a conventional active matrix liquid crystal display device disclosed in, for example, Japanese Patent Application Laid-Open No. 2-72392. 1
Is an insulating substrate using transparent glass or the like, 2 is polycrystalline Si
Reference numeral 3 denotes a film, 3 is a doped Si region which is formed by ion implantation or the like and which makes contact between metal and Si, and is doped with impurities, 4 is a gate insulating film formed on the polycrystalline Si film 2, and 5 is this gate insulating film. A gate electrode formed on the film 4,
6 is a protective film made of an insulating thin film formed so as to cover at least a part of the TFT 15 composed of the polycrystalline Si film 2, the gate insulating film 4, and the gate electrode 5, 7 is a storage capacitor wiring, and 8 is a storage capacitor. The insulating film for use is made of an insulating thin film formed to form the storage capacitor 16. Reference numeral 9 is a contact hole formed in the protective film 6 on the doped Si region 3 doped with impurities, 10 is a drain wiring, 11 is a source wiring, and 12 is a pixel electrode connected to the drain wiring 10. The equivalent circuit of an active matrix liquid crystal display device is as shown in FIG.
The TFT 15 is provided at the intersection of the source wiring 11 and the gate wiring 5a.
Has been added. The pixel electrode 12 and the storage capacitor 16 are connected to the drain side of the TFT 15.

Next, the operation will be described. The transistor operation is performed by changing the voltage applied to the gate electrode 5 so that the polycrystalline Si existing under the gate insulating film 4 is
This is achieved by changing the electric field applied to the inside of the film 2 and consequently controlling the current flowing between the source wiring 11 and the drain wiring 10 through the contact hole 9 and the doped Si region 3. Gate electrode 5 and source wiring 11
A voltage is applied to the TFT 15 to cause the TFT 15 to operate as a transistor, and the TFT 15 that functions as a switch is turned on to apply a voltage to the liquid crystal portion to change the liquid crystal molecule state and control the amount of transmitted light. The protective film 6 is a protective film for protecting the TFT 15 from external pollution and the like. The protective film 6 is also used as an interlayer insulating film at the intersection of the source wiring 11 and the gate wiring 5a. Storage capacity 16 shown in FIG.
Is formed by the storage capacitor wiring 7, the storage capacitor insulating film 8 and the pixel electrode 12. With this storage capacitor 16, the TFT
The load capacitance viewed from the 15 side is increased, the DC voltage component applied to the liquid crystal is reduced, and the problem of display characteristics such as afterimage is alleviated. The storage capacitor insulating film 8 is also used as an interlayer insulating film at the intersection of the source wiring 11 and the gate wiring 5a.
The drain wiring 10 is connected to the pixel electrode 12. The pixel electrode portion is formed of a transparent conductive film such as ITO, and has a role of applying a voltage to the liquid crystal and transmitting visible light.

[0004]

The conventional semiconductor device is configured as described above. At this time, as shown in FIG. 3, when attention is paid to the n-th TFT 15, the pixel electrode 12
Is on the same plane as the source wiring 11, so that if some defect occurs in the photolithography or etching process for pattern formation, the pixel electrode 12 is short-circuited with the adjacent (n + 1) th source wiring 11 to cause a display defect. There was a fear of becoming. In addition, the depth of the contact hole 9 becomes the sum of the film thickness of the protective film 6 and the film thickness of the storage capacitor insulating film 8, and becomes thicker. Therefore, when the source and drain electrodes are formed, the contact hole 9 is formed. It was easy for disconnection of the drain wiring 10 and the source wiring 11 to occur at the edge of. Further, as the drain and source wirings 10 and 11, for example, A
When 1 is used, an annealing treatment at 400 ° C. or higher is often performed after forming the source / drain wirings 11 and 10 in order to improve ohmic characteristics with the doped Si region 3. However, if the annealing treatment is performed at a temperature of about 400 ° C. or higher, the dangling bonds existing at the grain boundaries of the polycrystalline Si film 2 are terminated, and even if the hydrogenation treatment for improving the TFT characteristics is performed, the Si film remains in the Si film. This hydrogen is generally released. Therefore, it is necessary to perform the hydrogenation treatment after forming the source / drain wirings 11 and 10. However, for example, when the storage capacitor 16 is formed of SiN or the like having a high dielectric constant and a relatively high storage capacitance value, Si is also formed on the TFT 15.
Since the N film remains, the hydrogenation process becomes impossible after the storage capacitor insulating film 8 is formed because the diffusion coefficient of hydrogen in SiN is small, and the TFT characteristics are not as good as those after the hydrogenation process. There was a point.

The present invention has been made in order to solve the above problems, and suppresses the occurrence of defects due to short circuits between wirings, and reduces the disconnection of source wirings and drain wirings to reduce wiring defects. In addition, it is an object of the present invention to obtain a semiconductor device that can be hydrogenated even in a process as close to the final process as possible in the TFT manufacturing process.

[0006]

A semiconductor device according to the present invention has a plane different from that of a gate wiring and a source / drain wiring by sandwiching a pixel electrode and a storage capacitor wiring with first and second protective films. It was done. Further, the storage capacitor insulating film and the second protective film are left at least at the intersections of the source wiring and the gate wiring, but at least a part of the TFT is removed, and at this time, the first Si layer directly covering the polycrystalline Si film is removed. The contact hole pattern on the TFT of the protective film of FIG. 6 is one which is removed by shifting at least a part of the pattern position.

[0007]

In the present invention, the pixel electrode and the storage capacitor wiring are sandwiched by the first and second protective films, so that the surface is different from the gate wiring and the source / drain wiring. This prevents short circuit between the pixel electrode and the storage capacitor wiring and the gate wiring and the source / drain wiring. Further, the storage capacitor insulating film and the second protective film are left at least at the intersections of the source wiring and the gate wiring, but at least a part of the TFT is removed, and at this time, the first Si layer directly covering the polycrystalline Si film is removed. Since at least a part of the pattern position of the protective film is displaced from the contact hole pattern on the TFT, disconnection at the contact hole part of the source / drain wiring is prevented, and the storage capacitor insulating film and the second protective film are formed. As a result, even if a material such as SiN that does not easily diffuse hydrogen atoms is used, the hydrogenation treatment for improving the TFT characteristics can be performed in a step close to the final step of forming the TFT.

[0008]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, 1 is an insulating substrate made of glass or the like, 2 is a polycrystalline Si film, 3 is a doped Si region which is doped with impurities for contact between metal and Si formed by an ion implantation method or the like, and 4 is A gate insulating film formed on the polycrystalline Si film 2 is a gate electrode formed on the gate insulating film 4, 5a is a gate wiring connected to the gate electrode 5, and 6 is the polycrystalline Si. Thin film transistor 1 formed of film 2, gate insulating film 4 and gate electrode 5
5 and a first protective film made of an insulating thin film formed so as to cover the gate wiring 5a at least at the intersection of the gate wiring 5a and the source wiring 11, and SiO ₂ or SiO ₂
A film containing ₂ as a main component is used. Reference numeral 7 is a storage capacitor wiring, 8 is an insulating film formed on the storage capacitor wiring 7 to form the storage capacitor 16 while covering the gate wiring 5a at least at the intersection of the gate wiring 5a and the source wiring 11. Insulating film for storage capacitor consisting of thin film, Ta ₂ O ₅ ,
Si ₃ N ₄ , Al ₂ O ₃ , TiO or a film containing these as the main components is used. Reference numeral 9 is a contact hole formed on the doped Si region 3 in the first protective film 6.
Is a drain wiring, 11 is a source wiring, 12 is a pixel electrode connected to the drain wiring 10, 13 is the pixel electrode 12, and at least the intersection of the gate wiring 5a and the source wiring 11 covers the gate wiring 5a. Is a _second protective film formed on the surface of Ta ₂ O ₅ , Si ₃ N ₄ , A
L ₂ O ₃ , TiO, SiO ₂ or a film containing these as main components is used. Reference numeral 14 is a contact hole formed on the second protective film 13.

Next, the operation will be described. The transistor operation is performed by changing the voltage applied to the gate electrode 5 so that the polycrystalline Si existing under the gate insulating film 4 is
This is achieved by changing the electric field applied to the inside of the film 2 and consequently controlling the current flowing between the source wiring 11 and the drain wiring 10 through the doped Si region 3 and the contact hole 9. On the drain side of the TFT 15, a liquid crystal expressed as a capacitance in an equivalent circuit and a storage capacitor 16 are provided.
Are connected. A voltage is applied between the gate and the source / drain to cause the TFT 15 to operate as a transistor, and the current flowing through the TFT 15 that functions as a switch is controlled. Control.

The first protective film 6 is a protective film for protecting the TFT 15 portion from external contamination and the like. The first protective film 6 is also used as an interlayer insulating film at the intersection of the source wiring 11 and the gate wiring 5a. The first protective film 6 causes the storage capacitor wiring 7 to be formed on a layer different from the gate wiring 5a, so that the gate wiring 5a and the storage capacitor wiring 7 are short-circuited due to a defective patterning process or the like. Can be prevented.

The storage capacitor 16 shown in FIG. 3 is formed by the storage capacitor wiring 7 in FIG. 1, the storage capacitor insulating film 8 and the pixel electrode 12 made of a transparent conductive film such as ITO. The holding capacitance 16 increases the additional capacitance seen from the TFT 15 side, reduces the DC voltage component applied to the liquid crystal, and alleviates the problem of display characteristics such as an afterimage. In addition, the storage capacitor insulating film 8
Is also used as an interlayer insulating film at the intersection of the source wiring 11 and the gate wiring 5a.

The second protective film 13 is formed so as to cover the pixel electrode 12. As a result, the pixel electrode 12
Since it is formed on a layer different from the source wiring 11, it is possible to prevent the pixel electrode 12 and the source wiring 11 from being short-circuited due to a defective patterning process or the like. The second protective film 13 is also used as an interlayer insulating film between the source wiring 11 and the gate wiring 5a. Drain wiring 10
Are connected to the pixel electrode 12 through the contact hole 14. The pixel electrode portion is formed of a transparent conductive film such as ITO, and has a role of applying a voltage to the liquid crystal and transmitting visible light.

As shown in FIG. 1, the storage capacitor insulating film 8 is formed.
The second protective film 13 is patterned and removed so that at least a part of the TFT 15 does not overlap the underlying first insulating film 6 and at least a part of the pattern.
By doing so, when the source and drain electrodes are connected to the doped Si region 3 of the TFT 15, it is possible to reduce the possibility of defective pattern disconnection at the end of the insulating film.

Even if hydrogen permeable SiO ₂ is used as the first protective film 6, the storage capacitor insulating film 8 and the second protective film 13 have, for example, a relatively high dielectric constant and are not suitable for device fabrication. If SiN or the like, which has an advantage, is used, this film does not easily permeate hydrogen, and the hydrogen terminates dumbling bonds existing at grain boundaries of polycrystalline Si, etc.
It is difficult to perform hydrogenation treatment that improves FT characteristics by using hydrogen plasma or the like. For this reason, when the storage capacitor insulating film 8 made of SiN or the like remains on the TFT 15, it is necessary to perform a hydrogenation treatment before forming these films, and the hydrogen temperature is higher than about 300 ° C. Since the bond with Si is broken by the heat treatment of 1, the heat treatment at a temperature exceeding about 300 ° C. was difficult after the hydrogenation treatment. However, as shown in FIG.
If the upper storage capacitor insulating film 8 and the second protective film 13 are removed, hydrogenation after the formation of the source / drain wirings 11 and 10 becomes possible because there is no film such as SiN that does not permeate hydrogen on the TFT 15. The allowable temperature of the heat treatment process up to the formation of the source / drain wirings 11 and 10 can be widened. As a result, for example, after the source / drain wirings 11 and 10 are formed of Al, the
It became possible to perform heat treatment at about 50 ° C. Also,
In this structure, at the intersection of the gate line 5a and the source line 11, the first protective film 6, the storage capacitor insulating film 8, and the second
Since the protective film 13 of is inserted as an interlayer insulating film,
It is possible to prevent a short circuit between both.

(Embodiment 2) In the above-mentioned embodiment, at the intersection of the gate wiring 5a and the source wiring 11, all of the first protective film 6, the storage capacitor insulating film 8 and the second protective film 13 are interlayer insulating films. However, only one or two of them may be used as the interlayer insulating film.

(Embodiment 3) In the above embodiment, the storage capacitor wiring 7 was on the first protective film 6, but the first protective film 6 may not be provided below the storage capacitor wiring 7. .

[0017]

As described above, according to the present invention,
Since the pixel electrode and the storage capacitor electrode are configured to be sandwiched by the first and second protective films, a short circuit with a source wiring or a gate wiring can be prevented, and a high yield TFT.
An array is obtained. Further, since the protective film on the TFT and the insulating film for the storage capacitor are patterned and removed so as not to overlap with each other, the hydrogenation process can be performed in a step close to the final step of the TFT manufacturing process, and the allowable temperature range of the process is widened. At the same time, disconnection of the source / drain wiring can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part showing an embodiment of a semiconductor device of the present invention.

FIG. 2 is a sectional view of an essential part showing a conventional semiconductor device.

FIG. 3 is a plan view for explaining the configuration of an active matrix substrate.

[Explanation of symbols]

1 Insulating substrate 2 Polycrystalline Si film 3 Doped Si region 4 Gate insulation film 5 Gate electrode 5a gate wiring 6 First protective film 7 Storage capacitor wiring 8 Insulating film for storage capacitor 9 contact holes 10 Drain wiring 11 Source wiring 12 pixel electrodes 13 Second protective film 14 contact holes 15 Thin film transistor 16 holding capacity

Claims (5)

[Claims] 1. A polycrystalline Si film having gate wirings for a plurality of scanning lines and source wirings for a plurality of data lines intersecting with the gate wirings and connected to each intersection of the gate wirings and the source wirings. In a semiconductor device that constitutes an active matrix liquid crystal display element having a thin film transistor comprising, a pixel electrode connected to the thin film transistor, and a substrate having a storage capacitor, at least the thin film transistor formed on the thin film transistor and the intersection of the gate wiring and the source wiring. A first protective film made of an insulating thin film formed so as to cover the gate wiring of the portion, a storage capacitor electrode,
A storage capacitor insulating film formed to cover at least a part of the storage capacitor electrode and the gate wiring at the intersection, a pixel electrode made of a transparent conductive film formed on the storage capacitor insulating film, and at least the storage capacitor insulating film. A second protective film made of an insulating thin film formed so as to cover the pixel electrode and the gate wiring at the intersection, and a drain or a source of the thin film transistor through a contact hole on the first and second protective films. A semiconductor device having a drain wiring or a source wiring for connecting between the pixel electrodes. 2. SiO ₂ or Si as the first protective film
A film containing O ₂ as a main component is used, and Ta ₂ O ₅ , Si ₃ N ₄ , Al ₂ O ₃ , TiO, or a film containing these as a main component is used as the storage capacitor insulating film. The semiconductor device according to claim 1. 3. A storage capacitor insulating film is patterned so that at least a part of the storage capacitor insulating film does not overlap the pattern of the first protective film, and the storage capacitor insulating film is formed from at least a part of the thin film transistor. The semiconductor device according to claim 1, wherein the semiconductor device is removed. 4. Ta ₂ O ₅ , Si ₃ N as a _second protective film
_4. The semiconductor device according to claim 1, wherein ₄ , ₄ , Al ₂ O ₃ , TiO, SiO ₂ or a film containing them as a main component is used. 5. The second protective film is patterned so that at least part of the second protective film does not overlap with the patterns of the first protective film and the storage capacitor insulating film,
2. The second protective film is removed from at least a part of the region on the thin film transistor.
5. The semiconductor device according to any one of 4 to 4.