JPH05110269A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH05110269A JPH05110269A JP3272645A JP27264591A JPH05110269A JP H05110269 A JPH05110269 A JP H05110269A JP 3272645 A JP3272645 A JP 3272645A JP 27264591 A JP27264591 A JP 27264591A JP H05110269 A JPH05110269 A JP H05110269A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- case material
- case
- sealing member
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16151—Cap comprising an aperture, e.g. for pressure control, encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Casings For Electric Apparatus (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は混成集積回路に関し、特
に混成集積回路の封止構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly to a sealing structure for a hybrid integrated circuit.
【０００２】[0002]
【従来の技術】従来の混成集積回路は図２に示す如く、
所望の回路素子（１３）を固着搭載した混成集積回路基
板（１１）に接着樹脂（１２）により樹脂製のケース材
（１４）を接着して所望機能を有する混成集積回路が提
供されている。かかる、従来の混成集積回路では基板
（１１）とケース材との接着不良が数１０ＰＰｍ単位で
常時発生する。これは、接着樹脂として、エポキシ含浸
プリプレグシートを用いるために、熱硬化時において基
板（１１）とケース材（１４）で形成された空間内の圧
内が高くなり、その結果、溶融した接着樹脂（１２）に
き裂（１２Ａ）が生じ完全な接着が行えないということ
である（図３参照）。2. Description of the Related Art A conventional hybrid integrated circuit is as shown in FIG.
A hybrid integrated circuit having a desired function is provided by adhering a resin case material (14) with an adhesive resin (12) to a hybrid integrated circuit board (11) on which a desired circuit element (13) is fixedly mounted. In such a conventional hybrid integrated circuit, defective adhesion between the substrate (11) and the case material always occurs in units of several tens of PPm. This is because the epoxy-impregnated prepreg sheet is used as the adhesive resin, so that the pressure inside the space formed by the substrate (11) and the case material (14) during thermosetting becomes high, and as a result, the molten adhesive resin is melted. This means that cracks (12A) occur in (12) and perfect adhesion cannot be performed (see FIG. 3).
【０００３】そこで、本願出願人は、かかる問題を解決
するために、ケース材に孔を設けて、その孔を加熱ゴテ
を用いて封止蓋で封止するという出願をした（特開昭５
２−１０３６７７号公報参照）。In order to solve this problem, the applicant of the present application has filed an application in which a hole is formed in the case member and the hole is sealed with a sealing lid using a heating gote (Japanese Patent Laid-Open No. Sho 5).
2-103677).
【０００４】[0004]
【発明が解決しようとする課題】確かに、特開昭５２−
１０３６７７号公報の提案によれば基板とケース材との
接着性を確実に行うことはできる。しかしながら、加熱
ゴテで封止蓋を当接させなくてはならず、加熱時に封止
蓋の樹脂が溶けて加熱ゴテに付着し、封止蓋とケース材
とは接着するものの接着性の低下および外観不良となる
という新たな問題が発生した。Certainly, Japanese Patent Laid-Open No. 52-52
According to the proposal of Japanese Laid-Open Patent Publication No. 103677, it is possible to ensure the adhesiveness between the substrate and the case member. However, it is necessary to bring the sealing lid into contact with the heating iron, and the resin of the sealing lid melts and adheres to the heating iron during heating, and the sealing lid and the case material adhere to each other, but the adhesiveness decreases. There was a new problem of poor appearance.
【０００５】[0005]
【課題を解決するための手段】本発明は上述した課題に
鑑みて為されたものであり、ケース材に孔を設け、その
孔内に樹脂製の封止部材を配置し非接触状態で封止部材
および／あるいは、その周辺部を非結晶化状態にして孔
を封止したことを特徴とする。The present invention has been made in view of the above-mentioned problems, and a case member is provided with a hole, and a resin sealing member is arranged in the hole to seal the case member in a non-contact state. It is characterized in that the stopper member and / or its peripheral portion are made non-crystallized to seal the hole.
【０００６】[0006]
【作用】このように本発明に依れば、ケース材の孔に封
止部材を配置し、非接触状態で封止部材および／あるい
は、その周辺部を非結晶化状態にして孔を封止すること
により、外観形状を損なうことなくケース材と基板の接
着性を向上させることができる。As described above, according to the present invention, the sealing member is arranged in the hole of the case material, and the sealing member and / or its peripheral portion is made non-crystallized in a non-contact state to seal the hole. By doing so, the adhesiveness between the case material and the substrate can be improved without impairing the external shape.
【０００７】[0007]
【実施例】以下に図１に示した実施例に基づいて本発明
を説明する。混成集積回路基板（１）としては、セラミ
ックス、エポキシあるいは金属等の材質のものが使用さ
れ、ここでは絶縁処理が施されたアルミニウム基板が用
いられている。かかる、基板（１）上には絶縁樹脂層
（２）を介して銅等の材料により所望形状の導電路
（３）が形成される。EXAMPLES The present invention will be described below based on the example shown in FIG. As the hybrid integrated circuit board (1), a material such as ceramics, epoxy or metal is used, and an aluminum substrate subjected to an insulation treatment is used here. On the substrate (1), a conductive path (3) having a desired shape is formed of a material such as copper via the insulating resin layer (2).
【０００８】その導電路（３）上には、トランジスタ、
ＬＳＩチップ、チップ抵抗等の所定の回路機能を構成す
るための複数の回路素子（４）がろう材により接続され
ている。回路素子（４）はケース材（５）と基板（１）
とを接着することにより密封封止され外部から保護され
る。ケース材（５）は熱可塑性樹脂（結晶性エンジニア
リング・プラスチック）系の例えばＰＥＴ（商品名）、
ＰＢＴ（商品名）、ＰＰＳ（商品名）等の材料により、
所定の形状に射出成形される。ケース材（５）には、こ
の成形時に約０．５〜１．５ｍｍ径の孔（５Ａ）が形成
される。又、孔（５Ａ）はケース材（５）上面の任意の
位置に形成することが可能であるが、前述したように孔
（５Ａ）の径は比較的小さいために本実施例では、外部
リード端子の１番ピン部分上に形成されている。また、
本実施例で用いられるケース材（５）は、完全結晶化さ
れておらず、結晶化を最小限に抑えて、接着シートとの
接着を向上させる。On the conducting path (3), a transistor,
A plurality of circuit elements (4) for constituting a predetermined circuit function such as an LSI chip and a chip resistor are connected by a brazing material. Circuit element (4) is case material (5) and substrate (1)
By adhering and, they are hermetically sealed and protected from the outside. The case material (5) is made of thermoplastic resin (crystalline engineering plastic) such as PET (trade name),
With materials such as PBT (trade name) and PPS (trade name),
It is injection molded into a predetermined shape. A hole (5A) having a diameter of about 0.5 to 1.5 mm is formed in the case material (5) during this molding. Further, the hole (5A) can be formed at an arbitrary position on the upper surface of the case member (5). However, since the diameter of the hole (5A) is relatively small as described above, the external lead is used in this embodiment. It is formed on the first pin portion of the terminal. Also,
The case material (5) used in this example is not completely crystallized, and minimizes crystallization to improve adhesion with the adhesive sheet.
【０００９】基板（１）とケース材（５）は接着性シー
トを介して配置される。接着性シートは、ポリエステル
不織布からなるベース基材にＢステージ状態のエポキシ
樹脂が含浸されたものである。接着性シートを加熱処理
するとＢステージ状態のエポキシ樹脂が溶け出し基板
（１）とケース材（５）とを接着する接着樹脂（６）と
なる。The substrate (1) and the case material (5) are arranged via an adhesive sheet. The adhesive sheet is obtained by impregnating a base substrate made of a polyester nonwoven fabric with an epoxy resin in a B stage state. When the adhesive sheet is heat-treated, the epoxy resin in the B stage is melted out and becomes an adhesive resin (6) for bonding the substrate (1) and the case material (5).
【００１０】基板（１）とケース材（５）とを接着する
際、ケース材（５）の孔（５Ａ）があるためにケース材
（５）内の熱膨張した空気は外部に逃すことができ、そ
の結果、基板（１）とケース材（５）とを接着する際、
接着性シートにき裂が生じることはない。ところで、基
板（１）とケース材（５）を加熱処理により接着すれ
ば、ケース材（５）は完全結晶化状態になり、エポキシ
等の接着剤で孔を封止することは不可能となる。When the substrate (1) and the case member (5) are bonded together, the thermally expanded air in the case member (5) can escape to the outside because of the hole (5A) in the case member (5). As a result, when the substrate (1) and the case material (5) are bonded,
The adhesive sheet does not crack. By the way, if the substrate (1) and the case material (5) are bonded by heat treatment, the case material (5) will be in a completely crystallized state, and it will be impossible to seal the holes with an adhesive such as epoxy. .
【００１１】基板（１）とケース材（５）を接着した
後、ケース材（５）の孔（５Ａ）内にケース材（５）と
同一材料からなる封止部材（５Ｂ）を挿入配置する。封
止部材（５Ｂ）および／あるいは、その周辺部を局所的
にレーザービーム等の光ビームを射照し、加熱処理時に
完全結晶化されたものを非結晶化状態に戻してケース材
（５）の孔（５Ａ）を封止部材（５Ｂ）で完全封止す
る。After bonding the substrate (1) and the case material (5), a sealing member (5B) made of the same material as the case material (5) is inserted and arranged in the hole (5A) of the case material (5). . The sealing member (5B) and / or its peripheral portion is locally irradiated with a light beam such as a laser beam, and the completely crystallized one is returned to the non-crystallized state at the time of the heat treatment to form the case member (5). The hole (5A) is completely sealed with the sealing member (5B).
【００１２】この際、ケース材（５）の孔（５Ａ）の周
辺を非結晶化するためにはケース材の材料の融点以上に
加熱すれば、前述したように完全結晶化状態を非結晶化
状態に戻すことができる。また、光ビームとして、具体
的にはＹＡＧレーザ等のレーザの出力を２００Ｗで約
０．１秒照射すれば孔（５Ａ）を封止することができ
る。At this time, in order to non-crystallize the periphery of the hole (5A) of the case material (5), if it is heated above the melting point of the material of the case material, the fully crystallized state becomes non-crystallized as described above. Can be returned to the state. Further, the hole (5A) can be sealed by irradiating the output of a laser such as a YAG laser at 200 W for about 0.1 seconds as the light beam.
【００１３】本実施例ではケース材（５）の材料として
ＰＥＴを用いたが、耐湿性を更に向上させる場合にはＰ
ＰＳを用いれば耐湿性の優れた混成集積回路を提供する
ことができる。In this embodiment, PET is used as the material of the case material (5), but if the moisture resistance is further improved, P is used.
If PS is used, a hybrid integrated circuit having excellent moisture resistance can be provided.
【００１４】[0014]
【発明の効果】以上に詳述した如く、本実施例に依れ
ば、ケース材の孔に封止部材を配置し、非接触状態で封
止部材および／あるいは、その周辺部を非結晶化状態に
して孔を封止することにより、外観形状を損なうことな
く完全な接着が行える。その結果、従来発生していた数
１０ＰＰｍの不良率を略ゼロに近い数値まで改善するこ
とができた。As described above in detail, according to the present embodiment, the sealing member is arranged in the hole of the case material, and the sealing member and / or its peripheral portion are non-crystallized in a non-contact state. By sealing the holes in this state, complete bonding can be performed without impairing the external shape. As a result, the defect rate of several tens of PPm, which has occurred conventionally, can be improved to a value close to zero.
【図１】図１は本発明の混成集積回路を示す断面図であ
る。FIG. 1 is a cross-sectional view showing a hybrid integrated circuit of the present invention.
【図２】図２は従来の混成集積回路を示す断面図であ
る。FIG. 2 is a cross-sectional view showing a conventional hybrid integrated circuit.
【図３】図３は接着性シートの平面図である。FIG. 3 is a plan view of the adhesive sheet.
（１） 混成集積回路基板 （２） 絶縁樹脂層 （３） 導電路 （４） 回路素子 （５） ケース材 （５Ａ） 孔 （５Ｂ） 封止部材 （６） 接着樹脂 (1) Hybrid integrated circuit board (2) Insulating resin layer (3) Conductive path (4) Circuit element (5) Case material (5A) Hole (5B) Sealing member (6) Adhesive resin
Claims (2)
記導電路上に複数の回路素子が接続された混成集積回路
基板と、前記基板と一体化され前記回路素子を密封封止
する樹脂製のケース材と、加熱処理により前記基板と前
記ケース材とを固着させる接着剤とを具備し、 前記ケース材の所定位置に加熱処理時にケース材内圧を
抑制する孔を設け、前記孔内に樹脂製の封止部材を挿入
し、非接触状態で前記封止部材および／あるいはその周
辺部を非結晶化状態にして前記孔を封止したことを特徴
とする混成集積回路。1. A hybrid integrated circuit board in which a conductive path having a desired shape is formed on a substrate and a plurality of circuit elements are connected to the conductive path, and a resin which is integrated with the board and hermetically seals the circuit element. Of the case material and an adhesive for fixing the substrate and the case material to each other by heat treatment, and a hole for suppressing internal pressure of the case material at the time of heat treatment is provided at a predetermined position of the case material, and a resin is provided in the hole. A hybrid integrated circuit, characterized in that a sealing member made of silicon is inserted, the sealing member and / or its peripheral portion are made non-crystallized in a non-contact state to seal the hole.
ＰＢＴ及びＰＰＳ等の熱可塑性樹脂で形成されたことを
特徴とする請求項１記載の混成集積回路。2. The case member and the sealing member are made of PET,
The hybrid integrated circuit according to claim 1, wherein the hybrid integrated circuit is formed of a thermoplastic resin such as PBT or PPS.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3272645A JPH05110269A (en) | 1991-10-21 | 1991-10-21 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3272645A JPH05110269A (en) | 1991-10-21 | 1991-10-21 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05110269A true JPH05110269A (en) | 1993-04-30 |
Family
ID=17516812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3272645A Pending JPH05110269A (en) | 1991-10-21 | 1991-10-21 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05110269A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100439053B1 (en) * | 1995-01-31 | 2004-08-25 | 오므론 가부시키가이샤 | Transaction processing device |
-
1991
- 1991-10-21 JP JP3272645A patent/JPH05110269A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100439053B1 (en) * | 1995-01-31 | 2004-08-25 | 오므론 가부시키가이샤 | Transaction processing device |
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