JPH05108374A - Multitask execution device - Google Patents

Abstract

PURPOSE:To restrain the overhead due to register saving at the generation of a system call, interrupt, and exception by effectively using a free register bank. CONSTITUTION:A stack pointer 2 corresponding to a register file 1 and a privileged flag 3 indicating a privileged/user state are prepared. In the case of the generation of a system call, interrupt, and exception, the privileged flag 3 is set and a bit search circuit 9 is started. A zero-cleared bit is retrieved in a schedule bank register 10, and a register bank executing the system call, interrupt, and exception is detected. The privileged flag 3 corresponding to the execution bank register 11 is set to '1' to be a privileged state. The retrieved register bank number is written in an execution bank register 11, and the switching of the register bank and the execution of the privileged task are performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multitasking system having a memory protection function that performs scheduling by hardware and performs context switching at high speed when an interrupt / exception process or a system call occurs during multitasking execution. It relates to an execution device.

[0002]

2. Description of the Related Art Conventionally, a register bank is assigned to execute a processing program when an interrupt / exception processing or a system call occurs during task execution in multitask processing. At this time, the register bank to be allocated is a specific one, and even if the program to be executed is only preprocessing, it is necessary to execute the program and inevitably register it to activate the operating system (hereinafter OS). I had assigned a bank. Interrupt / exception processing occurs asynchronously with the program being executed, and a new interrupt / exception processing task is added to the currently executing task group.
One register bank needs to be released.

On the other hand, the system call processing occurs in synchronization with the program being executed, and scheduling and input / output control are performed in relation to the currently executing task. Can be considered as part of a series of processes. Therefore, in the case of a system call, by continuously executing the system call processing in the register bank that issued the system call, it is not necessary to allocate a new register bank, but the system call is uniformly distributed by a constant register bank. I was accepting.

For this reason, two register banks are used in a series of task processing, and there is no judgment as to whether or not a past task has been assigned to the register bank to be executed when interrupt / exception processing or a system call is accepted. In addition, the program information was always saved in the memory space (hereinafter referred to as the stack area). Therefore, it takes time to switch the context.

In interrupt / exception processing, there are many systems in which the processing priority level can be set on a program. Therefore, even if a plurality of interrupt / exception processing occur or a plurality of tasks occur. Since it is possible to intensively execute interrupt / exception processing with a high priority, one interrupt / exception processing monopolizes the CPU and a means for executing the processing early is considered. However, even though most of the system call processing can be executed concurrently with other tasks, the system call processing priority level cannot be determined when the system call is issued, and the system call that occurred first The system takes measures to accept the priority again, and it is not possible to accept multiple system calls.

FIG. 5 is a diagram showing an embodiment of conventional register bank allocation in the case of system call / interrupt generation. Register bank 0 (register bank is referred to as bank in the figure) is a privilege bank, and is a register bank in which a privileged program for executing system control is executed. The register banks 1, 2, and 3 are register banks that execute a user program generated by executing an application program or a privileged program. Horizontal axis (X
(Axis) is time.

In the user register bank 1, a system call is issued and a privileged program is executed. At this time, since the privileged program is executed by the register bank 0, it is necessary to save the program information such as the instruction pointer of the program executed in the register bank 0 in the stack space. After receiving the system call issued by the register bank 1 in the register bank 0 and saving the program information, the system call process is executed.

Next, when a system call is issued in the register bank 2, as in the case of the register bank 1, after the system call is issued by the register bank 2 in the register bank 0 to save the program information, System call processing is executed. Next, when an interrupt occurs during execution of a task in the register bank 3, the program information in the register bank 0 is saved, and then the interrupt process is executed in the register bank 0.

As described above, when the system call process / interrupt process is executed, the contents are always saved in the privilege register bank before the process is executed, which causes an overhead. In particular, when saving the contents of a register bank, in general, not only the contents of all the registers are saved, but only the necessary registers are saved, so it takes time to perform software processing to determine which register is necessary. It was

Further, in the case of a system call, the issued register bank is placed in a task execution wait state and is not released (operated) until the system call process is executed. Therefore, depending on the contents of the system call, it can be processed by one register bank. Nevertheless, since it requires multiple banks, it requires hardware resources. Also, 1
When processing with one register bank, it is necessary to perform software processing for task execution wait and to switch the system privilege / user state. When performing multitask execution of privileged tasks and user tasks, hardware support is not available. Not so, the software processing was enormous.

On the other hand, the simplest form of the memory protection function is the state of the user who is executing the user task and the OS.
A system having a privileged state that is executing is conventionally considered, and it is possible to switch between a user state and a privileged state by a flag. However, in the conventional system, only one flag is provided in the system, and in order to execute the user task and the privileged task in parallel, it is necessary to switch this flag, and the multitasking of the user task and the privileged task is required. Was difficult. In order to solve this problem, it is considered to distribute the register bank to the privilege bank or the user bank and execute the task, but the number of privileged tasks and user tasks is not fixed and the system applicability is poor. ..

Also, the lower limit and the upper limit of the data memory space are shown, and when the outside of the area is accessed, the access is prohibited (mainly writing) and the memory pointer for setting the area for operating the protection function between the register banks is mounted. As a form, one having one set for a user task and one set for a privileged task is considered. When performing a procedure call with a single task, the memory protection function can be operated if there is one set of pointers, but when executing multiple independent tasks, the data area must be changed according to the task. Yes, it was very difficult to change the pointer each time in context. In order to solve this problem, means for providing one set of pointers for each register bank has been considered. However, when user tasks and privileged tasks coexist, the data areas used for the user state and privileged state are different, so it is necessary to change the pointers in the same way, which complicates software processing. ..

[0013]

In the structure of such a conventional multi-task execution device, there is always a save process to the register bank or program information stack area at the time of interrupt / exception process or system call process. Therefore, (saving time) ≥ (registers that should be saved) ÷
(Bus width) x (machine cycle time) is required, and it takes time to context switch. Also, when user protection and privileged tasks coexist, when the memory protection function is operated, it is necessary to change the pointer for area setting at the time of context switching.

The present invention solves the above problem. In the case of a system call / interrupt / exception occurrence, by effectively using an empty register bank, the overhead due to register saving can be suppressed and a context switch can be executed at high speed. It is intended to provide a task execution device.

[0015]

In order to solve the above-mentioned problems, the multitasking execution device of the present invention comprises: (1) a flag () indicating whether the register bank being executed is in the user state or in the privileged state. Each register bank is provided with the following (privilege flag), and (2) when a system call / interrupt / exception is issued, if there is an empty register bank, the privilege flag of the empty register bank is set to the privileged state, and System call with empty register bank
When an interrupt / exception is accepted and (3) a system call is issued, and there is no empty register bank, the privilege flag of the register bank that issued the system call is set to the privileged state, and the register bank that issued the system call Accepts a system call, and (4) sets the privilege flag of a specific register bank to the privileged state when an empty register bank does not exist when an interrupt or exception occurs, and interrupts / exceptions occur in that specific register bank. Further, (5) at the same time as switching the privilege flag, each register bank can change the data RAM space that can be used in the user state / privileged state, and the above functions are realized by hardware.

[0016]

With this configuration, it is possible to minimize the overhead generated during system call / interrupt / exception processing in the execution of multitask processing, and to operate the memory protection function.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a multitask execution device according to an embodiment of the present invention. In FIG. 1, the register file 1 is 8 of register banks 0-7.
Data R consisting of one sheet and corresponding to each register bank
A stack pointer 2 indicating the pointer of the stack space on the AM 16 is prepared. Further, a privilege flag 3 indicating whether the currently executing task (program) is a privileged task or a user task is provided corresponding to each register bank. The register file 1, stack pointer 2, and privilege flag 3 are connected to the bus 4 and can be accessed by a program.

When the information in the ROM 5 is a system call instruction decoded and executed by the micro ROM 6 (hereinafter referred to as μROM), it is input to the OR circuit 8 having the other as the interrupt / exception input 7. The OR circuit 8 becomes active when an interrupt / exception occurs or when there is a system call, and the output signal is a bit search circuit 9 and a privilege flag 3.
Entered in. When the output signal of the OR circuit 8 is input to the privilege flag 3, the privilege flag 3 corresponding to the executing bank register 11 indicating the currently executing task is set to "1", and the privileged state is set.

The schedule bank register 10 is a register that determines which register bank of the register file 1 is used to execute a task, and which privilege bank is used in advance to process a task group (not shown) by a privileged program. Register what you want to do. Each bit of the schedule bank register 10 corresponds to each register bank of the register file 1, and "1" is set to the bit corresponding to the register bank to be executed. The bit search circuit 9 searches the schedule bank register 10 for the bit cleared to "0". The retrieved register bank number is written into the executing bank register 11.

When task scheduling is performed by the OS, the register bank to be used can be selected by changing the contents of the executing bank register 11. In the search operation by the bit search circuit 9, the search is started from the register bank currently being executed which is indicated by the executing bank register 11 (not shown), and the result of the search by the bit searching circuit 9 and the contents of the executing bank register 11 are executed. Are matched by exclusive NOR12. Exclusive NOR12
Is activated when there is no free register bank.

The signal whose timing is adjusted by the delay circuit 13 after the detection operation of the bit search circuit 9 is sent to the μROM 6 and A
It is input to the ND circuit 15. The μROM 6 receives the output of the delay circuit 13, that is, when a system call / interrupt / exception occurs, and when there is no empty register bank, the μROM 6 saves program information to the stack space. The register bank in which the save processing is executed is indicated by the executing bank register 11.

On the other hand, the interrupt / exception input 7 is input to the delay circuit 14, synchronized with the output timing of the delay circuit 13, and input to the AND circuit 15. The AND circuit 15 is activated when there is no empty register bank when an interrupt occurs, and is used to reset the contents of the bank register 11 during execution.

When a system call / interrupt / exception process is generated by the above configuration and an empty register bank exists, the processing program is executed in the register bank detected by the bit search circuit 9 without saving processing, and the empty register bank is executed. If is not present, in the case of a system call, the interrupt /
When exception processing occurs, the processing program is executed in a specific register bank.

In this way, when there is an empty register bank, there is no save processing to the stack space, and the overhead can be minimized. If there is no empty register bank, the system call is accepted by the register bank that issued the system call, so there is no need to stop and process other tasks. In the exception processing, the processing is executed in a specific register bank. Therefore, by setting the register bank to be executed at the time of reset start as this specific register bank, task management becomes easy when restart processing is required. Further, by providing a privilege flag in each register file, it is possible to execute even a plurality of privileged tasks or user tasks or a mixture of both tasks, thereby providing flexibility in system design.

FIG. 2 is a diagram showing register bank allocation of the matil task execution device according to one embodiment of the present invention. This is a case where the register banks 0, 1, 2, 3 are used as user tasks. When register banks 0 to 3 are used as user tasks, there are register banks 4, 5, 6, and 7 as empty register banks. When a system call is issued in register bank 1 (bank 1 in the figure), register banks 0, 1, 2, and 3 are assigned tasks, so register bank 4 is selected as the system call processing bank. At this time, since no task has been executed in the past in the register bank 4, there is no program information to be saved and the system call process is executed without saving operation to the stack space.

Similarly, when issuing a system call in the register bank 2, the register bank 4 is selected as the processing bank, and the system call process is executed without saving the stack space. Even if an interrupt occurs during execution of a task in the register bank 3, the interrupt process is assigned to the empty register bank 4, and the interrupt process is executed in the register bank 4 without the save process.

In this embodiment, in the register bank 4,
The figure shows the case where the processing task is completed by the system call processing or the interrupt / exception processing execution. When the processing task is continuously executed in the register bank 4,
The system call / interrupt / exception processing which occurs in multiples is executed in the register bank 5 which is an empty bank. When a system call or interrupt / exception process occurs, the privilege flag is set to the privilege mode, and the environment in which the privilege program is executed is set by the hardware.

FIG. 3 is a diagram showing register bank allocation of a multitask execution device according to another embodiment of the present invention.
When register banks 0 to 7 are used as user tasks, there are no empty register banks. When a system call is issued in the register bank 1 (bank 1 in the figure), since there is no empty register bank, the register bank 1 that issued the system call is selected as the system call processing bank. At this time, the program information of the register bank 1 is saved in the stack space, and then the system call process is executed. Register bank 2
Similarly, in issuing the system call, the register bank 2 is selected as the processing bank, and the system call processing is executed after saving to the stack space.

As described above, although the saving operation exists, the operation of saving the program information by interrupting the task of the register bank unrelated to the issuance of the system call is eliminated.
Software scheduling is also simplified.

If an interrupt occurs during execution of a task in the register bank 3, since there is no empty bank, the interrupt process is assigned to the register bank 0, and after the saving process, the interrupt process is executed in the register bank 0.

In the present embodiment, there is an interrupt operation, and there is an overhead due to saving of program information, but software for task priority judgment such as which task is interrupted to newly execute a system call / interrupt / exception processing task. Since processing is unnecessary, processing is simplified and real-time processing is possible.

FIG. 4 is a block diagram showing the memory protection function of the multitask execution device of one embodiment of the present invention. Register bank 0 memory area upper limit register (hereinafter referred to as bank 0 area upper limit register) 18, register bank 0 memory area lower limit register (hereinafter referred to as bank 0 area lower limit register) 19 corresponding to register bank 0 (not shown) is user It is an address pointer register that indicates the upper limit address and the lower limit address of the data RAM 17 used when the task executes the program using the register bank 0. When the register bank 0 is used in the user state, the program indicates the upper limit address. An error will occur if the write memory is accessed beyond the lower limit address range. The bank 0 area upper limit register 18 and the bank 0 area lower limit register 19 can be set to arbitrary values by a program.

A privilege flag 20 indicating whether the program is currently being executed is a privileged state or a user state is "0", and an executing bank register 21 indicating a register bank number currently being executed when the user state is "000". When the register bank 0 is indicated by, the AND circuit 22 causes the bank 0 area upper limit register 18 and the bank 0 area lower limit register 19
Is selected and the memory protection unit 23 executes the check operation at the time of write memory access.

The memory protection unit 23 stores data R on the system.
Upper limit address 24 of AM area, data RAM on system
Area lower limit address 25, multiplexer value 26 of area setting register of each register bank (value of execution register bank such as bank 0 area upper limit register 18 and bank 0 area lower limit register 19, described later), privilege flag 20 value 27, write A memory access signal (not shown) is input and area determination is executed. When the privilege flag 20 is “1” and in the privileged state, the memory protection unit 23 is irrespective of the register bank being executed.
Does not operate, and the entire area of the data RAM 17 can be accessed for writing memory.

Bank 1 area upper limit register 28 and bank 1 area lower limit register 29 for register bank 1, bank 2 area upper limit register 30 and bank 2 area lower limit register 31 for register bank 2, bank 3 area upper limit for register bank 3 Register 32 and bank 3 area lower limit register 33, register bank 4 bank 4 area upper limit register 34 and bank 4 area lower limit register 35, register bank 5 bank 5 area upper limit register 36 and bank 5 area lower limit register 37, register bank A bank 6 area upper limit register 38 and a bank 7 area lower limit register 39 for 6 and a bank 7 area upper limit register 40 and a bank 7 area lower limit register 41 for register bank 7 are prepared. The area lower limit register 19 and the operation specifications are the same. Privilege flag 20
The data RAM used by each program can be protected by switching the usable area for each of the register bank for privilege and for user, and the destruction of user data and privilege data by the user program can be prevented. It can be easily avoided.

[0036]

As described above, according to the present invention, it is possible to execute a system call / interrupt / exception processing program in an empty register bank during execution of multitask processing, and it is possible to minimize overhead.
Further, even if there is no empty register bank, the program can be executed without lowering the throughput of the program currently being executed. Further, the data RAM area executed by each program can be protected, and particularly, the memory area of the privileged task and the user task area can be changed by switching the flag, so that a system of high quality and excellent in real time can be realized. it can.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a multitask execution device according to an exemplary embodiment of the present invention.

FIG. 2 is a diagram showing register bank allocation when an empty register bank exists in the multitask execution device of one embodiment of the present invention.

FIG. 3 is a diagram showing register bank allocation when there is no empty register bank in the multitask execution device of one embodiment of the present invention.

FIG. 4 is a block diagram showing a memory protection function in a multitask execution device according to an embodiment of the present invention.

FIG. 5 is a diagram showing an example of register bank allocation in the case of conventional system call / interrupt generation.

[Explanation of symbols]

1 register file 2 stack pointer 3,20 privilege flag 5 ROM 6 micro ROM 7 interrupt / exception input 9 bit search circuit 10 schedule bank register 11,21 executing bank register 13,14 delay circuit 16,17 data RAM 18 register bank 0 Memory area upper limit register 19 Register bank 0 memory area lower limit register 23 Memory protector 24 System data RAM area upper limit address 25 System data RAM area lower limit address 26 Register bank area setting register multiplexer value 27 Privilege Value of flag 28 28,30,32,34,36,38,40 Memory area upper limit register for each register bank 29,31,33,35,37,39,41 Memory area lower limit register for each register bank

Claims (3)

[Claims] 1. A memory bank comprising a plurality of register banks and having a two-level memory protection function of a user state and a privileged state, a CPU selects one of the plurality of register banks to execute a program, and the program is being executed. Has a flag indicating whether the register bank is in the user state or the privileged state in correspondence with each of the register banks, and at the time of issuing a system call, (1) If there is a free register bank, the empty The flag of the register bank is set to the privileged state, and the system call is accepted by the empty register bank without executing the save processing to the stack area. (2) When the empty register bank does not exist, the system call is issued. Set the issued flag of the register bank to the privileged state and save to the stack area First means for accepting a system call in the register bank that issued the system call after executing the process, and (3) when an empty register bank exists, the flag of the empty register bank Is set to a privileged state, and interrupt / exception processing is accepted in the empty register bank without executing save processing to the stack area. (4) When there is no empty register bank, the specified register bank Set the flag to privileged state,
And a second means for accepting interrupt / exception processing in the specific register bank after executing the saving processing to the stack area. 2. A memory bank composed of a plurality of register banks and having a two-level memory protection function of a user state and a privileged state, the CPU selects one of the plurality of register banks and executes a program, and the program is being executed. Has a flag indicating whether the register bank is in the user state or the privileged state in correspondence with each of the register banks, and at the time of issuing a system call, (1) If there is a free register bank, the empty The flag of the register bank is set to the privileged state, and the system call is accepted by the empty register bank without executing the save processing to the stack area. (2) When the empty register bank does not exist, the system call is issued. Set the issued flag of the register bank to the privileged state and save to the stack area First means for accepting a system call in the register bank that issued the system call after executing the process, and (3) when an empty register bank exists, the flag of the empty register bank Is set to a privileged state, and interrupt / exception processing is accepted in the empty register bank without executing save processing to the stack area. (4) When there is no empty register bank, the specified register bank Set the flag to privileged state,
In addition, after executing the save processing to the stack area, second means for accepting the interrupt / exception processing in the specific register bank, the stack pointer in each of the register banks, and the save processing in the stack area And a third means for executing the save processing by using a stack pointer corresponding to a register bank for executing interrupt / exception processing, a system call or a procedure call, and a multitask execution device. 3. A memory bank composed of a plurality of register banks and having a two-level memory protection function of a user state and a privileged state, and a CPU selects one of the plurality of register banks to execute a program and is executing the program. An area indicating the range of the data RAM space used during execution of each register bank, having a flag indicating whether the register bank is in the user state or the privileged state in correspondence with each of the register banks. Two pointers indicating the lower limit and the upper limit of the data RAM space are provided for each register bank as setting pointers, and in the user state, memory protection is performed using the two pointers corresponding to the register bank being executed. The first means for executing, and in the privileged state, the entire data RAM space regardless of the register bank being executed. 2. The multitask execution device according to claim 1, further comprising a second means capable of using a range of the area, wherein the data RAM space to be used can be changed by the flag set for each register file. ..