JPH05102807A - Comparator - Google Patents

Comparator

Info

Publication number
JPH05102807A
JPH05102807A JP25899291A JP25899291A JPH05102807A JP H05102807 A JPH05102807 A JP H05102807A JP 25899291 A JP25899291 A JP 25899291A JP 25899291 A JP25899291 A JP 25899291A JP H05102807 A JPH05102807 A JP H05102807A
Authority
JP
Japan
Prior art keywords
current
constant
comparator
source
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25899291A
Other languages
Japanese (ja)
Inventor
Michio Yotsuyanagi
道夫 四柳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25899291A priority Critical patent/JPH05102807A/en
Publication of JPH05102807A publication Critical patent/JPH05102807A/en
Pending legal-status Critical Current

Links

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To provide the comparator comparing an input current with a reference current and outputting the result of deciding the quantity. CONSTITUTION:A constant current source 3 supplying a current I1 proportional to an input current Iin and a constant current source 4 supplying a reference current Ir are connected in series with resistive loads R1, R2 and the comparison between the input current Iin and the reference current Ir is implemented by comparing voltage drops across the two resistors. The power consumption is reduced by supplying a current as required by inserting switches 9, 10 in series between the constant current source 3 and the resistive load R1 and between the constant current source 4 and the resistive load R2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は比較器に関し、特に、入
力電流と参照電流とを比較してその大小関係を判定する
比較器に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a comparator, and more particularly to a comparator that compares an input current and a reference current to determine the magnitude relationship.

【0002】[0002]

【従来の技術】従来、比較器としては、入力電圧と参照
電圧とを比較しその大小関係を判定する、電圧比較器が
一般的である。このような従来の比較器の一例の回路図
を図5に示す。この比較器は、アイイーイーイー・ジャ
ーナル・オブ・ソリッドステート・サーキッツ(IEE
E Journal of Solid−stateC
ircuits),第SC−20,1985年,第3
号,第775頁に記載されているものである。
2. Description of the Related Art Conventionally, as a comparator, a voltage comparator is generally used which compares an input voltage with a reference voltage and judges the magnitude relation. A circuit diagram of an example of such a conventional comparator is shown in FIG. This comparator is based on the IE Journal of Solid State Circuits (IEEE).
E Journal of Solid-stateC
ircuits), SC-20, 1985, 3rd.
No., page 775.

【0003】この比較器は、入力電圧と参照電圧との大
小関係を比較して入力電圧の方が大きければ、出力Qと
してQ=“1”を出力し、参照電圧の方が大きければ出
力Q=“0”を出力する比較器である。この比較器は、
アナログ入力電圧と参照電圧との差を増幅する差動増幅
器と、2入力の大小関係を判定する比較部とから構成さ
れ、次のような動作をする。まず、差動増幅器は差動入
力端に印加された入力電圧と参照電圧の差を増幅して差
動信号の形で次段の比較部に伝達する。比較部では伝達
された差動信号の大小関係に応じて、図中のV1 がV2
よりも小さければデジタル出力として“1”を出力し、
1 がV2 よりも大きければ“0”を出力する。したが
って、この比較器は入力電圧が参照電圧よりも大きけれ
ば“1”を、入力電圧が参照電圧よりも小さければ
“0”を出力する比較器である。
This comparator compares the magnitude relationship between the input voltage and the reference voltage, and outputs Q = "1" as the output Q when the input voltage is larger, and outputs Q when the reference voltage is larger. This is a comparator that outputs = “0”. This comparator is
The differential amplifier that amplifies the difference between the analog input voltage and the reference voltage and the comparison unit that determines the magnitude relationship between the two inputs perform the following operation. First, the differential amplifier amplifies the difference between the input voltage applied to the differential input terminal and the reference voltage and transmits the amplified differential signal to the comparison unit in the next stage. In the comparison section, V 1 in the figure is changed to V 2 in accordance with the magnitude relation of the transmitted differential signals
If it is smaller than, output "1" as digital output,
If V 1 is larger than V 2 , “0” is output. Therefore, this comparator is a comparator that outputs "1" when the input voltage is higher than the reference voltage and outputs "0" when the input voltage is lower than the reference voltage.

【0004】[0004]

【発明が解決しようとする課題】従来のように入力電圧
と参照電圧とを比較する電圧比較器では、そのLSI化
を考えた場合、次のような問題が存在する。
The voltage comparator for comparing the input voltage and the reference voltage as in the prior art has the following problems when the LSI is considered.

【0005】LSI技術の発展に伴ってLSIの電源
電圧が低下した場合、入力範囲あるいは入力ダイナミッ
クレンジが低下する。
When the power supply voltage of the LSI decreases with the development of the LSI technology, the input range or the input dynamic range decreases.

【0006】入力ダイナミックレンジの低下にともな
い、信号対雑音比(S/N比)が劣化する。
A signal-to-noise ratio (S / N ratio) deteriorates with a decrease in input dynamic range.

【0007】信号をすべて電圧の形で扱うと、電源配
線や信号配線間の容量結合などによる雑音電圧により、
精度が劣化する。LSIの微細化に伴い、容量結合は増
加しており、精度がますます劣化する方向である。
When all signals are handled in the form of voltage, noise voltage due to capacitive coupling between power supply wiring and signal wiring causes
Accuracy deteriorates. With the miniaturization of LSI, the capacitive coupling is increasing, and the accuracy is getting worse.

【0008】[0008]

【課題を解決するための手段】本発明の比較器は、第1
の定電圧源に一端が接続された第1の抵抗負荷と、前記
第1の抵抗負荷の他端と第2の定電圧源との間に接続さ
れ入力電流に比例した電流を流す第1の定電流源と、前
記第1の定電圧源に一端が接続された第2の抵抗負荷
と、前記第2の抵抗負荷の他端と前記第2の定電圧源と
の間に接続され参照電流を流す第2の定電流源と、前記
第1の抵抗負荷の他端の電位と前記第2の抵抗負荷の他
端の電位とを比較してその大小関係を判定した結果を出
力する比較部と、から構成されている。
The comparator of the present invention comprises a first comparator.
A first resistance load whose one end is connected to the constant voltage source, and a first resistance load, which is connected between the other end of the first resistance load and the second constant voltage source and flows a current proportional to the input current. A constant current source, a second resistance load whose one end is connected to the first constant voltage source, and a reference current which is connected between the other end of the second resistance load and the second constant voltage source. And a second constant current source for flowing a current, and a comparison unit for outputting the result of comparing the potential of the other end of the first resistive load and the potential of the other end of the second resistive load to determine the magnitude relationship. It consists of and.

【0009】[0009]

【実施例】次に、本発明の最適な実施例について、図面
を参照して説明する。図1(a)は、本発明の第1の実
施例の回路図である。図1(a)を参照すると、この比
較器は、第1の定電圧源1に一端が接続された第1の抵
抗負荷R1 と、第1の抵抗負荷R1 の他端と第2の定電
圧源2との間に接続され、入力電流Iinに比例した電流
I を流す第1の定電流源3と、第1の定電圧源に一端
が接続された第2の抵抗負荷R2 と、第2の抵抗負荷R
2 の他端と第2の定電圧源2との間に接続され、参照電
流Ir を流す第2の定電流源4と第1の抵抗負荷R1
他端の電位V1 と第2の抵抗負荷R2 の他端の電位V2
とを比較し、その大小関係を判定した結果を出力端6に
出力する比較器5とから構成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an optimum embodiment of the present invention will be described with reference to the drawings. FIG. 1A is a circuit diagram of the first embodiment of the present invention. Referring to FIG. 1A, this comparator has a first resistive load R 1 whose one end is connected to a first constant voltage source 1, another end of the first resistive load R 1 and a second resistive load R 1 . A first constant current source 3 connected between the constant voltage source 2 and a current I I proportional to the input current I in , and a second resistive load R2 having one end connected to the first constant voltage source And the second resistive load R
The second constant current source 4 connected between the other end of 2 and the second constant voltage source 2 and flowing the reference current I r , and the potential V 1 at the other end of the first resistive load R 1 and the second Potential V 2 at the other end of the resistive load R 2 of
And a comparator 5 that outputs the result of the determination of the magnitude relation to the output end 6 of the comparator 5.

【0010】入力電流Iinに比例した電流を流す定電流
源3の構成例を図2(a)から図2(c)に示す。図2
(a)は、MOSトランジスタのカレントミラー回路で
構成されたものを示す。図2(b)は、カレントミラー
回路を2段縦積みした構成のものを示す。図2(c)は
アクティブフィードバック形式のゲート接地回路をカレ
ントミラー回路の出力側に用いた構成である。図2
(a)〜(c)のどの回路においても、MOSトランジ
スタM1 を流れる電流とMOSトランジスタM2 を流れ
る電流との比は、MOSトランジスタM1 のチャンネル
幅W1 とチャンネル長L1 の比W1 /L1 と、MOSト
ランジスタM2 のチャンネル幅W2 とチャンネル長L2
の比W2 /L2 との比(W1 /L1 )/(W2/L2
に比例している。したがって、入力端7から入力された
入力電流Iinに比例した大きさの電流II を、出力端8
から流し込むことができる。
2 (a) to 2 (c) show an example of the structure of the constant current source 3 which supplies a current proportional to the input current I in . Figure 2
(A) shows what was comprised by the current mirror circuit of a MOS transistor. FIG. 2B shows a configuration in which current mirror circuits are vertically stacked in two stages. FIG. 2C shows a configuration in which an active feedback type gate ground circuit is used on the output side of the current mirror circuit. Figure 2
Also in the circuit of (a) ~ (c) the throat, MOS transistors ratio of the current flowing through the current and MOS transistor M 2 through the M 1, the ratio W of the MOS transistor M channel width W 1 of 1 and the channel length L 1 1 / L 1 and, MOS transistor channel width of M 2 W 2 and the channel length L 2
The ratio between the ratio W 2 / L 2 of (W 1 / L 1) / (W 2 / L 2)
Is proportional to. Therefore, a current I I having a magnitude proportional to the input current I in input from the input end 7 is supplied to the output end 8
Can be poured from.

【0011】参照電流Ir を流す定電流源4の構成も、
図2(a)から図2(c)に示した入力電流Iinの代わ
りに参照電流Ir を用いることで、定電流源3の構成と
同じ構成で実現できる。
The constitution of the constant current source 4 for supplying the reference current I r is also as follows.
By using the reference current Ir in place of the input current I in shown in FIGS. 2A to 2C, the constant current source 3 can be realized with the same configuration.

【0012】また、抵抗負荷R1 およびR2 は、図1
(a)に示した抵抗を用いることの他に、図1(b)に
示したように、MOSトランジスタを抵抗の代わりとし
て用いることもできる。
The resistive loads R 1 and R 2 are shown in FIG.
Besides using the resistor shown in (a), a MOS transistor can be used as a substitute for the resistor as shown in FIG. 1 (b).

【0013】比較部5は、2入力の大小関係を判定する
機能を持つ。その構成の例を図3に示す。
The comparison unit 5 has a function of determining the magnitude relationship between two inputs. An example of the configuration is shown in FIG.

【0014】以上示した簡単な構成で、入力電流と参照
電流の比較を実行することができ、その大小関係を判定
した結果が出力として得られる。
With the simple configuration described above, the comparison between the input current and the reference current can be executed, and the result of determining the magnitude relationship can be obtained as an output.

【0015】次に、本発明の第2の実施例について説明
する。図4は、本発明の第2の実施例の回路図を示す図
である。図4を参照すると、この比較器は、図1(a)
に示した比較器とくらべ、第1の抵抗負荷R1 と第1の
定電流源3との間に直列に第1のスイッチ9が接続さ
れ、第2の抵抗負荷R2 と第2の定電流源4との間に直
列に第2のスイッチ10が接続されている点が異なって
いる。図4は、スイッチ9および10を、MOSトラン
ジスタを用いて構成した例を示してある。
Next, a second embodiment of the present invention will be described. FIG. 4 is a diagram showing a circuit diagram of the second embodiment of the present invention. Referring to FIG. 4, this comparator is shown in FIG.
Compared with the comparator shown in FIG. 1, the first switch 9 is connected in series between the first resistance load R 1 and the first constant current source 3, and the second resistance load R 2 and the second constant load R 2 are connected in series. The difference is that a second switch 10 is connected in series with the current source 4. FIG. 4 shows an example in which the switches 9 and 10 are composed of MOS transistors.

【0016】スイッチ9と10の働きは、それぞれ、入
力電流Iinに比例した電流II を流す電流経路および参
照電流Ir を流す電流経路の開閉を、スイッチ9および
10で制御することである。すなわち、スイッチ9およ
び10が開いているときは回路に電流が流れず、スイッ
チ9および10が閉じているときにのみ、回路に電流が
流れる。したがって、必要なときだけスイッチを閉じて
回路に電流を流し不要なときにはスイッチを開いて電流
を遮断すれば、常に回路に電流を流している場合に比
べ、消費電力を低減できる。たとえば、比較を実行する
ときだけ電流を流すようにすればよく、スイッチを閉じ
ている時間と開いている時間が同じ長さであれば、消費
電力は1/2に低減できる。ただし、図1(a)に示し
た比較器にくらべ、スイッチ9と10の分だけ素子数が
増加するので、図1(a)に示した構成の比較器を用い
るか、図4に示した構成の比較器を用いるかは、消費電
力の低減と素子数の低減とのどちらを優先させるかによ
る。
The functions of the switches 9 and 10 are to control the opening and closing of the current path for flowing the current I I and the current path for flowing the reference current I r, which are proportional to the input current I in , by the switches 9 and 10, respectively. .. That is, no current flows through the circuit when switches 9 and 10 are open, and current flows through the circuit only when switches 9 and 10 are closed. Therefore, by closing the switch only when necessary and allowing the current to flow through the circuit and opening the switch when not needed to interrupt the current, the power consumption can be reduced as compared with the case where the current is always applied through the circuit. For example, it suffices to allow the current to flow only when the comparison is performed, and if the time when the switch is closed and the time when the switch is open are the same, the power consumption can be reduced to 1/2. However, as compared with the comparator shown in FIG. 1A, the number of elements increases by the amount of the switches 9 and 10, so the comparator having the configuration shown in FIG. Whether to use the comparator having the configuration depends on which of power consumption reduction and the number of elements is prioritized.

【0017】[0017]

【発明の効果】以上述べたように、本発明によれば、入
力電流と参照電流とを比較しその大小関係を判定した結
果を出力として得ることのできる、簡単な構成の比較器
を提供する事ができる。
As described above, according to the present invention, there is provided a comparator having a simple structure capable of obtaining the output as a result of comparing the input current and the reference current and determining the magnitude relationship. I can do things.

【図面の簡単な説明】[Brief description of drawings]

【図1】分図(a)は、本発明の第1の実施例による比
較器の一例の回路図である。分図(b)は、本発明の第
1の実施例による比較器の他の例の回路図である。
FIG. 1A is a circuit diagram of an example of a comparator according to a first embodiment of the present invention. FIG. 6B is a circuit diagram of another example of the comparator according to the first embodiment of the present invention.

【図2】図1における定電流源3および4の回路構成の
例を示す回路図である。
FIG. 2 is a circuit diagram showing an example of a circuit configuration of constant current sources 3 and 4 in FIG.

【図3】図1における比較部の回路構成の例を示す回路
図である。
FIG. 3 is a circuit diagram showing an example of a circuit configuration of a comparison unit in FIG.

【図4】本発明の第2の実施例による比較器の回路図で
ある。
FIG. 4 is a circuit diagram of a comparator according to a second embodiment of the present invention.

【図5】従来の電圧比較器の一例の回路図である。FIG. 5 is a circuit diagram of an example of a conventional voltage comparator.

【符号の説明】[Explanation of symbols]

1,2 定電圧源 3,4 定電流源 5 比較部 6,8 出力端 7 入力端 9,10 スイッチ 1, 2 constant voltage source 3, 4 constant current source 5 comparison part 6, 8 output end 7 input end 9, 10 switch

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 第1の定電圧源に一端が接続された第1
の抵抗負荷と、前記第1の抵抗負荷の他端と第2の定電
圧源との間に接続され入力電流に比例した電流を流す第
1の定電流源と、 前記第1の定電圧源に一端が接続された第2の抵抗負荷
と、 前記第2の抵抗負荷の他端と前記第2の定電圧源との間
に接続され参照電流を流す第2の定電流源と、 前記第1の抵抗負荷の他端の電位と前記第2の抵抗負荷
の他端の電位とを比較してその大小関係を判定した結果
を出力する比較部と、 から構成されることを特徴とした比較器。
1. A first one having one end connected to a first constant voltage source.
Constant resistance source, a first constant current source connected between the other end of the first resistance load and the second constant voltage source, and flowing a current proportional to the input current, and the first constant voltage source A second resistance load whose one end is connected to the second resistance load; a second constant current source connected between the other end of the second resistance load and the second constant voltage source to flow a reference current; A comparison unit configured to compare the electric potential at the other end of the first resistive load with the electric potential at the other end of the second resistive load and output the result of determining the magnitude relationship, vessel.
【請求項2】 請求項1記載の比較器において、 前記第1の抵抗負荷と前記第1の定電流源との間に直列
に第1のスイッチが接続され、 前記第2の抵抗負荷と前記第2の定電流源との間に直列
に第2のスイッチが接続されていることを特徴とする比
較器。
2. The comparator according to claim 1, wherein a first switch is connected in series between the first resistance load and the first constant current source, and the second resistance load and the second switch are connected in series. A second switch is connected in series between the second constant current source and the second constant current source.
JP25899291A 1991-10-07 1991-10-07 Comparator Pending JPH05102807A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25899291A JPH05102807A (en) 1991-10-07 1991-10-07 Comparator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25899291A JPH05102807A (en) 1991-10-07 1991-10-07 Comparator

Publications (1)

Publication Number Publication Date
JPH05102807A true JPH05102807A (en) 1993-04-23

Family

ID=17327853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25899291A Pending JPH05102807A (en) 1991-10-07 1991-10-07 Comparator

Country Status (1)

Country Link
JP (1) JPH05102807A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5477170A (en) * 1994-02-17 1995-12-19 Nec Corporation Comparator capable of preventing large noise voltage
US5798667A (en) * 1994-05-16 1998-08-25 At&T Global Information Solutions Company Method and apparatus for regulation of power dissipation
JP2003198341A (en) * 2001-12-27 2003-07-11 Fuji Electric Co Ltd Current-amplifying comparator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5477170A (en) * 1994-02-17 1995-12-19 Nec Corporation Comparator capable of preventing large noise voltage
US5798667A (en) * 1994-05-16 1998-08-25 At&T Global Information Solutions Company Method and apparatus for regulation of power dissipation
JP2003198341A (en) * 2001-12-27 2003-07-11 Fuji Electric Co Ltd Current-amplifying comparator

Similar Documents

Publication Publication Date Title
US5220207A (en) Load current monitor for MOS driver
US5493205A (en) Low distortion differential transconductor output current mirror
JP2882163B2 (en) Comparator
US5446396A (en) Voltage comparator with hysteresis
JPH08334534A (en) Circuit device for detection of load current of power semiconductor entity
JPH11272346A (en) Current source
JPH0661766A (en) Output buffer amplifier circuit
US6133779A (en) Integrated circuit with a voltage regulator
US5515006A (en) Low distortion efficient large swing CMOS amplifier output
US5703477A (en) Current driver circuit with transverse current regulation
US6927559B2 (en) Constant voltage power supply
US20050275461A1 (en) Low voltage differential amplifier circuit for wide voltage range operation
JPH05102807A (en) Comparator
US6278322B1 (en) Transconductance amplifier and automatic gain control device using it
US5545972A (en) Current mirror
JPH06138961A (en) Voltage regulator
JPH09186534A (en) Amplifier output stage with strengthened drive capability
US6424210B1 (en) Isolator circuit
US20020079966A1 (en) Differential amplifier having active load device scaling
JPH09321555A (en) Differential amplifier for semiconductor integrated circuit
JP3178716B2 (en) Maximum value output circuit, minimum value output circuit, maximum value minimum value output circuit
JP4087540B2 (en) Push-pull type amplifier circuit
FI113312B (en) comparator
JPH02177724A (en) Output buffer circuit
KR100675274B1 (en) Circuit and method for input