JPH0484466A - Diode - Google Patents

Diode

Info

Publication number
JPH0484466A
JPH0484466A JP19980590A JP19980590A JPH0484466A JP H0484466 A JPH0484466 A JP H0484466A JP 19980590 A JP19980590 A JP 19980590A JP 19980590 A JP19980590 A JP 19980590A JP H0484466 A JPH0484466 A JP H0484466A
Authority
JP
Japan
Prior art keywords
layer
diode
buried layer
substrate
anode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19980590A
Other languages
Japanese (ja)
Inventor
Tadashi Nose
能勢 忠司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP19980590A priority Critical patent/JPH0484466A/en
Publication of JPH0484466A publication Critical patent/JPH0484466A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve rising response and efficiency in forward characteristics under simple structure by forming another conducting type buried layer into a single conducting type low concentration substrate in lattice shape, coupling electrically a single conducting type high concentration layer formed on one side the substrate with this buried layer so as to produce an anode, and turning a single conducting type high concentration layer formed on the other side of the substrate so as to produce a cathode: CONSTITUTION:When a forward bias voltage is increased, the expansion between each buried layer 12 is further minimized while a slit 22 is increased so that more increased current flows between N<+> layers 17 and 19 of an anode and a cathode. As a result, a diode is promptly turned ON from the forward voltage 0 so that current may flow where the slit 22 in a depletion layer serves so that the concentration of the buried layer 12, and data such as dimensions and shapes may be properly set so as to reduce the generated voltage to 0. In an electrostatic induction type diode, which controls an expanding state of the depletion layer 21 formed between each buried layer in lattice shape by a reverse bias in this manner, it is possible to enhance rising responsibility with forward characteristics, thereby improving the efficiency of the diode dramatically.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はダイオードに関し、詳しくは逆バイアスにより
形成される空乏層で電流制御する静電誘導型ダイオード
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a diode, and more particularly to a static induction diode in which current is controlled by a depletion layer formed by reverse bias.

〔従来の技術〕[Conventional technology]

一般的なダイオードはPN接合からなる構造を有し、そ
の基本構造を第7図に示し説明する。
A typical diode has a structure consisting of a PN junction, and its basic structure is shown and explained in FIG.

このダイオードは、N型基板(1)の−面側にP型不純
物を選択的に拡散してP層(2)を形成し、基板(1)
上に絶縁膜(3)を被着形成した上でP層(2)と対応
する部位を窓明けし、その窓明は部分にアノード電極(
4)を形成し、上記基板(1)の他面側にカソード電極
(5)を形成したものである。
This diode is made by selectively diffusing P-type impurities to the negative side of an N-type substrate (1) to form a P layer (2).
An insulating film (3) is deposited on top, and a window is opened in the part corresponding to the P layer (2), and the window is covered with an anode electrode (
4), and a cathode electrode (5) is formed on the other surface of the substrate (1).

上記ダイオードは、第8図に示すような電圧−電流特性
を有し、アノード電極(4)を負極側に、カソード電極
(5)を正極側にして電圧を印加することにより逆バイ
アス状態となってP層(2)から基板(1)中に拡がる
空乏層によってダイオードがカットオフ状態となる。逆
に、アノード電極(4)を正極側にカソード電極(5)
を負極側にして電圧を印加することにより順バイアス状
態となってPN接合間に電流が流れてダイオードがON
状態となる。
The above diode has voltage-current characteristics as shown in Fig. 8, and becomes reverse biased by applying a voltage with the anode electrode (4) on the negative side and the cathode electrode (5) on the positive side. The depletion layer that spreads from the P layer (2) into the substrate (1) puts the diode in a cut-off state. Conversely, place the anode electrode (4) on the positive side and the cathode electrode (5) on the positive side.
By applying a voltage to the negative terminal, a forward bias state is created, and current flows between the PN junction and the diode turns on.
state.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところで、上述したPN接合からなる従来のダイオード
では、第8図の電圧−電流特性から明らかなように逆バ
イアス状態から徐々に電圧を上げて順バイアス状態に移
行する際に、電圧が00時点から0.6〜0.7vの電
圧V、までダイオードがONせず電流が流れない現象が
ある。このようにダイオードの順方向特性において立上
がり応答性が悪く、ダイオードの効率が大幅に低下する
という問題があった。
By the way, in the conventional diode made of the above-mentioned PN junction, as is clear from the voltage-current characteristics shown in Figure 8, when the voltage is gradually increased from the reverse bias state to the forward bias state, the voltage changes from the 00 point. There is a phenomenon in which the diode does not turn on and current does not flow up to a voltage V of 0.6 to 0.7V. As described above, there is a problem in that the rising response of the diode in the forward direction is poor, and the efficiency of the diode is significantly reduced.

そこで、本発明は上記問題点に鑑みて提案されたもので
、その目的とするところは、簡単な構造により順方向特
性での立上がり応答性及び効率を改善し得るダイオード
を探偵することにある。
The present invention was proposed in view of the above-mentioned problems, and its purpose is to find a diode that can improve the rise response and efficiency of forward characteristics with a simple structure.

〔課題を解決するための手段〕[Means to solve the problem]

本発明における上記目的を達成するための技術的手段は
、一導電型低濃度基板中に他導電型埋込み層を格子状に
形成し、この埋込み層に基板の一面側に形成された一導
電型高濃度層を電気的に結合させてアノードとすると共
に、基板の他面側に形成された一導電型高濃度層をカソ
ードとしたことである。
The technical means for achieving the above object of the present invention is to form a buried layer of another conductivity type in a lattice shape in a low concentration substrate of one conductivity type, and to form a buried layer of one conductivity type on one side of the substrate in this buried layer. The high concentration layer is electrically coupled to serve as an anode, and the high concentration layer of one conductivity type formed on the other side of the substrate is used as a cathode.

〔作用〕 本発明に係るダイオードでは、逆バイアスにより格子状
の各埋込み層間に形成される空乏層の拡がり状態を制御
することで、その空乏層が介在するアノードとカソード
の一導電型高濃度層間に流れる電流を制御し、順方向特
性での立上がり応答性の向上を図る。
[Function] In the diode according to the present invention, by controlling the spread state of the depletion layer formed between each buried layer in a lattice shape by reverse bias, the depletion layer is interposed between the high concentration layer of one conductivity type between the anode and the cathode. Controls the current flowing through the circuit and improves the rise response in the forward characteristic.

〔実施例〕〔Example〕

本発明に係るダイオードの実施例を第1図乃至第6図を
参照しながら説明する。
Embodiments of the diode according to the present invention will be described with reference to FIGS. 1 to 6.

第1図に示す実施例はメ号構造のダイオードで、同図に
おいて、(11)ば一導電型低濃度であるN−型基板、
(12)  (12)−はN−型基板(11)中に格子
状に形成した他導電型であるP+型の埋込み層、(13
)  (13)は埋込み層(12)  (12)−の最
外側でN−型基板(11)のメサ部(14)  (14
)にあるP+層 (15)  (15)と隣接させて形
成したN+層、(16)  (16)は上記P+層(1
5)  (15)とN+層(13)  (13)上に形
成された接続電極、(17)はN−型基板(11)の−
面側に形成した一導電型高濃度であるN”ffAで、こ
れをアノードとしてその表面にアノード電極(18)を
形成する。
The embodiment shown in FIG. 1 is a diode with a square structure.
(12) (12)- is a buried layer of P+ type, which is a different conductivity type, formed in a lattice shape in the N- type substrate (11); (13)
) (13) is the outermost part of the buried layer (12) (12)- and the mesa part (14) (14) of the N-type substrate (11).
) P+ layer (15) N+ layer formed adjacent to (15), (16) (16) is the P+ layer (1
5) (15) and N+ layer (13) Connection electrode formed on (13), (17) is - of N- type substrate (11)
A high concentration N''ffA of one conductivity type formed on the surface side is used as an anode, and an anode electrode (18) is formed on the surface.

このN+層(17)は、メサ部(14)のN” ! (
13)、接続電極(16)及びP+層(15)を介して
埋込み層(12)  (12)−−−−一と電気的に結
合する。(19)はN−型基板(11)の他面側に形成
した一導電型高濃度であるN+層で、これをカソードと
してその表面にカソード電極(20)を形成する。
This N+ layer (17) is the N”! (
13), is electrically coupled to the buried layer (12) (12) through the connection electrode (16) and the P+ layer (15). (19) is a high concentration N+ layer of one conductivity type formed on the other side of the N- type substrate (11), and this is used as a cathode to form a cathode electrode (20) on its surface.

このダイオードでは、アノード電極(18)を負極側に
、カソード電極(20)を正極側にして逆バイアス電圧
を印加すると、第2図(a)に示すように格子状の埋込
み層(12)  (12)−の周囲に空乏層(21)が
形成される。上記逆バイアス電圧が小さいと、空乏層(
21)の拡がりが大きくて各埋込み層(12)  (1
2L−間に空乏層(21)が存在するため、これにより
アノードとカソードのN+層(17)と(19)が分断
されてアノード電極(工8)とカソード電極(20)間
には電流が流れず、第3図の電圧−電流特性に示すよう
にダイオードがカットオフ状態となる。上記逆バイアス
電圧を徐々に小さくすると、空乏層(21)の拡がりが
小さくなり、第2図(b)に示すように各埋込み層(1
2)(12) −間で空乏層(21)の切れ間(22)
が発生した時点、即ち、逆バイアス電圧がOとなる時点
で、アノードとカソードのN+層(17)と(19)間
が空乏層(21)の切れ間(22)を介してつながり、
アノード電極(18)とカソード電極(20)間に電流
が流れる。以後、順バイアス電圧を上げると、各埋込み
層(12)  (121−間の拡がりが更に小さくなっ
て切れ間(22)が大きくなり、アノードとカソードの
N+層(17)  (19)間に流れる電流が増加する
。これにより第3図の電圧−電流特性に示すように順バ
イアス電圧が0■からダイオードが速やかにONLで電
流が流れる。ここで、空乏層(21)の切れ間(22)
が発生する電圧がOVとなるように埋込み層(12) 
 (12)・・・の濃度や寸法形状などが適宜設定され
る。このように逆バイアスにより格子状の各埋込み層(
12)  (12)間に形成される空乏層(21)の拡
がり状態を制御する静電誘導型ダイオードでは、順方向
特性での立上がり応答性が良好となる。尚、上述し7た
順バイアス電圧を更に大きくすれば、埋込み層(12)
とN″′型基板(11)とのPN接合間で電流が流れる
ことになる。
In this diode, when a reverse bias voltage is applied with the anode electrode (18) on the negative side and the cathode electrode (20) on the positive side, a lattice-shaped buried layer (12) ( A depletion layer (21) is formed around 12)-. If the above reverse bias voltage is small, the depletion layer (
21) is large and each buried layer (12) (1
Since there is a depletion layer (21) between 2L−, this separates the anode and cathode N+ layers (17) and (19), and current flows between the anode electrode (step 8) and the cathode electrode (20). No current flows, and the diode enters a cut-off state as shown in the voltage-current characteristics of FIG. When the reverse bias voltage is gradually reduced, the spread of the depletion layer (21) becomes smaller, and as shown in FIG. 2(b), each buried layer (1
2) (12) - The gap (22) in the depletion layer (21)
occurs, that is, when the reverse bias voltage becomes O, the anode and cathode N+ layers (17) and (19) are connected through the gap (22) in the depletion layer (21),
A current flows between the anode electrode (18) and the cathode electrode (20). After that, when the forward bias voltage is increased, the spread between each buried layer (12) (121-) becomes smaller and the gap (22) becomes larger, and the current flowing between the anode and cathode N+ layer (17) (19) increases. As a result, as shown in the voltage-current characteristics in Fig. 3, current immediately flows through the diode ONL from the forward bias voltage of 0.Here, the gap (22) between the depletion layer (21)
the buried layer (12) so that the voltage generated is OV.
(12) The density, size, shape, etc. of . . . are appropriately set. In this way, each buried layer (
12) In the electrostatic induction diode that controls the expansion state of the depletion layer (21) formed between (12), the rising response in the forward characteristic is good. Incidentally, if the forward bias voltage mentioned in 7 above is further increased, the buried layer (12)
A current will flow between the PN junction between the N″′ type substrate (11) and the N″′ type substrate (11).

また、上記ダイオードでは埋込み! (12)に電流を
流しすぎると、少数キャリアが蓄積されることによりO
FF時の切れが悪くなる虞がある場合には、第4図に示
すようにN−型基板(11)のメサ部(14)  (1
4)にP+層(15)  (15)から離隔させてN+
層(13)  (13)を形成し、そのP+層(15)
  (15)とN+層(13)  (13)とを電気的
に結合させる接続電極(16°)  (16’ )に抵
抗成分を持たせるような構造にすればよい。
Also, the above diode is embedded! If too much current is passed through (12), minority carriers will accumulate and O
If there is a risk of poor cutting during FF, remove the mesa portion (14) (1) of the N-type substrate (11) as shown in Figure 4.
4) P+ layer (15) (15) separated from N+
Form layer (13) (13) and its P+ layer (15)
(15) and the N+ layer (13) (13) The connection electrode (16°) (16') for electrically coupling the N+ layer (13) (13) may have a structure in which it has a resistance component.

また、この静電誘導型ダイオードでは、第5図に示すよ
うにアノードのN+層(I7)と埋込み層(12)  
(12L−−−とを電気的に結合させるN+層(13’
 )  (13”)をN−型基板(11)の端面に形成
した構造とすることも可能である。
In addition, in this electrostatic induction diode, as shown in FIG. 5, the anode N+ layer (I7) and the buried layer (12)
(N+ layer (13'
) (13'') may be formed on the end face of the N-type substrate (11).

更に、上記ダイオードはメサ構造に限らず、第6図に示
すようにプレーナ構造とすることも可能であり、この場
合、アノードのN+層(17)と埋込み層(12)  
(12L−とを電気的に結合させる埋込み層(12) 
 (12:l−の最外側のP+層(15’ )(15’
 )をアノードのN+層(17)に延在させて形成する
ことが好ましい。
Furthermore, the above diode is not limited to the mesa structure, but can also have a planar structure as shown in FIG. 6. In this case, the anode N+ layer (17) and the buried layer (12)
(Buried layer (12) for electrically coupling with 12L-
(12: l- outermost P+ layer (15') (15'
) is preferably formed extending into the N+ layer (17) of the anode.

尚、上述した各実施例ではN−型基板について説明した
が、本発明はこれに限定されることなく、P−型基板に
ついても適用可能であるのは勿論である。
In each of the above-mentioned embodiments, an N-type substrate has been described, but the present invention is not limited thereto, and is of course applicable to a P-type substrate.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、逆バイアスにより格子状の各埋込み層
間に形成される空乏層の拡がり状態を制御することで、
空乏層が介在するアノードとカソードの一導電型高濃度
層間に流れる電流を制御する静電誘導型ダイオードとし
たことにより、順方向特性での立上がり応答性が良好と
なり、ダイオードの効率が大@に向上してその実用的価
値は大である。
According to the present invention, by controlling the spread state of the depletion layer formed between each buried layer in a lattice shape using reverse bias,
By using a static induction diode that controls the current flowing between the one-conductivity type high concentration layer of the anode and cathode with a depletion layer intervening, the rising response in the forward direction characteristics is good and the efficiency of the diode is high. Its practical value is great.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第6図は本発明の詳細な説明するためのもの
で、第1図はメサ構造のダイオードを示す断面図、第2
図(a)(b)は第1図のダイオードでの逆バイアス状
態を示す各断面図、第3図は第1図のダイオードの電圧
−電流特性を示す波形図、第4図は第1図の変形例を示
す断面図、第5図は第4図の他の実施例を示す断面図、
第6図はブレーナ型のダイオードを示す断面図である。 第7図はダイオードの従来例を示す断面図、第8図は!
@7図のダイオードの電圧−電流特性を示す波形図であ
る。 (11)−・・一導電型低濃度基板、 (12) −他導電型埋込み層、 (17) −一一一導電型高濃度層(アノード)、(1
9) −・一導電型高濃度層(カソード)。 第1図
1 to 6 are for explaining the present invention in detail, and FIG. 1 is a cross-sectional view showing a diode with a mesa structure, and FIG.
Figures (a) and (b) are cross-sectional views showing the reverse bias state of the diode in Figure 1, Figure 3 is a waveform diagram showing the voltage-current characteristics of the diode in Figure 1, and Figure 4 is the waveform diagram shown in Figure 1. 5 is a sectional view showing another embodiment of FIG. 4,
FIG. 6 is a sectional view showing a Brehner type diode. Figure 7 is a sectional view showing a conventional example of a diode, and Figure 8 is!
FIG. 7 is a waveform diagram showing the voltage-current characteristics of the diode shown in FIG. (11) - Low concentration substrate of one conductivity type, (12) - Buried layer of other conductivity type, (17) - High concentration layer of one and one conductivity type (anode), (1
9) - High concentration layer of one conductivity type (cathode). Figure 1

Claims (1)

【特許請求の範囲】[Claims] (1)一導電型低濃度基板中に他導電型埋込み層を格子
状に形成し、この埋込み層に基板の一面側に形成された
一導電型高濃度層を電気的に結合させてアノードとする
と共に、基板の他面側に形成された一導電型高濃度層を
カソードとしたことを特徴とするダイオード。
(1) A buried layer of one conductivity type is formed in a grid pattern in a low concentration substrate of one conductivity type, and a high concentration layer of one conductivity type formed on one side of the substrate is electrically coupled to this buried layer to form an anode. In addition, a diode characterized in that a high concentration layer of one conductivity type formed on the other side of the substrate serves as a cathode.
JP19980590A 1990-07-27 1990-07-27 Diode Pending JPH0484466A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19980590A JPH0484466A (en) 1990-07-27 1990-07-27 Diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19980590A JPH0484466A (en) 1990-07-27 1990-07-27 Diode

Publications (1)

Publication Number Publication Date
JPH0484466A true JPH0484466A (en) 1992-03-17

Family

ID=16413925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19980590A Pending JPH0484466A (en) 1990-07-27 1990-07-27 Diode

Country Status (1)

Country Link
JP (1) JPH0484466A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0637335A (en) * 1992-07-15 1994-02-10 Naoshige Tamamushi Static induction diode having buried structure or cut-in structure
JP2005012150A (en) * 2003-06-20 2005-01-13 Semiconductor Res Found Electrostatic induction diode

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0637335A (en) * 1992-07-15 1994-02-10 Naoshige Tamamushi Static induction diode having buried structure or cut-in structure
JP2005012150A (en) * 2003-06-20 2005-01-13 Semiconductor Res Found Electrostatic induction diode
JP4686782B2 (en) * 2003-06-20 2011-05-25 国立大学法人東北大学 Electrostatic induction diode

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