JPH0480890U - - Google Patents

Info

Publication number
JPH0480890U
JPH0480890U JP12412790U JP12412790U JPH0480890U JP H0480890 U JPH0480890 U JP H0480890U JP 12412790 U JP12412790 U JP 12412790U JP 12412790 U JP12412790 U JP 12412790U JP H0480890 U JPH0480890 U JP H0480890U
Authority
JP
Japan
Prior art keywords
semiconductor device
embossed
packaging container
tape
recesses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12412790U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12412790U priority Critical patent/JPH0480890U/ja
Publication of JPH0480890U publication Critical patent/JPH0480890U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Packages (AREA)
  • Packaging Of Annular Or Rod-Shaped Articles, Wearing Apparel, Cassettes, Or The Like (AREA)
  • Packaging Frangible Articles (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図aは本考案の第1実施例に表面実装型半
導体装置を収納した状態の断面図、同図bは同図
aのA−A矢視断面図、第2図aは本考案の第2
実施例と収納半導体装置を示す断面図、同図bは
同図aのA−A矢視断面図、第3図は従来の半導
体装置の包装容器に半導体装置を収納した状態の
断面図である。 1,1a,11……エンボスキヤリアテープ、
2……エンボス凹所、3,3a……凸起、4……
カバーテープ、5……平面実装型半導体装置。
Figure 1a is a cross-sectional view of the first embodiment of the present invention in which a surface-mounted semiconductor device is housed, Figure b is a cross-sectional view taken along the line A-A in Figure a, and Figure 2a is a cross-sectional view of the present invention. Second
FIG. 3 is a cross-sectional view showing an embodiment and a semiconductor device stored therein, FIG. . 1, 1a, 11... Embossed carrier tape,
2...Embossed recess, 3,3a...Protrusion, 4...
Cover tape, 5...Flat-mounted semiconductor device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 表面実装型半導体装置を収納するエンボス凹所
がテープ長さの方向に一列に並んで形成されたエ
ンボスキヤリアテープと、前記エンボス凹所の上
部開口を塞ぐカバーテープとからなる半導体装置
の包装容器において、前記エンボス凹所の底部に
は、収納半導体装置のパツケージ底面の受け台と
なる凸起が形成されていることを特徴とする半導
体装置の包装容器。
A semiconductor device packaging container comprising an embossed carrier tape in which embossed recesses for accommodating a surface-mounted semiconductor device are formed in a row in the tape length direction, and a cover tape that closes an upper opening of the embossed recesses. . A packaging container for semiconductor devices, characterized in that the bottom of the embossed recess is formed with a protrusion that serves as a cradle for the bottom surface of the package of the semiconductor device to be stored.
JP12412790U 1990-11-26 1990-11-26 Pending JPH0480890U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12412790U JPH0480890U (en) 1990-11-26 1990-11-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12412790U JPH0480890U (en) 1990-11-26 1990-11-26

Publications (1)

Publication Number Publication Date
JPH0480890U true JPH0480890U (en) 1992-07-14

Family

ID=31871795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12412790U Pending JPH0480890U (en) 1990-11-26 1990-11-26

Country Status (1)

Country Link
JP (1) JPH0480890U (en)

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