JPH0478895A - Liquid crystal display body driving circuit - Google Patents

Abstract

PURPOSE:To greatly reduce crosstalk by discharging electrostatic charges, which are accumulated on a video signal line, through a discharging circuit except at the time of writing to liquid crystal. CONSTITUTION:While an output circuit 5 outputs a voltage accumulated in a holding capacitor 4 in a horizontal blanking period to the video signal output line 12, each discharging circuit 14 is OFF and exerts no influence upon the operation. In other periods, the circuit 14 turns ON the moment the output of the circuit 5 reaches high impedance, thereby discharging the electrostatic charges accumulated on the output line 12. Then the application time of a voltage between the source and drain of a picture element transistor 8 is greatly shortened and the crosstalk can greatly be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for an active matrix liquid crystal display device.

[Conventional technology]

FIG. 2 shows a circuit diagram of a liquid crystal display using a conventional liquid crystal display driving circuit. In FIG. 2, 1 is a liquid crystal display drive circuit, 2 is a horizontal shift register, 3 is a sample hold transistor (hereinafter referred to as an S/H transistor), 4 is a storage capacitor, 5 is an output circuit, 6 is a vertical shift register, and 7 is a 8 is a pixel transistor, 9 is a liquid crystal, 10 is a video signal input line, 11 is a control signal line, and 12 is a video signal output line.

The liquid crystal display driving circuit 1 includes a horizontal shift register 2,
S/H1 - Consists of a transistor 3, a holding capacitor 4, and an output circuit 5, and is connected to the output line of the horizontal shift register 2 and the S/H1
H transistors 3, holding capacitors M4, and output circuits 5 are prepared for the number of horizontal pixels. The horizontal shift register 2 is operated by a start pulse and a driving clock, and sequentially sets the output lines to a high level one by one from left to right. The cycle in which the horizontal shift register 2 operates once from left to right (referred to as horizontal scanning) is synchronized with one horizontal scanning period of the video signal. Each output line of the horizontal shift register 2 is connected to the gate of the S/H transistor 3, and the S/H transistor 3 receives the video signal input line 10 as an input, so the video signal is -horizontal scanning. It is written to the holding container 14 at the specified horizontal position at the specified time of the period.

A signal is input to the control signal line 11 which is at a high level for a certain period of time within the horizontal blanking period and is at a low level during other periods. The output circuit 5 outputs the voltage stored in the holding capacitor 14 to the video signal output line 12 while the control signal line 11 is at a high level. During other periods, the output is high impedance.

On the other hand, the vertical shift register 6 is operated by a start pulse and a drive clock, and operates to sequentially raise the output to a high level one by one from top to bottom. Outputs are prepared for the number of vertical pixels.

The cycle in which the vertical shift register 6 operates once from top to bottom (referred to as vertical scanning) is synchronized with one vertical scanning period of the video signal. Since each output of the vertical shift register 6 is connected to the gate of each pixel transistor 8 on the horizontal line, first, the source and drain of each pixel transistor 8 on the uppermost horizontal line are shorted. , the video signal flowing to each video signal output line 12 is output to the liquid crystal display 9.
write to. When the horizontal shift register 2 completes one horizontal scan and the output circuit 5 outputs a video signal once during the blanking period, the vertical shift register 6 sets the output of the second stage to high level, and Each pixel transistor 8 on the horizontal line is operated.

Similarly, the image (tl signal) is written to the pixel 7 on the second horizontal line.In this way, the lower pixel transistors 5 are operated one after another, and the image signal is transferred to the liquid crystal at a predetermined position. 9, and displayed a two-dimensional image as a whole.

[Problem to be solved by the invention]

However, with the above-mentioned conventional technology, when displaying a white window pattern on a black background, for example, a thin white pattern (called crosstalk) occurs above the white pattern in the center of the screen, resulting in an unsightly display. have challenges.

SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and an object of the present invention is to provide a liquid crystal display drive circuit with less crosstalk.

[Means to solve the problem]

The liquid crystal display driving circuit of the present invention includes at least a multi-stage shift register, a plurality of sample-hold circuits each using the output of each stage of the shift register as a control terminal, inputting a video signal, and outputting a sample-hold signal. ,
A liquid crystal display drive circuit having an output circuit that outputs a video signal output line is characterized in that each video signal output line is provided with a discharge circuit.

[Effect]

Crosstalk occurs when the white signal in the center of the window pattern is written, and the pixel transistors in other parts of the video signal output line, that is, the black part at the top of the window pattern, leak. This is because the white signal leaks into the liquid crystal of the pixel where it should be. Also,
It is clear that the amount of leakage is proportional to the voltage applied between the source and drain of the pixel transistor and the application time.

According to the above-described configuration of the present invention, it is possible to discharge the charge that has conventionally been accumulated in the video signal output line for at least one horizontal scanning period through the discharge circuit at the same time that writing to the liquid crystal is completed. Therefore, the time for applying the voltage between the source and drain of the pixel transistor described above can be significantly reduced. Therefore, crosstalk can also be significantly reduced.

〔Example〕

FIG. 1 is a circuit diagram of a liquid crystal display using a liquid crystal display driving circuit according to an embodiment of the present invention, and 1 to 12 are second
This figure is similar to the circuit diagram of a conventional liquid crystal display. 13 is
The inverter circuit 14 which inputs a control signal and outputs an inverted signal is a discharge circuit, the gate of which is connected to the output line of the inverter circuit 13, the source of which is connected to each video signal output line 12, and the drain of which is grounded. .

While the output circuit 5 outputs the voltage accumulated in the storage capacitor 4 to the video signal output line 12 during the horizontal blanking period, each discharge circuit 14 is in an off state and does not affect the operation. During other periods, the output of the output circuit 5 becomes high impedance and at the same time the discharge circuit 14 becomes ON (conductive) to discharge the charge stored in the video signal output line 12.

The drive clock and circuit configuration are such that the output of the vertical shift register 6 is at a high level only during the blanking period of the horizontal period. The manner in which the output lines at a high level are shifted one by one from top to bottom is the same as in the conventional case.

FIG. 3 is a window pattern diagram. The center of the screen is white, and the other peripheral areas are black. In the conventional technology, the upper part of the white part in the center, which should originally be a point, ends up being a thin white pattern. This phenomenon is particularly noticeable in videos where a white object moves within an overall dark screen, resulting in an extremely unsightly screen.

FIG. 4 is a voltage diagram of the video signal output line of part 1 in FIG. 3. FIG. 4(a) is a voltage diagram for the conventional liquid crystal display driving circuit, and FIG. 4(b) is a voltage diagram for the liquid crystal display driving circuit shown in FIG. In FIG. 4, the horizontal axis represents time, and the vertical axis represents voltage level. In Fig. 4, 15 is a horizontal scanning period, 1
6 is a horizontal blanking period.

As explained in the operation section, the cause of crosstalk is that when a white video signal is being written, the signal from the video signal output line leaks into pixels that should originally be black.

In Fig. 4(a), the time during which the voltage of the video signal output line is at the white level is the horizontal scanning period x the number of horizontal lines in the white pattern, whereas in Fig. 4(b), the time during which the voltage of the video signal output line is at the white level is The ranking period is multiplied by the number of horizontal inclines in the white pattern. Normally, the horizontal scanning period is 63°5μs, and the blanking period is about 10
.mu.s, the time during which the video signal output line 12 is at the white level is reduced to about 1/6 in the liquid crystal display driving circuit according to the present invention compared to the conventional one.

Since the amount of signal leakage is proportional to the signal difference between the black level and white level and the application time, the amount of signal leakage is reduced to 1/6 in the liquid crystal display driving circuit according to the present invention.

Although a signal having a pulse width during the horizontal blanking period has been described above as a control signal, a signal having a constant narrow pulse width within the horizontal blanking period may also be used, and the narrower the control signal, the better the effect.

FIG. 5 is a circuit diagram of a liquid crystal display using a liquid crystal display driving circuit according to another embodiment of the present invention.

A resistor 17 is connected between the video signal output line 12 and ground. Resistor 17 plays the role of discharge circuit 14 in FIG.

〔Effect of the invention〕

As described above, according to the present invention, the charge accumulated in the video signal line is discharged through the discharge circuit except during the writing time to the liquid crystal, which has the effect of significantly reducing crosstalk. .

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a liquid crystal display using a liquid crystal display driving circuit according to an embodiment of the present invention. FIG. 2 is a circuit diagram of a liquid crystal display using a conventional liquid crystal display driving circuit. Figure 3 is a window pattern diagram. FIG. 4(a) is a voltage diagram of a video signal output line of a conventional liquid crystal display drive circuit. FIG. 4(b) is a voltage diagram of the video signal output line of the liquid crystal display drive circuit of FIG. 1. FIG. 5 is a circuit diagram of a liquid crystal display using a liquid crystal display driving circuit according to another embodiment of the present invention. 1...Liquid crystal display drive circuit 2...Horizontal shift register 3...Sample hold transistor 4...Holding capacitor 5...Output circuit 6...Vertical shift register 7...Pixel 8... - Pixel transistor 9...Liquid crystal 10...Video signal input line 11...Control signal line 2...Video signal output line 3...Inverter circuit 4...Discharge circuit 5...Horizontal scanning period 6 ...Horizontal blanking period 7...Resistance or more

Claims (1)

[Claims] (1) a) At least a multi-stage shift register, a plurality of sample-and-hold circuits each using the output of each stage of the shift register as a control terminal, inputting a video signal, and outputting a sample-and-hold signal, and a video signal output line. A liquid crystal display drive circuit comprising: (b) a discharge circuit for each video signal output line.